Patents Represented by Attorney, Agent or Law Firm Douglas L. Weller
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Patent number: 8102893Abstract: An extended cavity surface emitting laser has a first laser die with a first cavity and a first gain element and a second laser die with a second cavity and a second gain element. The first and second gain elements are in series to provide optical gain and optical feedback in an extended optical cavity configuration. The first and second gain elements provide optical gain and optical feedback in a common extended cavity with the first and second gain elements operating serially as a common extended cavity optical mode.Type: GrantFiled: June 13, 2008Date of Patent: January 24, 2012Assignee: Necsel Intellectual PropertyInventors: Giorgio Giaretta, Arvydas Umbrasas, Michael Jansen
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Patent number: 8050444Abstract: A headphone, headset, or ear protector incorporating adjustable clamping pressure and providing configurable distribution of headband pressure. In one embodiment, the headphones, headsets, or ear protectors include a headband or neckband and at least one earcup coupled to the headband or neckband. The headphone, headset, or ear protector further includes an adjustment mechanism coupled to the headband or neckband and the at least one earcup that provides continuously variable adjustment of clamping pressure provided by the at least one earcup to the head of a user. In another embodiment, the headphone, headset, or ear protector include a headband or neckband, a first earcup coupled to the headband or neckband and a second earcup coupled to the headband or neckband.Type: GrantFiled: January 19, 2007Date of Patent: November 1, 2011Inventor: Dale Trenton Smith
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Patent number: 7973985Abstract: A scanning device scans both sides of a document. The document is fed between a first image sensor module and a second image sensor module. The second image sensor module is moved with respect to the first image sensor module so that a separation distance between the second image sensor module and the first image sensor module is based on a thickness of the document. A first side of the document is scanned using a first scan line located in the first image sensor module. A second side of the document is scanned using a second scan line located in the second image sensor module. When the document is fed between the first image sensor module and the second image sensor module, the document does not reach the first scan line and the second scan line simultaneously.Type: GrantFiled: March 17, 2008Date of Patent: July 5, 2011Assignee: Electronic Document Technology Pte. Ltd.Inventors: Hin Leong Tan, Chang-Ming Liu
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Patent number: 7958104Abstract: Systems, methods, and software are provided for facilitating data searching over a network. For example, in one implementation, a first component may be adapted to communicate with a user via a user device over the network. A second component may be adapted to receive a search request from the user via the user device over the network, process the search request by identifying zero or more contexts related to the user based on information that may be passed with the search request or via other sources, and provide zero or more search results in response to the search request. A database may be adapted to store information, including contextual information, related to the user. The second component may select information from the database related to zero or more contexts in order to provide zero or more search results to the user. Various other implementations are also provided.Type: GrantFiled: March 6, 2008Date of Patent: June 7, 2011Inventor: Shawn C. O'Donnell
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Patent number: 7921834Abstract: Paintballs are loaded into a paintball gun. The paintballs are stored within a drive tube of a paintball loader. The paintballs are loaded into the paintball gun from the drive tube of the paintball loader. A screw is rotated with respect to the drive tube so that the paintballs are constrained to travel along a helical groove of the screw and along one of multiple column grooves on an inner surface of the drive tube.Type: GrantFiled: December 23, 2005Date of Patent: April 12, 2011Assignee: Ancient Innovations CorporationInventor: Jared L. Hamilton
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Patent number: 7505162Abstract: The present invention relates to scanning multi-sided documents. The scanner device scans the multi-sided document one side at a time. The image of each side is tiled vertically or horizontally to form a composite image, which is transferred from the source to the application based on the TWAIN protocol. The source is TWAIN compliant, and it allows any TWAIN application to scan and process multi-sided cards as a single composite image. The source provides a TWAIN user interface which allows the user to select scanning parameters and options. The invention also provides a method of implementing a TWAIN source to use the document sensor on a scanner to efficiently scan single or multi-sided cards based on the TWAIN protocol. The source checks the status of the document sensor when the TWAIN user interface is displayed, and automatically starts scanning when a document is detected by the sensor.Type: GrantFiled: February 5, 2004Date of Patent: March 17, 2009Assignee: Electronic Document Technology Pte., Ltd.Inventor: Hin Leong Tan
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Patent number: 6978776Abstract: A loader stores and loads round objects is presented. The loader includes a screw and a drive tube. The screw has a helical groove. The helical groove winds in a first direction. The drive tube has multiple helical grooves on an inner surface of the drive tube. The multiple helical grooves wind in a second direction. The second direction is counter to the first direction. The screw is located within a center of the drive tube along a length of the drive tube so that round objects loaded within the drive tube are each within the helical groove of the screw and within one of the multiple helical grooves on the inner surface of the drive tube. When the drive tube rotates with respect to the screw, round objects within the drive tube are constrained to travel along the helical groove of the screw and along one of the multiple helical grooves on the inner surface of the drive tube.Type: GrantFiled: March 19, 2003Date of Patent: December 27, 2005Assignee: Ancient Innovations Corp.Inventor: Jared L. Hamilton
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Patent number: 6735584Abstract: A dynamic database index and management system essentially involving a multiple of user-defined data attributes used to depict the nature and type of stored data. The user defines attributes, defines subordinate relationships between attributes and determines which attributes are assigned to which data lots. Attributes may then be used for retrieval of the data.Type: GrantFiled: May 21, 1999Date of Patent: May 11, 2004Assignee: Bridgewell, Inc.Inventor: Peilin Chou
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Patent number: 6505151Abstract: The process of dividing sentences into phrases is automated. The sentence is divided into sub-sentences using statistical analysis. Then, the sub-sentences are into phrases, using statistical analysis. For example, for each pair of adjacent words in the sentence a metric is calculated which represents a strength of disconnection between the adjacent words. The sentence is divided into sub-sentences at locations in the sentence where the metric exceeds a first threshold.Type: GrantFiled: March 15, 2000Date of Patent: January 7, 2003Assignee: Bridgewell Inc.Inventors: Peilin Chou, Yen-Jen Oyang, Kuang-Hua Chen, Tien-Hsiung Sung, Chih-Yuan Cheng
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Patent number: 6366567Abstract: A first device detects whether a second device implements full duplex communication. When the first device begins receiving a network packet from the second device, the first device transmits a jam signal to the second device. When transmission of the network packet from the second device to the first device has been completed, the first device determines whether a check value within the network packet is valid. When the check value is valid, the first device recognizes that the second device implements full duplex communication. When the check value is not valid, the first device recognizes that the second device does not implement full duplex communication.Type: GrantFiled: August 6, 1998Date of Patent: April 2, 2002Assignee: Hewlett-Packard CompanyInventors: Bharat Kishore Singh, Bruce Anthony Klemin, Michael Richard James
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Patent number: 6320459Abstract: A filter system includes a low pass filter, a first summer circuit, a second low pass filter and a second summer circuit. The first low pass filter includes an input, an output, a storage means, a switching means and a control means. An input signal is placed on the input. An output signal is generated on the output. The storage means provides storage of a signal sample over time. The switching means, when closed, electrically couples the input to the first end of the storage means. The switching means, when open electrically isolates the input from the first end of the storage means. The control means controls the switching means. The control means generates a switching control signal. The switching control signal has a sampling frequency. A maximum cutoff frequency of the low pass filter is dependent on a value of a capacitance provided by the storage means, the sampling frequency, and a pulse width of the switching control signal.Type: GrantFiled: December 18, 2000Date of Patent: November 20, 2001Inventor: Rob McCullough
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Patent number: 6294935Abstract: A built-in-self-test circuit aids in testing a phase locked loop circuit. The phased locked loop has a plurality of frequency multipliers. The built-in-self-test circuit includes a frequency divider and a multiplexer. The frequency divider has a plurality of divide-by-counters. For each frequency multiplier within the plurality of frequency multipliers there is a corresponding divide-by-counter. A ratio of a multiplier for each frequency multiplier to a divider of its corresponding divide-by-counter is a constant for all frequency multipliers and corresponding divide-by-counters. When a frequency multiplier within the plurality of frequency multipliers is selected, the multiplexer selects its corresponding divide-by-counter to produce a test output clock.Type: GrantFiled: October 17, 2000Date of Patent: September 25, 2001Assignee: VLSI Technology, Inc.Inventor: Russell George Ott
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Patent number: 6266399Abstract: In order to increase the versatility with which incoming phone calls, are handled, a plurality of outgoing messages are stored. A first caller identification is associated with a first outgoing message from the plurality of outgoing messages. Upon receipt of a call from a caller, passive identification of the caller is performed in order to determine if an identity of the caller matches the first caller identification. If an identity of the caller matches the first caller identification, the first outgoing message is played to the caller. If in an identity of the caller does not match the first caller identification, an outgoing message other than the first outgoing message is played to the caller.Type: GrantFiled: February 12, 1998Date of Patent: July 24, 2001Inventors: Douglas L. Weller, Richard L. Morgan
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Patent number: 6260132Abstract: An address decoder includes a plurality of address decoder modules. Each address decoder module has a select line for each of a plurality of devices. Each of a plurality of XOR combination circuits performs a logic XOR function of all select lines for a single device from the plurality of devices. State control within the address decoder activates one address decoder module at a time.Type: GrantFiled: February 1, 1999Date of Patent: July 10, 2001Assignee: VLSI Technology, Inc.Inventor: Mark Leonard Buer
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Patent number: 6224460Abstract: A multi-platen chemical-mechanical polishing system is used to polish a wafer. The wafer is polished at a first station. During polishing, an endpoint is detected. The endpoint is detected by generating optical radiation by a first light source. The first optical radiation travels through a translucent area in a surface of a first platen and travels through a first polishing pad. After being reflected by the wafer, the optical radiation returns through the first polishing pad through the translucent window to a first optical radiation detector. The first polishing pad has a uniform surface in that no part of the surface of the first polishing pad includes transparent material through which non-scattered optical radiation originating from the first light source can pass and be detected by the first optical radiation detector. Optical radiation that travels through the first polishing pad and is detected by the first optical radiation detector is haze scattered by inclusions within the first polishing pad.Type: GrantFiled: June 30, 1999Date of Patent: May 1, 2001Assignee: VLSI Technology, Inc.Inventors: Samuel Vance Dunton, Yizhi Xiong
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Patent number: 6211087Abstract: A primary layer deposited over a secondary layer is planarized. A chemical mechanical polishing process is performed using a slurry which targets the primary layer. Then, chemical etching is performed using a chemical wet etchant which targets the secondary layer. The method is used, for example, when making connections to a lower layer through an insulating layer. Plug holes are formed through the insulating layer to the lower layer. Then the secondary layer is deposited. The secondary layer acts as a barrier layer or a glue layer.Type: GrantFiled: June 29, 1998Date of Patent: April 3, 2001Assignee: VLSI Technology, Inc.Inventors: Calvin Gabriel, Milind Weling
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Patent number: 6211045Abstract: A method is presented in which nitrogen-based gas in incorporated in polysilicon gate re-oxidation to improve hot carrier performance. A gate oxide layer is formed. Gate material is deposited on the gate oxide layer. The gate material is etched to form a gate structure. The gate oxide layer and the gate are re-oxidized. During re-oxidation, nitrogen-based gas is introduced to nitridize re-oxidized portions of the gate oxide layer.Type: GrantFiled: November 30, 1999Date of Patent: April 3, 2001Assignee: VLSI Technology, Inc.Inventors: Victor Liang, Mark Rubin, Bijan Moslehi
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Patent number: 6208172Abstract: A circuit monitor performance of an integrated circuit. The circuit includes a clock signal and a phase delay detection circuit. The clock signal is used by the integrated circuit to generate an output signal on an output pin of the integrated circuit. The phase delay detection circuit detects relative phase difference between the clock signal and the output signal on the output pin of the integrated circuit. The phase delay detection circuit includes a digital signal generator and an integrator. The digital signal generator is connected to an output pin of the integrated circuit. The digital signal generator generates a digital signal. Changes in phase delay between the output signal on the output pin of the integrated circuit and the clock signal used by the integrated circuit are encoded in a duty cycle of the digital signal generated by the digital signal generator. The integrator is connected to the digital signal generator and integrates the digital signal to produce an integrated signal.Type: GrantFiled: January 13, 1995Date of Patent: March 27, 2001Assignee: VLSI, Technology, Inc.Inventors: David R. Evoy, Nicholas J. Richardson
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Patent number: 6198294Abstract: Thickness of a wafer is monitored during grinding. A conductive plate is located below the wafer during grinding. One or more capacitive sensors are located above the wafer during grinding. A monitoring device monitors capacitance of the conductive plate and the capacitive sensor.Type: GrantFiled: May 17, 1999Date of Patent: March 6, 2001Assignee: VLSI Technology, Inc.Inventor: Andrew J. Black
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Patent number: 6188257Abstract: Power-on-reset logic is included within an integrated circuit. The power-on-reset logic includes a power-on-reset cell. The power-on-reset cell causes a reset signal to be issued upon a power signal being connected to the integrated circuit. The power-on-reset cell includes a power down input connected to a power-down line. When a power-down signal is placed on the power-down line, the power-on-reset cell is inactivated so that the power-on-reset cell does not cause the reset signal to be issued upon the power signal being connected to the integrated circuit. The power-on-reset logic also includes a logic block connected to the power-down line and to a system clock. The logic block issues a reset when the power-down signal is placed on the power-down line and the system clock is active. For example, the logic block is a delay (D) flip-flop having a D input connected to the power down line and a clock input connected to the system clock.Type: GrantFiled: February 1, 1999Date of Patent: February 13, 2001Assignee: VLSI Technology, Inc.Inventor: Mark Leonard Buer