Abstract: A system involves LED strings and programmable current source circuits (CSC). An LED current flows through each LED string. Each LED current is controlled by an associated programmable CSC. In one embodiment, the CSCs form a chain. A first CSC uses a reference current for calibration, and thereafter supplies the reference current to the next CSC. When the next CSC detects the reference current, it uses the reference current for calibration. CSCs are calibrated one by one down the chain. In a second embodiment, each CSC can receive the reference current from a common conductor. If the common conductor is detected to be available, then the CSC uses the reference current for calibration. When the conductor is in use, the other CSCs detect the conductor as unavailable and do not attempt to self-calibrate. The CSCs use the reference current one by one, but in an order that changes over time.

Abstract: An average current-mode controlled converter has a buck mode, a boost mode, and a four-switch mode. In one example, the converter operates in one of the three modes, depending on the difference between the converter output voltage VOUT and the converter input voltage VIN. Whether the four-switch mode is a full-time four-switch mode or a partial four-switch mode is user programmable. The novel converter can also be programmed to operate in other ways. For example, the converter can be programmed so that there is no intervening four-switch mode, but rather the converter operates either in a buck or a boost mode depending on VOUT-VIN. The converter can also be programmed so that the converter always operates in a conventional full-time four-switch mode. In one embodiment, the converter is programmed by setting an offset between two internally generated ramp signals and by setting associated limiting and inverting circuits.

Abstract: A plurality of FPGA dice is disposed upon a semiconductor substrate. In order to supply the immense power required by the plurality of FPGA dice, power is routed through the semiconductor substrate vertically from thick metal layers and large integral metal structures located on the other side of the semiconductor substrate. Because the semiconductor substrate has a different coefficient of thermal linear expansion than metal layers in contact with the substrate, delamination may occur when the structure is subject to changes in temperature. To prevent delamination of metal layers connected to the semiconductor substrate and in electrical contact with the integral metal structures, the integral metal structures are manufactured with an array of post portions. During changes in temperature, the post portions of the integral metal structures bend and slide relative to metal layers connected to the semiconductor substrate and prevent linear stresses that may otherwise cause delamination.

Abstract: An ocean wave energy extractor includes a first flotation device that contains a second flotation device and a mechanism for extracting energy. The wave energy extractor floats in seawater and extracts energy from waves. A propagating wave rotates the first flotation device relative to the second flotation device. The mechanism is connected to both flotation devices and generates energy from this relative rotation. In one example, a first flotation device includes a spherical chamber with a flotation collar, and a second flotation device supported by a joint at a center of the chamber. A wave approaching from any direction rotates the first flotation device relative to the second flotation device, and a mechanism for extracting energy generates electrical energy from the relative rotation. The chamber shields inner components from seawater and adverse ocean conditions. The wave energy extractor need not be moored to a location to extract energy from waves.

Abstract: A conforming heat dissipating structure transfers heat to an irregular surface from a heat source mounted on its bottom surface. The heat dissipating structure includes an open container filled with metal shavings and balls covered by a flexible retainer. The shavings and balls beneath the flexible retainer are pressed against the irregular surface and conform to its irregular shape. In one application, light emitting diodes are mounted to the bottom of the heat dissipating structure, and the shavings are compressed against the inside cover of a street light. A flexible heat rod enables heat to be transferred over a flexible path from a heat source on one heat dissipating structure to a heat sink pressed against another heat dissipating structure. The many strands that make up the flexible heat rod are spread out inside each open container and are pressed between the metallic shavings to achieve a good thermal contact.

Abstract: A self-oscillating flyback converter includes a controller integrated circuit housed in a 3-pin package. A switch control terminal is coupled to the base of an inductor switch that controls the current through a primary inductor of the converter. The controller IC adjusts the on time of the switch such that output current remains constant in constant current mode and output voltage remains constant in constant voltage mode. A signal received on a switch control terminal turns the switch off and provides an indication of the output current when the switch is on. A signal received on a feedback terminal powers the controller IC and provides an indication of the output voltage when the switch is off. The controller IC is grounded through a ground terminal. The flyback converter transitions from critical conduction mode to discontinuous conduction mode at light loads to prevent its efficiency from deteriorating at high switching frequencies.

Abstract: A bridge connector made of PCB material has a first plurality of press-fit pins on one portion of the bridge connector and a second plurality of press-fit pins on another portion of the bridge connector. Within the connector is a set of signal conductors. Each conductor connects a press-fit pin of the first plurality of press-fit pins to a corresponding press-fit pin of the second plurality of press-fit pins. When the connector is attached to a printed circuit board (PCB), the press-fit pins extend into and engage corresponding plated through holes in the PCB. The press-fit pins exert enough retention force to mechanically couple two PCB frame sections. The PCB frame sections are electrically connected through the press-fit pins and corresponding signal conductors of the bridge connector. A bridge connector attached at each corner of an infrared touch sensor frame assembly allows the assembly to be solidly assembled from four sections of PCB: a top, bottom, left, and right PCB frame section.

Abstract: An integrated circuit (IC) and fabrication method thereof is provided that include the steps of specifying a plurality of required tile modules suitable for a particular end application, each of the modular tiles being configured to perform a predetermined function and constructed to have approximately the same length and width dimensions. The modular tiles are used to form the IC in a standard IC fabrication process. In many implementations, physical layout of the IC does not include the step of routing. Capabilities also include configuring the modular tiles to have programmable performance parameters and configuring the modular tiles to cooperate usefully with one another based on a programmable parameter.

Abstract: An integrated circuit (IC) and fabrication method thereof is provided that include the steps of specifying a plurality of required tile modules suitable for a particular end application, each of the modular tiles being configured to perform a predetermined function and constructed to have approximately the same length and width dimensions. The modular tiles are used to form the IC in a standard IC fabrication process. In many implementations, physical layout of the IC does not include the step of routing. Capabilities also include configuring the modular tiles to have programmable performance parameters and configuring the modular tiles to cooperate usefully with one another based on a programmable parameter.

Abstract: A programmable digital black level calibration circuit comprises a combining circuit, a digital programmable gain amplifier (PGA), and a black level feedback circuit. The combining circuit combines a digital image signal for optical black (OB) pixels and a feedback signal and outputs a digital PGA input signal. The PGA amplifies the digital PGA input signal by a PGA gain value and outputs a digital PGA output signal. The black level feedback circuit receives the digital PGA output signal and a target black level and in response outputs the feedback signal such that a black level of the OB pixels is calibrated with respect to the target black level. The programmable digital black level calibration circuit calibrates the black level in pure digital domain using signed data buses. The target black level is adjustable to a desired positive or negative value independent from the PGA gain value.

Abstract: A system involves a plurality of RF-enabled occupancy detectors. Each occupancy detector communicates with and controls an associated plurality of RF-enabled fluorescent lamp starter units. A network master has an RF transceiver used to communicate with the occupancy detectors using a first protocol, thereby retrieving status information from the starter units. The network master also has a second RF transceiver for communicating directly with a cellular telephone using a second protocol. A user can use the cellular telephone to control and interact with the lighting system through the network master, and/or to retrieve status information from the network master. The network master automatically generates and sends email alerts to the user by sending the alerts to an email server. The email server forwards the emails to the cellular telephone via a cellular telephone network. Alerts may, for example, indicate a low battery voltage condition or that a lamp needs replacement.

Abstract: A cord correction circuit in a primary-side-controlled flyback converter compensates for the loss of output voltage caused by the resistance of the charger cord. In one embodiment, a correction voltage is subtracted from a feedback voltage received from a primary-side auxiliary inductor. A pre-amplifier then compares a reference voltage to the corrected feedback voltage. In another embodiment, the correction voltage is summed with the reference voltage, and the pre-amplifier compares the feedback voltage to the corrected reference voltage. The difference between the voltages on the input leads of the pre-amplifier is used to increase the output voltage to compensate for the voltage lost through the charger cord. The flyback converter also has a comparing circuit and a control loop that maintain the peak level of current flowing through the primary inductor of the converter. Adjusting the frequency and pulse width of an inductor switch signal controls the converter output current.

Abstract: An electrostatic discharge (ESD) transistor structure includes a self-aligned outrigger less than 0.4 microns from a gate electrode that is 50 microns wide. The outrigger is fabricated on ordinary logic transistors of an integrated circuit without severely affecting the performance of the transistors. The outrigger is used as an implant blocking structure to form first and second drain regions on either side of a lightly doped region that underlies the outrigger. The self-aligned outrigger and the lightly doped region beneath it are used to move the location of avalanche breakdown upon an ESD event away from the channel region. Durability is extended when fewer “hot carrier” electrons accumulate in the gate oxide. A current of at least 100 milliamperes can flow into the drain and then through the ESD transistor structure for a period of more than 30 seconds without causing a catastrophic failure of the ESD transistor structure.

Abstract: A flyback converter includes a controller integrated circuit (IC) housed in an IC package with only three terminals. The controller IC is grounded through a ground terminal. A feedback signal is received onto a power terminal. The feedback signal powers the controller IC and is derived from a voltage across an auxiliary inductor of the flyback converter. A switch terminal is coupled to an inductor switch that is turned on by a switch control signal having a frequency and a pulse width. The inductor switch controls the current that flows through a primary inductor of the flyback converter. A switch signal is received onto the switch terminal and is used to generate the inductor switch control signal. The controller IC adjusts the frequency in a constant current mode such that output current remains constant and adjusts the pulse width in a constant voltage mode such that output voltage remains constant.

Abstract: A method involves detecting an inrush current that flows out of a USB port of a first electronic device when a central processing unit (CPU) of the first electronic device is not being powered. The inrush current is detected by a novel inrush current detect circuit when a second electronic device is connected to the USB port. In one example, the first electronic device is a laptop computer having a battery and a USB DC-to-DC converter. The inrush current detect circuit enables the USB DC-to-DC converter such that the USB DC-to-DC converter receives power from the battery and supplies a regulated voltage to the second electronic device through the USB port while the CPU remains unpowered (not drawing power from the battery).

Abstract: A driver circuit (for example, in a switching power supply or in a Class-D switching amplifier) drives a gate of a switch during a transition with a low output impedance during an initial period and then for the remainder of the transition drives the gate with a midrange output impedance. The switch in turn switches current flow through an inductor. The driver circuit includes a “Drive Node Voltage Dependent Impedance Circuit” (DNVDIC) that couples the gate to a supply voltage node. In one embodiment, there are two resistive current paths through the DNVDIC. A non-linear device in the first current path switches from having a small to a large impedance when a voltage drop across the device falls below a threshold voltage. The resulting increase in impedance of the first current path decreases voltage edge rates and reduces noise, whereas the low initial impedance reduces transition power losses.

Abstract: A programmable analog tile integrated circuit programming tool communicates a power management control characteristic query soliciting control requirement information for a novel power management integrated circuit (PMIC) tile in a multi-tile power management integrated circuit (MTPMIC). The programming tool receives a user response to the query indicating control requirements across a network. The novel PMIC tiles have a pre-defined physical structure including all memory structures required for configuration of each tile and a bus portion. When combined in a multi-tile power management integrated circuit (MTPMIC), the bus portions of the selected tiles automatically form a standardized bus that accommodates all signal communication required for a functioning MTPMIC. The memory structure of each tile is individually addressable via the standardized bus. Thus, in response to control requirements, the programming tool programs a PMIC tile that is part of a MTPMIC to meet the control requirements.

Abstract: In a first aspect, in a Primary Side Regulation (PSR) power supply, some primary current pulses are used to forward bias an output diode such that an auxiliary winding voltage can be properly sampled after each pulse. The samples are used to regulate the power supply output voltage (VOUT). Other primary current pulses, however, are of a smaller peak amplitude. These pulses are not used for VOUT regulation, but rather are used to determine whether the VOUT has dropped. In a second aspect, a transient current detector circuit within the PSR controller integrated circuit detects whether an optocoupler current has dropped in a predetermined way. If the TRS current detector detects that the optocoupler current has dropped, then the power supply stops operating in a sleep mode and is made to operate in another higher power operating mode in which the power supply switches.

Abstract: A memory controller mechanism is operable in a first mode and a second mode. In the first mode, a first memory controller portion of the mechanism can use a first set of data terminals to perform a first external bus access operation (EBAO) and a second memory controller portion of the mechanism can use a second set of data terminals to perform a second EBAO. The first and second EBAO operations may be narrow accesses that occur simultaneously. In the second mode, one of the controllers can use both the first and second sets of data terminals to perform a wider third EBAO. The memory controller mechanism can dynamically switch between first mode and second mode operation. In situations in which one of the sets of data terminals would not otherwise be used, performing wide accesses in the second mode using the one set of data terminals improves bus utilization.

Abstract: An electrostatic discharge (ESD) transistor structure includes a self-aligned outrigger less than 0.4 microns from a gate electrode that is 50 microns wide. The outrigger is fabricated on ordinary logic transistors of an integrated circuit without severely affecting the performance of the transistors. The outrigger is used as an implant blocking structure to form first and second drain regions on either side of a lightly doped region that underlies the outrigger. The self-aligned outrigger and the lightly doped region beneath it are used to move the location of avalanche breakdown upon an ESD event away from the channel region. Durability is extended when fewer “hot carrier” electrons accumulate in the gate oxide. A current of at least 100 milliamperes can flow into the drain and then through the ESD transistor structure for a period of more than 30 seconds without causing a catastrophic failure of the ESD transistor structure.