Abstract: A multiple-layer signal conductor has increased surface area for mitigation of skin effect. Parallel extending elongated strips of conductive material are placed in parallel layers and are separated by a thin layer of dielectric. The elongated strips are conductively connected to one another by regularly spaced vias such that a single signal conductor with multiple conductive layers is formed. During high-speed signaling, the skin effect causes current to concentrate near the surfaces of conductors. The multiple-layer signal conductor, however, has increased surface area with respect to its total cross-sectional area. The effective cross-sectional area which is conductive during high-speed signaling is therefore increased, leading to positive effects on transmission line resistance, heating, signal integrity and signal propagation delay.

Abstract: A flyback AC/DC switching converter has a constant voltage (CV) mode. The CV mode has sub-modes. In one sub-mode (“mid output power sub-mode”), the output voltage (VOUT) of the converter is regulated using both pulse width modulation and pulse frequency modulation. Both types of modulation are used simultaneously. In a second sub-mode (“low output power sub-mode”), VOUT is regulated using pulse width modulation, but the converter switching frequency is fixed at a first frequency. By setting the first frequency at a frequency above the frequency limit of human hearing, an undesirable audible transformer humming that might otherwise occur is avoided. In some embodiments, the converter has a third sub-mode (“high output power sub-mode”), in which pulse width modulation is used but the switching frequency is fixed at a second frequency. By proper setting of the second frequency, undesirable EMI radiation and other problems that might otherwise occur are avoided.

Abstract: A primary-side regulation (PSR) controller integrated circuit includes a PSR CC/CV controller and a non-volatile shift register. An assembled power supply that includes the integrated circuit is in-circuit tested to determine errors in power supply output voltage and/or current. Programming information is determined and shifted into the shift register. During programming, the power supply regulates to a different output voltage, and the different voltage is used for shift register programming. After programming, the power supply operates in a normal mode so that the output voltage and current are within specification. The voltage and current to which the power supply regulates are set by some of the bits of the programming information.

Abstract: A lower-cost and more precise control methodology of regulating the output voltage of a flyback converter from the primary side is provided, which works accurately in either continuous voltage mode (CCM) and discontinuous mode (DCM), and can be applied to most small, medium and high power applications such cell phone chargers, power management in desktop computers and networking equipment, and, generally, to a wide spectrum of power management applications. Two highly integrated semiconductor chips based on this control methodology are also described that require very few components to build a constant voltage flyback converter.

Abstract: The infrared LED of an IrDA module transmits IR energy with a peak wavelength (for example, 875 nm) appropriate for IrDA communication. This peak wavelength is lower than is the wavelength (for example, 940 nm) used in ordinary IR remote controls (RC). The IrDA LED does, however, transmit some energy at the wavelength of the peak sensitivity of an RC receiver. When making an IrDA transmission, the IrDA LED is driven with a lower amount of current. When making an RC transmission, the IrDA LED is driven with an increased amount of current such that higher wavelength emissions received by the RC receiver are of adequate power to realize RC communication. A passive circuit is disclosed for automatically increasing IrDA LED current during RC transmissions. The circuit involves an inductor that shunts current around a current-limiting resistor used to limit LED drive current.

Abstract: A comparing circuit and a control loop are used to maintain the peak level of current flowing through an inductor of a flyback converter. An inductor switch control signal controls an inductor switch through which the inductor current flows. The inductor current increases at a ramp-up rate during a ramp time and stops increasing at the end of the ramp time. The comparing circuit generates a timing signal that indicates a target time at which the inductor current would reach a predetermined current limit if the inductor current continued to increase at the ramp-up rate. The control loop then receives the timing signal and compares the target time to the end of the ramp time. The pulse width of the inductor switch control signal is increased when the target time occurs after the end of the ramp time. Adjusting the pulse width controls the peak of the inductor current.

Abstract: A digital camera has output ports that are connectable by cables to an HDTV television. The camera generates a slide show viewable on the television screen. The slide show involves a sequence of images stored on the camera and audio stored on the camera. The slide show is supplied to the television in the form of an HDTV resolution video stream and an accompanying audio stream. A user selects one of a plurality of scenarios for the slide show. The particular scenario determines how identified images will be presented. Using camera buttons, the user can stop and start the slide show and can move a pointer on the television screen. A standard EVJ file that defines the slide show in accordance with a scenario is generated by the camera. The file can be played on any rendering device that supports the EVJ functionality so as to recreate the slide show.

Abstract: A plurality of FPGA dice is disposed upon a semiconductor substrate. In order both to connect thousands of signal interconnect lines between the plurality of FPGA dice and to supply the immense power required, it is desired that the substrate construction include two different portions, each manufactured using incompatible processes. The first portion is a signal interconnect structure containing a thin conductor layers portion characterized as having a plurality of thin, fine-pitch conductors. The second portion is a power connection structure that includes thick conductors and vertical through-holes. The through-holes contain conductive material and supply power to the FPGA dice from power bus bars located at the other side of the semiconductor substrate. The portions are joined at the wafer level by polishing the wafer surfaces within a few atoms of flatness and subsequent cleaning. The portions are then fusion bonded together or combined using an adhesive material.

Abstract: An air freshener device comprises one or more planar elements that can move relative to a base, where each planar element is connected to the base by a flexible connector, and where each planar element releases a fragrance. The planar elements and the flexible connectors are disposed in a plane. The planar elements may be made of an inexpensive paper material and may bear images or text. The air freshener device imparts fragrance to an area and has moving parts that entertain viewers and also attract the attention of viewers. When mounted in an automobile, for example, the device can entertain child or adult passengers. The device can also convey a statement, using images or text, to drivers of nearby automobiles, who will notice the device because of its motion.

Abstract: An electrostatic discharge (ESD) transistor structure includes a self-aligned outrigger less than 0.4 microns from a gate electrode that is 50 microns wide. The outrigger is fabricated on ordinary logic transistors of an integrated circuit without severely affecting the performance of the transistors. The outrigger is used as an implant blocking structure to form first and second drain regions on either side of a lightly doped region that underlies the outrigger. The self-aligned outrigger and the lightly doped region beneath it are used to move the location of avalanche breakdown upon an ESD event away from the channel region. Durability is extended when fewer “hot carrier” electrons accumulate in the gate oxide. A current of at least 100 milliamperes can flow into the drain and then through the ESD transistor structure for a period of more than 30 seconds without causing a catastrophic failure of the ESD transistor structure.

Abstract: A clock input filter uses a first programmable low-pass delay element to filter during a low period of an input clock signal and to output a SET signal. The clock input filter uses a second programmable low-pass delay element to filter during a high period of the input clock signal and to output a RESET signal. A latch is set and reset by the SET and RESET signals. The latch outputs a filtered version of the input signal that has the same approximate duty cycle as the input signal. A pair of gates generates a corresponding pair of duty cycle adjusted versions of the input signal. Output multiplexing circuitry is provided to output either the output of the latch, or an increased duty cycle version of the input signal, or a decreased duty cycle version of the input signal, or an unfiltered version of the input signal.

Abstract: A flyback converter includes a controller integrated circuit (IC) housed in an IC package with only three terminals. An inexpensive TO-92 transistor package can be used. A switch terminal is coupled to an inductor switch that is turned on by a switch control signal having a frequency and a pulse width. The inductor switch controls the current that flows through a primary inductor of the flyback converter. The controller IC adjusts the frequency in a constant current mode such that output current remains constant and adjusts the pulse width in a constant voltage mode such that output voltage remains constant. A power terminal receives a feedback signal that is derived from a voltage across an auxiliary inductor of the flyback converter. The feedback signal provides power to the controller IC and is also used to generate the switch control signal. The controller IC is grounded through a ground terminal.

Abstract: A comparing circuit and a control loop are used to maintain the peak level of current flowing through an inductor of a flyback converter. An inductor switch control signal controls an inductor switch through which the inductor current flows. The inductor current increases at a ramp-up rate during a ramp time and stops increasing at the end of the ramp time. The comparing circuit generates a timing signal that indicates a target time at which the inductor current would reach a predetermined current limit if the inductor current continued to increase at the ramp-up rate. The control loop then receives the timing signal and compares the target time to the end of the ramp time. The pulse width of the inductor switch control signal is increased when the target time occurs after the end of the ramp time. Adjusting the pulse width controls the peak of the inductor current.

Abstract: A method of constructing an integrated circuit involves selecting modular tiles and then generating a functional circuit layout using the tiles. Modular tiles that perform predetermined functions and that have approximately the same length and width dimensions are selected from a library of validated tiles. The tiles have input-output terminals embedded in their upper active layers. A functional circuit layout for the integrated circuit is generated using the tiles. In many implementations, the physical layout of the integrated circuit does not include the step of routing. Then an interconnect layer is added over the functional circuitry of the tiles and connects the input-output terminals to bond pads located at the perimeter of the functional circuit layout. Chip data corresponding to the functional circuit layout is generated, and then mask reticles corresponding to the chip data are generated. The integrated circuit is formed on a wafer based on the mask reticles.

Abstract: A general purpose BGA security cap includes a substrate, an integrated circuit die, and an array of bond balls. The substrate includes an anti-tamper security mesh of conductors. The bond balls include outer bond balls and inner bond balls that are fixed to the underside of the substrate. The integrated circuit drives and monitors the anti-tamper security mesh and communicates data using a serial physical interface through a subset of the inner bond balls. In one example, a user has circuitry to be protected. The user purchases the BGA security cap and fits it over the circuitry to be protected such that the integrated circuit of the security cap communicates tamper detect condition information via the serial interface to the underlying protected circuitry and causes sensitive information to be erased or a program to be halted in the event of a tamper condition.

Abstract: Clock multiplexing techniques generate an output clock signal by detecting edges of a selected input clock signal and toggling the output clock signal based on detected edges of the selected input clock signal. Toggle signals are generated based on detected edges of the selected input clock signal. Toggle signals are used to control when the output clock signal is to toggle high or low. A latch holds the state of the output clock signal in its current state until changed by receipt of a toggle signal. Switching from use of a first clock signal to use of a second clock signal occurs regardless of whether the first input clock is operating. A delay is introduced that prevents glitches in the output clock signal that are less than one half clock period of the next selected input clock signal in duration.

Abstract: An insulative substrate includes a plurality of flexible retaining clips and a plurality of alignment and retaining pins. A metal leadframe includes a plurality of leads. Each lead terminates in a spring contact beam portion. The leadframe is attached to the substrate (for example, by fitting a hole in each lead over a corresponding alignment and retaining pin and then thermally deforming the pin to hold the lead in place). An integrated circuit is press-fit down through the retaining clips such that pads on the face side of the integrated circuit contact and compress the spring contact beams of the leads. After the press-fit step, the retaining clips hold the integrated circuit in place. The resulting assembly is encapsulated. In a cutting and bending step, the leads are singulated and formed to have a desired shape. The resulting low-cost package involves no wire-bonding and no flip-chip bond bump forming steps.

Abstract: Techniques for near zero light-load supply current in switching power supply are described. In one embodiment, a switching power supply comprises sub-circuits, a capacitor/inverter circuit, and a standby control circuit. The sub-circuits comprise a feedback resistor that supplies a fraction of an output voltage of the power supply, an integrator that provides an integrator output, a comparator that provides a pulse width modulated signal, a switching element that receives the pulse width modulated signal and modulates current such that the power supply provides a regulated voltage, and a monitoring circuit that provides a logic low signal when the pulse width modulated signal is absent over a period of time. The standby control circuit disables the sub-circuits when the logical low signal is detected permitting the switching power supply to operate at a minimum current, an re-enables the sub-circuits when an out of regulation signal from the capacitor/inverter circuit is detected.

Abstract: In a specification mode, a user specifies classes of a class network and process steps of a process hierarchy using a novel scripting language. The classes describe what the user expects to find in digital images. The process hierarchy describes how the digital images are to be analyzed. Each process step includes an algorithm and a domain that specifies the classes on which the algorithm is to operate. A Cognition Program acquires table data that includes pixel values of the digital images, as well as metadata relating to the digital images. In an execution mode, the Cognition Program generates a data network in which pixel values are linked to objects, and objects are categorized as belonging to classes. The process steps, classes and objects are linked to each other in a computer-implemented network structure in a manner that enables the Cognition Program to detect target objects in the digital images.

Abstract: A cord correction circuit in a primary-side-controlled flyback converter compensates for the loss of output voltage caused by the resistance of the charger cord. In one embodiment, a correction voltage is subtracted from a feedback voltage received from a primary-side auxiliary inductor. A pre-amplifier then compares a reference voltage to the corrected feedback voltage. In another embodiment, the correction voltage is summed with the reference voltage, and the pre-amplifier compares the feedback voltage to the corrected reference voltage. The difference between the voltages on the input leads of the pre-amplifier is used to increase the output voltage to compensate for the voltage lost through the charger cord. The flyback converter also has a comparing circuit and a control loop that maintain the peak level of current flowing through the primary inductor of the converter. Adjusting the frequency and pulse width of an inductor switch signal controls the converter output current.