Abstract: A power MOSFET is provided that includes a substrate of a first conductivity type. An epitaxial layer also of the first conductivity type is deposited on the substrate. First and second body regions are located in the epitaxial layer and define a drift region between them. The body regions have a second conductivity type. First and second source regions of the first conductivity type are respectively located in the first and second body regions. A plurality of trenches are located below the body regions in the drift region of the epitaxial layer. The trenches, which extend toward the substrate from the first and second body regions, are filled with a material that includes a dopant of the second conductivity type. The dopant is diffused from the trenches into portions of the epitaxial layer adjacent the trenches.

Abstract: A lightweight cathode ray tube is formed by reducing a cross-sectional area on the apeture grill tapes in the aperture grill. One exemplary embodiment of the reduced cross-sectional area aperture grill tape includes a central longitudinal channel in a side of the aperture grill tape that faces away from the screen. The reduction in cross-sectional area reduces a linear density of the tape thereby decreasing the tension required by the frame. As each of the aperture grill tapes includes this central longitudinal channel, the weight of the overall aperture grill is significantly reduced and the aperture grill frame weight is reduced due to the lower aperture grill tension. A method for producing the reduced cross-sectional area aperture grill tape is possible without significantly increasing the cost of manufacturing the aperture grill tape.

Abstract: A method and apparatus to configure, provision and control a set-top terminal using a wireless web appliance is provided where a wireless communications path is established between the wireless web appliance and the set-top terminal. The set-top terminal is arranged to communicate with a headend controller over a bi-directional communication link having both upstream and downstream communication paths. A configuration change is implemented in response to an unsolicited message that is generated by the set-top terminal and received by the headend controller over the upstream communications path. The configuration change is implemented at the headend, or at the set-top terminal by downloading configuration data from the headend controller over the downstream communication path. The set-top terminal transmits the unsolicited message in response to a control signal generated by the wireless web appliance that is received over the wireless communications path.

Abstract: A heat transfer device has first and second elongated, articulated segments, each having a turbulence-inducing exterior surface. A flexible joint connects the first and second elongated, articulated segments. An inner coaxial lumen is disposed within the first and second elongated, articulated segments. The inner coaxial lumen is capable of transporting a pressurized working fluid to a distal end of the first elongated, articulated segment.

Abstract: A catheter system and method are provided which change the temperature of a fluid, such as blood, by heat transfer. Selective cooling or heating of an organ may be performed by changing the temperature of the blood feeding the organ. The catheter system includes an inlet lumen and an outlet lumen structured and arranged to carry a working fluid having a temperature different from the adjacent blood. The outlet lumen is configured to induce turbulence in the adjacent fluid passing adjacent the outlet lumen.

Abstract: A trench MOSFET device comprising: (a) a silicon substrate of a first conductivity type (preferably N-type conductivity); (b) a silicon epitaxial layer of the first conductivity type over the substrate, the epitaxial layer having a lower majority carrier concentration than the substrate; (c) a body region of a second conductivity type (preferably P-type conductivity) within an upper portion of the epitaxial layer; (d) a trench having trench sidewalls and a trench bottom, which extends into the epitaxial layer from an upper surface of the epitaxial layer and through the body region of the device; (f) an oxide region lining the trench, which comprises a lower segment covering at least the trench bottom and upper segments covering at least upper regions of the trench sidewalls; (g) a conductive region within the trench adjacent the oxide region; and (h) a source region of the first conductivity type within an upper portion of the body region and adjacent the trench.

Abstract: A power MOSFET is provided that includes a substrate of a first conductivity type. An epitaxial layer also of the first conductivity type is deposited on the substrate. First and second body regions are located in the epitaxial layer and define a drift region between them. The body regions have a second conductivity type. First and second source regions of the first conductivity type are respectively located in the first and second body regions. A plurality of trenches are located below the body regions in the drift region of the epitaxial layer. The trenches, which extend toward the substrate from the first and second body regions, are filled with a thin oxide layer and a polycrystalline semiconductor material (e.g., polysilicon) that includes a dopant of the second conductivity type.

Abstract: A receiver is provided for an information system that provides selected information to individual users. A high speed digital program signal is broadcast and contains program data that begins at a reference time and is repeated at set intervals. An index signal that contains the receiver's identifier associated with the reference time and interval information is also broadcast. The receiver monitors the index signal for its identifier. When the receiver detects its identifier, the receiver downloads the time and tuning information. The receiver then uses the time and tuning information to receive, download, and store the user's selected program. In some embodiments a transceiver replaces the receiver to allow the user to make remote program requests.

Abstract: A trench DMOS transistor device that comprises: (a) a substrate of a first conductivity type; (b) an epitaxial layer of first conductivity type over the substrate, wherein the epitaxial layer has a lower majority carrier concentration than the substrate; (c) a trench extending into the epitaxial layer from an upper surface of the epitaxial layer; (d) an insulating layer lining at least a portion of the trench; (e) a conductive region within the trench adjacent the insulating layer; (f) a body region of a second conductivity type provided within an upper portion of the epitaxial layer and adjacent the trench; (g) a source region of first conductivity type within an upper portion of the body region and adjacent the trench; and (h) one or more low resistivity deep regions extending into the device from an upper surface of the epitaxial layer. The low resistivity deep region acts to provide electrical contact with the substrate, which is a common drain region for the device.

Abstract: A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first or second conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one trench in the epitaxial layer. A barrier material is deposited along the walls of the trench. A dopant of a second conductivity type is implanted through the barrier material into a portion of the epitaxial layer adjacent to and beneath the bottom of the trench. The dopant is diffused to form a first doped layer in the epitaxial layer and the barrier material is removed from at least the bottom of the trench. The trench is etched through the first doped layer. A second doped layer is formed in the same manner as the first doped layer. The second doped layer is located vertically below the first doped layer.

Abstract: A trench DMOS transistor having overvoltage protection includes a substrate of a first conductivity type and a body region of a second conductivity type formed over the substrate. At least one trench extends through the body region and the substrate. An insulating layer lines the trench and overlies the body region. A conductive electrode is deposited in the trench so that it overlies the insulating layer. A source region of the first conductivity type is formed in the body region adjacent to the trench. An undoped polysilicon layer overlies a portion of the insulating layer. A plurality of cathode regions of the first conductivity type are formed in the undoped polysilicon layer. At least one anode region is in contact with adjacent ones of the plurality of cathode regions.

Abstract: A method and apparatus is provided for heating or cooling at least a selected portion of a patient's body. The method begins by inserting a catheter through the urethra and into the bladder of the patient. A heated or chilled fluid is conducted through a supply lumen of the catheter and into the bladder. The fluid is evacuated from the bladder through a return lumen of the catheter. Finally, a quantity of urine is monitored which flows out of the bladder and through the return lumen of the catheter. The rate of fluid flowing through the supply lumen of the catheter may be adjusted in a manner that is based at least in part on the monitored quantity of urine flowing out of the bladder.

Abstract: A catheter system and method are provided which change the temperature of a fluid, such as blood, by heat transfer. Selective cooling or heating of an organ may be performed by changing the temperature of the blood feeding the organ. The catheter system includes an inlet lumen and an outlet lumen structured and arranged to carry a working fluid having a temperature different from the adjacent blood. The outlet lumen is configured to induce turbulence in the adjacent fluid passing adjacent the outlet lumen.

Abstract: When performing supply and measurement of various signals on n=8 semiconductor IC devices under test DUT1-DUT8 using m=3 substrates 10-30, reference voltages of the devices under test DUT1-DUT3 are input to the substrate 10, reference voltages of the devices under test DUT4-DUT6 are input to the substrate 20, and reference voltages of the devices under test DUT7 and 8 are input to the substrate 30. The reference voltages input to each substrate 10-30 are averaged. The mean voltages made in each substrate are further connected to each other, and a reference voltage is made using three substrates 10-30. The reference voltage is used as a reference voltage for voltage generating circuits 11-31. The reference voltage having no variation among each substrate is set even if the number of semiconductor IC devices under test is increased and the whole equipment becomes large.

Abstract: A method for making trench DMOS is provided that utilizes polycide and refractory techniques to make trench DMOS which exhibit low gate resistance, low gate capacitance, reduced distributed RC gate propagation delay, and improved switching speeds for high frequency applications.

Abstract: A power MOSFET is provided that includes a substrate of a first conductivity type. An epitaxial layer also of the first conductivity type is deposited on the substrate. First and second body regions are located in the epitaxial layer and define a drift region between them. The body regions have a second conductivity type. First and second source regions of the first conductivity type are respectively located in the first and second body regions. A plurality of trenches are located below the body regions in the drift region of the epitaxial layer. The trenches, which extend toward the substrate from the first and second body regions, are filled with an epitaxially layered material that includes a dopant of the second conductivity type. The dopant is diffused from the trenches into portions of the epitaxial layer adjacent the trenches.

Abstract: A depression in the windings of a horizontal coil at a predetermined location in a deflection yoke of a cathode ray tube corrects for multiple types of mis-convergence. In particular, the depression in the windings is disposed in a “neck” portion of the deflection yoke, which incorporates a horizontal deflection coil disposed on a saddle type mold die. A deflection yoke for deflecting electron beams of a color CRT includes a horizontal deflection coil disposed on a saddle type mold die that has a funnel section and a neck section connected along a horizontal axis parallel to the centerline of the deflection yoke. A portion of the neck section of the deflection yoke includes an offset relative to the profile (relative to the horizontal axis) of the windings of the horizontal coil that creates a depressed area in the windings of the horizontal deflection coil.

Abstract: A high gain wide-band width RF amplifier 120 with automatic bias supply regulation. The load supply is actively adjusted in response to the amplifier's output signal level. At small output signals effective load supply voltage is minimum and at larger output signals the effective load supply voltages is maximized. The amplifier 120 includes a differential pair of field effect transistors (FETs) 102, 104 connected at common source connection 106 and biased by current bias FET 108 which is connected between common source connection 106 and amplifier signal input RFIN. A bias voltage (VB1) is applied to the gate of bias device 108 and an automatic gain control voltage (VAGC) is applied to the gates of differential FET pair 102, 104. The automatic bias supply circuit 122 is an active load and includes resistors 124, 126, capacitor 128 and a differential amplifier 130. Capacitor 128 is connected between the negative input 132 and the output 134 of differential amplifier 130.

Abstract: A method for making trench DMOS is provided that improves the breakdown voltage of the oxide layer in a device having at least a first trench disposed in the active region of the device and a second trench disposed in the termination region of the device. In accordance with the method, mask techniques are used to thicken the oxide layer in the vicinity of the top corner of the second trench, thereby compensating for the thinning of this region (and the accompanying reduction in breakdown voltage) that occurs due to the two-dimensional oxidation during the manufacturing process.

Abstract: A merged device is that comprises a plurality of MOSFET cells and a plurality of Schottky rectifier cells, as well as a method of designing and making the same. According to an embodiment of the invention, the MOSFET cells comprise: (a) a source region of first conductivity type formed within an upper portion of a semiconductor region, (b) a body region of second conductivity type formed within a middle portion of the semiconductor region, (c) a drain region of first conductivity type formed within a lower portion of the semiconductor region, and (d) a gate region provided adjacent the source region, the body region, and the drain region. The Schottky diode cells in this embodiment are disposed within a trench network and comprise a conductor portion in Schottky rectifying contact with the lower portion of the semiconductor region. At least one MOSFET cell gate region is positioned along a sidewall of the trench network and adjacent at least one Schottky diode cell in this embodiment.