Abstract: A system and method for producing thin, uniform powder phosphors for field emission display screens features a planarization of the phosphor powder layer. That planarization is accomplished by placing the deposited phosphor layer in an anode plate between two optical flats, which are then mounted within a mechanical press.

Abstract: A field emission cathode for use in flat panel displays is disclosed comprising a layer of conductive material and a layer of amorphic diamond film, functioning as a low effective work-function material, deposited over the conductive material to form emission sites. The emission sites each contain at least two sub-regions having differing electron affinities. Use of the cathode to form a computer screen is also disclosed along with the use of the cathode to form a fluorescent light source.

Abstract: An efficient multiprocessor address transfer mechanism is utilized within a data processing system including a plurality of bus devices. The present invention places control of the flow of address bus operations within the system controller rather than the bus devices, e.g., a master processor. The system controller issues an address bus grant, in response to an address bus request from a particular bus device, and shortly after that issues another signal notifying the granted bus device that it must now disable the address bus. Furthermore, upon receipt of the signal indicating disablement of the address bus, other bus devices may then snoop, or sample, the address bus.

Abstract: Single hard particles or single point cutting tools having the particles bonded thereto are coated with a modulated or layered composition of transition metal compounds or with titanium compounds to decrease mechanical failure of the particles. Titanium and zirconium nitrides may be used to form the modulated composition. Total thickness of the coatings is in the range from about 0.5 micrometer to about 30 micrometers. Individual layers of varying composition have a thickness in the range from about 0.5 nanometers to about 30 nanometers.

Abstract: A matrix addressable flat panel display includes a flat cathode operable for emitting electrons to an anode when an electric field is produced across the surface of the flat cathode by two electrodes placed on each side of the flat cathode. The flat cathode may consist of a cermet or amorphic diamond or some other combination of a conducting material and an insulating material such as a low effective work function material. The electric field produced causes electrons to hop on the surface of the cathode at the conducting-insulating interfaces. An electric field produced between the anode and the cathode causes these electrons to bombard a phosphor layer on the anode.

Abstract: A field emission cathode for use in flat panel displays is disclosed comprising a layer of conductive material and a layer of amorphic diamond film, functioning as a low effective work-function material, deposited over the conductive material to form emission sites. The emission sites each contain at least two sub-regions having differing electron affinities. Use of the cathode to form a computer screen is also disclosed along with the use of the cathode to form a fluorescent light source.

Abstract: There is disclosed a central controller for simultaneously testing the embedded arrays in a processor. Test data vectors are serially shifted into a latch and stored into each location in the embedded arrays of the processor. The test data are then read out of the embedded arrays into a read latch and serially shifted into a multiple input shift register, where a polynomial division is performed on the test vector data. If all memory locations in the embedded array function properly, a remainder value will result that is equal to a unique signature remainder for the test vectors used.

Abstract: The present invention facilitates communication of signals from circuitry implemented with a first CMOS technology requiring a first voltage level supply for operation to circuitry implemented with a second CMOS technology requiring a second voltage level supply for operation, wherein the first and second voltage level supplies are not equal. The present invention receives from the circuitry implemented with a first CMOS technology a signal which has a first voltage level that is not acceptable for input into the circuitry implemented with a second CMOS technology. This signal is converted to a second voltage level that is acceptable for input into the circuitry implemented with a second CMOS technology, and then transmitted to the circuitry implemented with a second CMOS technology requiring a second voltage level supply for operation.

Abstract: Within a data processing system implementing L1 and L2 caches and stream filters and buffers, prefetching of cache lines is performed in a progressive manner. In one mode, data may not be prefetched. In a second mode, two cache lines are prefetched wherein one line is prefetched into the L1 cache and the next line is prefetched into a stream buffer. In a third mode, more than two cache lines are prefetched at a time. As a result, additional cache lines are progressively prefetched to a data cache as the sequentiality of the accessing of cache lines in memory is demonstrated through sequential addressing requests along a data stream. Furthermore, the stream is physically distributed. In other words, at least one line, but not all lines, of the stream are placed within the cache.

Abstract: A multiprocessor system utilizing a plurality of bus devices coupled via a shared bus utilizes a specially coded signal to notify a bus device initiating a read or a read with intent to modify operation that the requested data, or cache line, is in a modified state within a cache of another bus device. Unlike the modified response signal, this special signal is sent along with the requested data from the one bus device to the requesting bus device, indicating that this data has priority over any data being sent from the memory system coupled to the shared bus. The present invention allows for cache-to-cache and cache-to-memory-and-cache operations.

Abstract: A system and method is available for fabricating a field emitter device, where in an emitter material, such as copper, is deposited over a resistive layer which has been deposited upon a substrate. Two ion beam sources are utilized. The first ion beam source is directed at a target material, such as molybdenum, for sputtering molybdenum onto the emitter material. The second ion beam source is utilized to etch the emitter material to produce cones or micro-tips. A low work function material, such as amorphous diamond, is then deposited over the micro-tips.

Abstract: In a multiprocessor system having a plurality of bus devices coupled to a storage device via a bus, wherein the plurality of bus devices have a snoop capability, and wherein the plurality of bus devices have first and second caches, and wherein the plurality of bus devices utilize a modified MESI data coherency protocol, the system provides for reading of a data portion from the storage device into one of the plurality of bus devices, wherein the first cache associated with the one of the plurality of bus devices associates a special exclusive state with the data portion, and wherein the second cache associated with the one of the plurality of bus devices associates an exclusive state with the data portion, initiating, by the one of the plurality of bus devices, a write-back operation with respect to the data portion, determining if there are any pending snoops in the second cache, and changing the special exclusive state to a modified state if there are no pending snoops in the second cache.

Abstract: A matrix-addressed diode flat panel display of field emission type is described, utilizing a diode (two terminal) pixel structure. The flat panel display comprises a cathode assembly having a plurality of cathodes, each cathode including a layer of cathode conductive material and a layer of a low effective work-function material deposited over the cathode conductive material and an anode assembly having a plurality of anodes, each anode including a layer of anode conductive material and a layer of cathodoluminescent material deposited over the anode conductive material, the anode assembly located proximate the cathode assembly to thereby receive charged particle emissions from the cathode assembly, the cathodoluminescent material emitting light in response to the charged particle emissions.

Abstract: An I/O channel controller implements coherency and synchronization mechanisms, which allow the I/O channel controller to provide fully coherent direct memory access operations on a multiprocessor system bus, without implementing a retry protocol. This is made possible by performing delayed cache invalidates for real-time cache coherency conflicts between processors and I/O devices. Furthermore, I/O DMA writes occur real-time to the memory system and without the traditional Read With Intent to Modify (RWITM) operations. Completion of PIO operations has been coupled to the completion of I/O DMA writes operations in order to provide "seamless" I/O synchronization with respect to processor execution. An IOCC implementation has been described which benefits from those techniques by significantly reducing design complexity.

Abstract: A multiprocessing system utilizes a bus protocol having two response windows. The first response window is at a fixed latency from the transmission of a bus request and/or address, while the second response window, utilized for coherency reporting, is placed a configurable number of clock cycles after the bus request and address to allow for longer access, or snoop, times to perform a cache directory look-up within other bus devices. The first response window reports error or flow control and error status. Furthermore, a method had been described, which implements the reporting of response information in a flexible and high performance manner.

Abstract: A method is provided for fabricating a display cathode which includes forming a conductive line adjacent a face of a substrate. A region of amorphic diamond is formed adjacent a selected portion of the conductive line.

Abstract: A field emission cathode for use in flat panel displays comprises a layer of conductive material and a layer of amorphic diamond film, functioning as a low effective work-function material, deposited over the conductive material to form emission sites. The emission sites each contain at least two sub-regions having differing electron affinities. The cathode may be used to form a computer screen or a fluorescent light source.

Abstract: An apparatus for preventing slippage of the ends of pipes, which may be broken, from within a Dresser-type coupling utilized for mending such breaks. A slip stop ring member is provided for preventing slippage of a washer to the end of the pipe.

Abstract: The present invention utilizes a test circuit for receiving a reference clock signal and a sense clock signal and subsequently determining whether or not the reference and sense clock signals are either correct multiples of each other and/or in phase with each other. The test circuit may be located on the same chip with the microprocessor and the clock circuitry. The clock circuitry may include a phase locked loop ("PLL") circuit for receiving the reference clock signal and producing a sense clock signal for use by the remainder of the chip, wherein the sense clock signal is a multiple of the reference clock signal. The test circuit may count the number of cycles of the sense clock signal occurring within a predetermined amount of time, which may be proportional to the reference clock period. Alternatively, the sense clock signal and the reference clock signal may be passed through an XOR circuit and then the number of cycles counted within a predetermined time period.

Abstract: An assembly of an optical interconnect module adaptable for mating with an optical connector having at least one optical fiber and an alignment pin.