Abstract: A light emitting device that can function as an array element in an expandable array of such devices. The light emitting device comprises a substrate that has a top surface and a plurality of edges. Input and output terminals are mounted to the top surface of the substrate. Both terminals comprise a plurality of contact pads disposed proximate to the edges of the substrate, allowing for easy access to both terminals from multiple edges of the substrate. A lighting element is mounted to the top surface of the substrate. The lighting element is connected between the input and output terminals. The contact pads provide multiple access points to the terminals which allow for greater flexibility in design when the devices are used as array elements in an expandable array.

Abstract: Voltage converter are provided for efficient generation of voltage signals in a load. The converters are formed with a group of inductors and at least two sets of buck and sync transistors that are arranged with the group so that conducted currents through each of the sets are directed through a respective one of the inductors and further directed to magnetically couple induced currents in the respective inductor of at least an associated one of the sets. Efficiency is particularly enhanced with an operational mode that is directed to light load conditions. In this mode and in at least a selected one of the sets, the buck transistor is turned off throughout the operational mode and the sync transistor is turned off for at least the time that an associated buck transistor is turned on in an associated set which couples induced currents in the respective inductor of the selected set.

Abstract: A multiple field plate transistor includes an active region, with a source, a drain, and a gate. A first spacer layer is over the active region between the source and the gate and a second spacer layer over the active region between the drain and the gate. A first field plate on the first spacer layer is connected to the gate. A second field plate on the second spacer layer is connected to the gate. A third spacer layer is on the first spacer layer, the second spacer layer, the first field plate, the gate, and the second field plate, with a third field plate on the third spacer layer and connected to the source. The transistor exhibits a blocking voltage of at least 600 Volts while supporting a current of at least 2 Amps with an on resistance of no more than 5.0 m?-cm2, of at least 600 Volts while supporting a current of at least 3 Amps with an on resistance of no more than 5.3 m?-cm2, of at least 900 Volts while supporting a current of at least 2 Amps with an on resistance of no more than 6.

Abstract: A garment hanger comprises a header card and a clamp, the header card being preferably “free-floating” relative to the clamp to give a prospective purchaser a sense that the clamp is attached more to the garment than to the header card and that the card is thus disposable after purchase. In one embodiment, a hanger for displaying and holding an article such as a pair of gloves comprises a clothespin-like clamp comprising a pair of jaws resiliently biased about a pivot region to a closed, article-holding position, and a header defining an opening for receiving the pivot region of the clamp. Preferably, the opening in the header is larger than the pivot region of the clamp so as to provide for relative movement between the clamp and the header.

Abstract: Operational amplifier embodiments are provided to enhance amplifier parameters such as bandwidth, stability, and headroom. In an amplifier embodiment, transistor followers are arranged with first and second differential pairs to facilitate selective positioning of first and second transfer function poles to enhance bandwidth and resistors and inductors are arranged to facilitate selective positioning of complex third transfer function poles to enhance phase margin. In another amplifier embodiment, the transistor followers are arranged to reduce headroom limitations to thereby enhance the voltage swing of output signals.

Abstract: A sampling-rate conversion method receives N input channels which have been digitized at an input sampling rate, and converts the sampling rate of each input channel to produce N output channels at an output sampling rate. The method comprises computing a common FIR interpolating function which depends upon the input and output sample clocks and the instantaneous output time, and applying the common FIR interpolating function to all N input channels to compute all N output channels.

Abstract: A high power wireless resonant energy transfer system transfers energy across an airgap.

Abstract: A system for inserting secondary content into programmed primary content includes a first database storing a number of primary content, a second database storing a number of secondary content and a server in communication with the first and second databases. The server is programmed to receive primary content distribution requests and associate the primary content distribution requests with one of a plurality of programmed play lists. The server is also programmed to execute secondary content insertion instructions including secondary content selection instructions and frequency of secondary content distribution instructions to generate an integrated play list comprising the primary content associated with the programmed play list and the secondary content.

Abstract: Clock processors are provided to economically control system and data clocks in high-speed signal converters. The processors generally include at least one of a delay-locked loop, phase-locked loop or a duty cycle stabilizer which generates an error signal in its operation. In the example of a stabilizer, it is configured to respond to an input clock to initiate a first portion of each cycle of the system clock and to include a control loop to provide an error signal that controls a second portion of the cycle to thereby maintain a selected duty cycle. The processors also include a data clock aligner configured to share the error signal and provide a data clock that is delayed by a selected delay from a selected one of the input and system clocks. In addition to providing effective control that is independent of disturbing effects (e.g., temperature and clock rate), the shared use reduces processor costs.

Abstract: Methods for fabricating LED chips from a wafer and devices fabricated using the methods with one method comprising depositing LED epitaxial layers on an LED growth wafer to form a plurality of LEDs on the growth wafer. A single crystalline phosphor is bonded over at least some the plurality of LEDs so that at least some light from the covered LEDs passes through the single crystalline phosphor and is converted. The LED chips can then be singulated from the wafer to provide LED chips each having a portion of said single crystalline phosphor to convert LED light.

Abstract: A circuit substrate has one or more active components and a plurality of passive circuit elements on a first surface. An active semiconductor device has a substrate with layers of material and a plurality of terminals. The active semiconductor device is flip-chip mounted on the circuit substrate and at least one of the terminals of the device is electrically connected to an active component on the circuit substrate. The active components on the substrate and the flip-chip mounted active semiconductor device, in combination with passive circuit elements, form preamplifiers and an output amplifier respectively. In a power switching configuration, the circuit substrate has logic control circuits on a first surface. A semiconductor transistor flip-chip mounted on the circuit substrate is electrically connected to the control circuits on the first surface to thereby control the on and off switching of the flip-chip mounted device.

Abstract: A correlated double sampling circuit and method for providing the same are disclosed. The circuit may include an amplifier, a plurality of capacitors, and a switch matrix. The amplifier provides a reset voltage replica and a signal voltage replica. The switch matrix controls a plurality of switches to perform correlated double sampling over at least three phases. The first phase for sampling the reset voltage replica on a first and second capacitors. The second phase for sampling the reset voltage replica and the kTC noise on a third capacitor. The first phase producing a thermal kTC noise from the first and second capacitors. The third phase for subtracting a charge representing the signal voltage replica, the kTC noise and the reset voltage replica, combined, from the charge sampled in the second phase to provide an output voltage. The method for providing low noise correlated double sampling includes controlling the plurality of switches to provide the at least three phases.

Abstract: The welding of certain polymeric nanofibers can be accomplished by exposure to an intense short burst of light, such as is provided by a camera flash, resulting in an instantaneous melting of the exposed fibers and a welding of the fibers where they are in contact. The preferred nanofibers are composed of conjugated, conducting polymers, and derivatives and polymer blends including such materials. Alternatively, the nanofibers can be composed of colored thermoplastic polymeric fibers or opaque polymers by proper selection of the frequency or frequency range and intensity (power) of the light source. The flash welding process can also be used to weld nanofibers which comprise a blend of polymeric materials where at least one of the materials in the blend used to form the nanofiber is a conductive, conjugated polymer or a suitable colored thermoplastic.

Abstract: The present invention relates to an electrically operated device for generating synthetic smoke and also to a hazard detector tester utilizing such a device. The device comprises a collapsible container provided with vaporisable liquid and a tube, one end of which is immersed in the liquid and the other end of which is provided with an electrical heater for vaporising the liquid in the other end of the tub in order to generate smoke. A peristaltic pump is used to pump the liquid through the tube.

Abstract: Synthesizers are configured with first and second phase-locked loops (PLL's). The first PLL is arranged to include a digitally-controlled oscillator (DCO) and to respond to an input signal to provide a reference signal with a plurality of selectable reference frequencies. The second PLL is arranged to include a voltage-controlled oscillator (VCO) to thereby provide output signals in response to the reference signal. This synthesizer structure is particularly effective when responding to a noisy input signal as may be the case, for example, in wireless communication systems that provide a network clock to transceivers through lengthy optical links.

Abstract: Error amplifier structures are provided to generate an error signal in response to the difference between an input signal (e.g., a feedback current) and a reference signal (e.g., a bias current). Amplifier embodiments generally include a reference generator and a differencing amplifier. In at least one embodiment, the error generator is arranged to generate first and second bias voltages that correspond to the bias current. In at least one embodiment, the differencing amplifier is configured to provide a reference current to an output node in response to the first bias voltage, provide a feedback current to the output node in response to the second bias voltage, and generate an error current in response to a voltage at the output node. The error amplifier structures are suited for use in various systems such as negative switching regulators.

Abstract: A hydrotherapy jet for providing a pulsating water stream comprises a jet body, and a water inlet to allow a stream of water into the body. A water outlet allows the stream to exit the body and a movable ball within the body causes said stream of water to pulsate as it exits the body.

Abstract: A method of making a diode begins by depositing an AlxGa1?xN nucleation layer on a SiC substrate, then depositing an n+ GaN buffer layer, an n? GaN layer, an AlxGa1?xN barrier layer, and an SiO2 dielectric layer. A portion of the dielectric layer is removed and a Schottky metal deposited in the void. The dielectric layer is affixed to the support layer with a metal bonding layer using an Au-Sn utectic wafer bonding process, the substrate is removed using reactive ion etching to expose the n+ layer, selected portions of the n+, n?, and barrier layers are removed to form a mesa diode structure on the dielectric layer over the Schottky metal,; and an ohmic contact is deposited on the n+ layer.