Abstract: Clamp networks are provided to insure successful operation of a variety of electronic circuits that are realized in the form of integrated circuit chips. These networks are especially suited for use in chips in which on-chip circuits generate a voltage to bias the chip substrate relative to the chip ground. The clamp networks are configured to drive a current between the chip ground and the chip substrate whenever the chip substrate begins to rise above the chip ground during turn on of the chip input voltage. The clamp networks thus insure that the chip substrate is properly biased when the input voltage has been established and that the chip, therefore, functions as intended.

Abstract: The surface morphology of an LED light emitting surface is changed by applying processes, such as a reactive ion etch (RIE) process to the light emitting surface. In one embodiment, the changed surface morphology takes the form of a moth-eye surface. The surface morphology created by the RIE process may be emulated using different combinations of non-RIE processes such as grit sanding and deposition of a roughened layer of material or particles followed by dry etching.

Abstract: An imaging system includes a row and column array of active pixels, each having an associated pitch. In response to respective control signals, each pixel outputs a reset level which includes noise components, or a signal level which includes signal and noise components. Multiple column buffers, each having a pitch equal to or less than that of a pixel, convey the outputs of respective pixel columns to a bus line. Each buffer comprises ‘odd’ and ‘even’ S&H/CDS circuits, which process the pixel outputs of odd and even rows, respectively. Each S&H/CDS circuit subtracts pixel reset level from signal level to produce an output in which correlated noise is suppressed. Each column buffer includes a buffer amplifier which conveys the output to the bus line. A gain amplifier separate from the column buffers is coupled to the bus line such that it amplifies the outputs of a multiple column buffers.

Abstract: A three-dimensional detector module for use in detecting annihilation photons generated by positrons emitted from radio-labeled sites within a body is formed from multiple solid state photo-detectors attached to one or more scintillators. Each photo-detector can be attached to a scintillator to form a photo-detector/scintillator combination and multiple photo-detector/scintillator combinations can be arranged in an array. Alternatively, multiple photo-detectors can be attached to the surface of a single scintillator to form an array. Multiple arrays are then stacked to form a photo-detector module. The modules can then be assembled to form a sheet of photo-detector modules. Multiple sheets or multiple modules can then be arranged around a body to detect emissions from radio-labeled sites in the body.

Abstract: Effective control of the common-mode level of amplifiers is obtained through control structures (both closed-loop and open-loop structures) which are directed to various amplifier functions such as the reduction of amplifier loading, accurate sensing of common-mode levels, mitigation of headroom restraints, and proper transistor biasing. This common-mode control is especially useful in multiplying analog-to-digital converters (MDACs) of signal processing systems.

Abstract: Compact top-loaded, fractal monopole antenna system embodiments are provided for multi-band airborne operation over ultrabroadband ranges (e.g., 30 to 2000 MHz). These multi-band embodiments are self-contained, aerodynamic and compact (e.g., blade height less than 9.5 inches) and are power efficient with a low return loss (e.g., less than ?7 dB). System embodiments include a set of impedance-matching circuits configured to substantially match an antenna impedance to a predetermined system impedance over a set of predetermined frequency bands. In an embodiment, at least one impedance-matching circuit includes a chain of selectable air-core inductors which are novelly arranged to improve radiation efficiency and prevent damage to support substrates. In an embodiment, a lowest-frequency one of the impedance-matching circuits is configured to process signals having a maximum wavelength ?max wherein a fractal member is configured with a length that does not exceed ?max/40.

Abstract: A method for diagnosing a fluid includes sensing a property of the fluid and the temperature of the fluid at the time the property is sensed, then determining the status of the fluid from the sensing. The sample volume may be small in comparison to the total fluid volume.

Abstract: An LED made from a wide band gap semiconductor material and having a low resistance p-type confinement layer with a tunnel junction in a wide band gap semiconductor device is disclosed. A dissimilar material is placed at the tunnel junction where the material generates a natural dipole. This natural dipole is used to form a junction having a tunnel width that is smaller than such a width would be without the dissimilar material. A low resistance p-type confinement layer having a tunnel junction in a wide band gap semiconductor device may be fabricated by generating a polarization charge in the junction of the confinement layer, and forming a tunnel width in the junction that is smaller than the width would be without the polarization charge. Tunneling through the tunnel junction in the confinement layer may be enhanced by the addition of impurities within the junction. These impurities may form band gap states in the junction.

Abstract: A RF device such as a tower mounted amplifier (TMA), mast-head amplifier (MHA), or Tower Mounted Boosters (TMB) includes a housing having a plurality of cavities and an input and an output, the input being coupled to the antenna and the output being coupled to a base station. The housing includes a transmission path holding multiple coaxial resonators. The housing further includes multiple receive paths including at least one path having a plurality of cavities, each cavity containing a dielectric resonator. The metallic transmit resonator nearest the antenna input is coupled to the first dielectric resonator via a common resonant wire. The last dielectric resonator in the receive path is coupled to a first metallic resonator of a downstream clean-up filter via another common resonant wire.

Abstract: A switching power converter with a controlled startup mechanism includes a switching stage which provides a voltage Vout at an output node in response to a switching control signal, with the output node adapted for connection to a non-linear load. A feedback network compares a signal which varies with the current conducted by the load (Iload) with a reference signal, and provides the switching control signal so as to maintain Iload at a desired value. A capacitor connected to the output node provides a current Ic to the feedback network which varies with dVout/dt. The feedback network is arranged to limit dVout/dt in response to current Ic when Iload is substantially zero. In this way, large inrush currents or damage that might otherwise occur during startup are avoided.

Abstract: Leather sheet material is made by hydroentangling a web (4) of mixed reclaimed leather fibers and synthetic fibers. The synthetic fibers are meltable bicomponent fibers which are heated prior to entanglement to fuse and form a supporting network for the leather fibers. A sheet of tissue paper (1a) is laid over the surface of the leather fiber web (4) and hydroentanglement jets (16) are directed through the tissue paper into the web.

Abstract: Pipelined converter systems include a plurality of converter stages in which some stages generate and pass a residue signal to a succeeding stage for further conversion. The generation of the residue signal can inject spurious charges into a reference source that is used in the generation. The spurious charges reduce the accuracy of the residue signal and the accuracy of the system. Residue generator embodiments are thereby formed to provide reduction charges to the reference source that are arranged to oppose and reduce the spurious charges. This reduction of spurious charges significantly enhances system accuracy and linearity.

Abstract: A system for applying hair extensions to natural hair growing on the scalp of an individual comprises cylindrical tubes, a threading tool and a crimping tool. The cylindrical tube has a second end opening larger than a first end opening. The threading tool is used to feed scalp hair through the cylindrical tube. The hair extension is then inserted into the second end of the tube and the tube is crushed flat trapping the threaded scalp hair and hair extension within the crushed structure.

Abstract: An amplifier front-end comprises an input node for receiving a common-mode voltage Vcm, a differential transistor pair having first and second inputs and outputs, a capacitor, a reference voltage Vref, an error correction circuit, and a switching network. The switching network charges the capacitor to Vref; couples the capacitor to the differential pair's first input and couples Vref to the pair's second input such that the voltage at both inputs is ˜Vref; and couples the input node to the capacitor's other terminal such that the voltage at the first input is level-shifted to ˜(Vcm+Vref). The error correction circuit—typically an auto-zero circuit—is coupled to the differential pair's outputs and arranged to reduce charge injection error and kT/C noise components that would otherwise be present in the outputs due to the level shift.

Abstract: Signal converter system embodiments are provided to substantially reduce symmetrical and asymmetrical conversion errors. Signal-processing stages of these embodiments may include a signal sampler in addition to successively-arranged signal converters. In system embodiments, injected analog dither signals are initiated in response to a random digital code. They combine with a system's analog input signal and the combined signal is processed down randomly-selected signal-processing paths of the converter system to thereby realize significant improvements in system linearity. Because these linearity improvements are realized by simultaneous processing of the input signal and the injected dither signal, a combined digital code is realized at the system's output. A first portion of this combined digital code corresponds to the analog input signal and a second portion corresponds to the injected analog dither signal.

Abstract: Programmable-gain amplifier systems are provided that are particularly suited for reducing degrading audio effects such as zipper noise. In one embodiment, these systems switchably couple an electronic potentiometer between an amplifier's inverting input terminal and interleaved tap points along a resistor that is coupled to the amplifier's output terminal. This arrangement introduces a number of fine gain steps between the gain steps that are realized with adjacent ones of the interleaved tap points to substantially reduce or eliminate zipper noise in a audio system that processes the system's output signal. The interleaved tap points facilitate efficient operation of the potentiometer during gain changes. They also permit the potentiometer to be effectively bypassed between gain changes so that distortion effects are substantially eliminated.

Abstract: A semiconductor device includes a drift layer of a first conductivity type having a doping concentration and a conduction layer also of the first conductivity type on the drift layer that has a doping concentration greater than the doping concentration of the drift layer. The device also includes a pair of trench structures, each including a trench contact at one end and a region of a second conductivity type opposite the first conductivity type, at another end. Each trench structure extends into and terminates within the conduction layer such that the second-conductivity-type region is within the conduction layer. A first contact structure is on the drift layer opposite the conduction layer while a second contact structure is on the conduction layer.

Abstract: AC-coupled equivalent series resistance (ESR) is introduced into a control circuit to provide additional stability in the feedback control loop. A sub-circuit emulates the effect of a higher value ESR in the output capacitor. The additional ESR in the feedback control loop inserts a zero into the transfer function that describes the circuit response at a desired frequency. The added zero compensates for the effects of unwanted or unavoidable poles in the transfer function, allowing for a greater range of input signal frequencies.