Abstract: A layout structure of bit line sense amplifiers for use in a semiconductor memory device includes first and second bit line sense amplifiers arranged to share and be electrically controlled by a first column selection line signal, and each including a plurality of transistors. In this layout structure, each of the plurality of transistors forming the first bit line sense amplifier is arranged so as not to share an active region with any transistors forming the second bit line sense amplifier.
Abstract: A multifunction tape for a semiconductor package and configured to bond to a device-formed side of a semiconductor substrate having a plurality of devices thereon while performing a process of grinding a side of the semiconductor substrate opposite to the device-formed side and a process of dicing the semiconductor substrate into individual chips with a dicing tape having a UV-curable adhesive layer bonded to the ground side of the semiconductor substrate, the multifunction tape being bonded to the individual chips while the individual chips, separated from each other by the dicing process, are picked up and die-attached and a method of manufacturing a semiconductor device using the same, the multifunction tape including a base film; a UV-curable adhesive layer on one side of the base film; and first and second bonding layers on the adhesive layer.
Abstract: A diffusing film may have a microlens pattern and an embossed pattern on the surface thereof. The diffusing film includes a light entrance plane for receiving incident light, a light exit plane opposite the light entrance plane, the light exit plane for transmitting light, a plurality of microlenses on a surface of the light exit plane of the diffusing film, microlenses of the plurality of microlenses being spaced apart from one another, and a separation plane between the plurality of microlenses, the separation plane having an embossed pattern on a surface thereof.
Type:
Grant
Filed:
March 17, 2011
Date of Patent:
November 13, 2012
Assignee:
Cheil Industries, Inc.
Inventors:
Jin Woo Lee, Gyu Chan Cho, Jong Kwan Kim, Jae Goo Doh
Abstract: A display device includes a display panel on which a pixel electrode and a common electrode are patterned, and a variable resistor configured to vary a common voltage applied to the common electrode. The variable resistor includes a variable resistance control unit configured to control resistances between resistance terminals that are electrically connected to one another.
Abstract: An optical film includes a near-infrared absorbing layer, the near-infrared absorbing layer containing at least one colorant having a maximum absorption wavelength in the range of 900 nm to 1,100 nm, and a transparent copolymer resin containing fine rubber particles.
Type:
Grant
Filed:
June 23, 2010
Date of Patent:
November 6, 2012
Assignee:
Cheil Industries, Inc.
Inventors:
Young Kwon Koo, Byoung Hoo Lee, Kyoung Ku Kang
Abstract: A semiconductor package includes a base substrate, a semiconductor chip mounted on the base substrate and including bonding pads, first and second connection terminals disposed adjacent to the semiconductor chip on the base substrate and electrically connected to the bonding pads, a first ball land disposed on the base substrate and electrically connected to the first connection terminal, a second ball land spaced apart from the connection terminals, the first ball land disposed between the second ball land and at least one of the first and second connection terminals, a first insulating layer covering the first ball land but exposing at least a part of the second ball land, and a first conductive wire extending onto the first insulating layer and connecting the second connection terminal to the second ball land.
Type:
Grant
Filed:
June 4, 2010
Date of Patent:
November 6, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Sang-Gui Jo, Ji-Yong Park, Kwangjin Bae, Soyoung Lim
Abstract: A display driven by a data signal and a light emission signal may be controlled by a control system including a first through fourth controller. The first controller may select a gamma value in accordance with ambient illumination and output a corresponding gamma compensation signal to control a gradation voltage of input image data. The second controller may compare the ambient illumination with a reference value, generate a selection signal in response thereto, and provide changed image data obtained by changing input image data in accordance with the selection signal as the data signal. The third controller may apply a scaling factor to the input image data generated from extracted features related to the input image data and a scale ratio obtained from the extracted features, and output scaled image data as the data signal. The fourth controller may control a pulse width of the emission control signal.
Type:
Grant
Filed:
February 21, 2008
Date of Patent:
November 6, 2012
Assignee:
Samsung Display Co., Ltd.
Inventors:
June-young Song, Young-jong Park, Jang-doo Lee
Abstract: The method of forming a pattern includes forming a first photosensitive layer pattern including a first pattern in a first region of a substrate and a second pattern in a second region of the substrate, by performing a first photolithography process using a photomask having a first mask region and a second mask region. The first pattern is transferred from the first mask region, and the second pattern is transferred from the second mask region. The method further includes forming a second photosensitive layer pattern including a third pattern in the second region of the substrate and a fourth pattern in the first region of the substrate, by performing a second photolithography process using the photomask. The third pattern is transferred from the first mask region, and the fourth pattern is transferred from the second mask region.
Type:
Grant
Filed:
July 30, 2010
Date of Patent:
November 6, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Sang-Yong Yu, Sung-Hyuck Kim, Gi-Sung Yoon
Abstract: An organic light emitting display apparatus and a method of fabricating the same are provided. The organic light emitting display apparatus includes a pixel unit on which an organic light emitting device is formed, a thin film transistor (TFT) electrically connected to the pixel unit and a data line and a scan line electrically connected to the TFT and disposed crossing each other on a substrate. The data line and the scan line are formed in one layer. A bridge that allows one of the data line and the scan line to bypass the other is on an intersection of the data line and the scan line.
Abstract: A chamber-status monitoring apparatus includes a plurality of chambers, a time-division multiplexer configured to receive, via optical fiber probes, optical signals from each chamber, to divide each optical signal into first time slots having a predetermined duration, and to multiplex the first time slots to generate an OTDM signal, a multi-input optical emission spectroscope configured to receive and disperse the OTDM signal according to wavelengths to measure spectrum information, and a controller configured to divide the spectrum information of the dispersed OTDM signal into second time slots with a predetermined time interval therebetween, to classify the second time slots according to the chambers to obtain spectrum information of the optical signals of the individual chambers, and to control endpoint detection in each of the chambers in accordance with the spectrum information of the optical signal of the corresponding chamber.
Type:
Grant
Filed:
August 18, 2010
Date of Patent:
November 6, 2012
Assignee:
Samsung Electronics, Co., Ltd.
Inventors:
Sang-Wuk Park, Woo-Seok Kim, Yong-Jin Kim
Abstract: A micro-optical element includes a support substrate, a micro-optical lens in a cured replication material on a first surface of the support substrate, and an opaque material aligned with and overlapping the micro-optical lens along a vertical direction.
Type:
Grant
Filed:
April 22, 2008
Date of Patent:
November 6, 2012
Assignee:
DigitalOptics Corporation East
Inventors:
William Delaney, Paul Elliott, David Keller, William Hudson Welch, Greg Kintz, Frolian Pobre
Abstract: The fuse circuit includes a first program unit, a second program unit and a sensing circuit. The first and second program units are programmed simultaneously. The first program unit is programmed in a program mode in response to a fuse program signal and outputs a first signal in a sensing mode, such that the first signal increases when the first program unit is programmed. The second program unit is programmed in the program mode in response to the program signal and outputs a second signal in the sensing mode, such that the second signal decreases when the second program unit is programmed. The sensing circuit generates a sensing output signal in response to the first and second signals, such that the sensing output signal indicates whether or not the program units are programmed.
Abstract: An OLED display device includes a substrate, a TFT on the substrate, the TFT including a semiconductor layer, a gate electrode, and source and drain electrodes, a first electrode electrically connected to one of the source and drain electrodes, a pixel defining layer on the substrate, the pixel defining layer exposing the first electrode and having a reversed trapezoidal shape, an emitting layer on the exposed first electrode, and a second electrode on the emitting layer.
Abstract: A sealing filler for an organic light emitting device display includes a siloxane polymer having a surface tension of about 20 dyn/cm or less. The siloxane polymer may be represented by where each of R1 to R10 is independently a non-polar substituent, and n ranges from 20 to 50.
Abstract: A polymer for gap-filling in a semiconductor device, the polymer being prepared by polycondensation of hydrolysates of the compound represented by Formula 1, the compound represented by Formula 2, and one or more compounds represented by Formulae 3 and 4: [RO]3Si—[CH2]n—Si[OR]3??(1) wherein n is from 0 to 2 and each R is independently a C1-C6 alkyl group; [RO]3Si—[CH2]nX??(2) wherein X is a C6-C12 aryl group, n is from 0 to 2, and R is a C1-C6 alkyl group; [RO]3Si—R???(3) wherein R and R? are independently a C1-C6 alkyl group; and [RO]3Si—H??(4) wherein R is a C1-C6 alkyl group.
Type:
Grant
Filed:
March 8, 2010
Date of Patent:
October 30, 2012
Assignee:
Cheil Industries, Inc.
Inventors:
Chang Soo Woo, Hyun Hoo Sung, Jin Hee Bae, Dong Seon Uh, Jong Seob Kim
Abstract: A three-dimensional (3D) image sensor includes a plurality of color pixels, and a plurality of distance measuring pixels. Where the plurality of color pixels and the plurality of distance measuring pixels are arranged in an array, and a group of distance measuring pixels, from among the plurality of distance measuring pixels, are disposed so that a corner of each distance measuring pixel in the group of distance-measuring pixels is adjacent to a corner of an adjacent distance-measuring pixel in the group of distance-measuring pixels. The group of distance measuring pixels is capable of jointly outputting one distance measurement signal.
Type:
Grant
Filed:
September 23, 2009
Date of Patent:
October 30, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Seung-hoon Lee, Eric R. Fossum, Yoon-dong Park, Kyoung-lae Cho, Sung-jae Byun
Abstract: A protective circuit board, including a mounting board and a plurality of lead terminals disposed at one side of the mounting board, wherein the lead terminals include a first terminal in contact with one side surface of the mounting board, and a second terminal bent at an angle with respect to the first terminal.
Abstract: A reliability evaluation system comprises a reliability evaluation circuit and a reliability evaluation control circuit. The reliability evaluation circuit includes a stress device array and a stress voltage generating block configured to receive a control voltage, generate stress voltages generated by using two reference voltages, and apply the stress voltages to the unit devices in a stress mode via first I/O lines according to the control voltage. The stress device array includes the unit devices that are matrix-arrayed. Each of the unit devices has a first terminal connected to one of the first I/O lines and a second terminal connected to one of second I/O lines. The reliability evaluation control circuit is configured to generate the control voltage and the two reference voltages, and test reliability of the unit devices by using the first I/O lines and the second I/O lines.
Type:
Grant
Filed:
March 9, 2010
Date of Patent:
October 23, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Sang-jin Kwon, Jae-hoon Lee, Yong-ha Kang, Jong-won Lee
Abstract: A channel pre-charge method of a nonvolatile memory device including a cell string includes pre-charging a channel of the cell string according to a first word line bias condition and pre-charging the channel of the cell string according to a second word line bias condition, different than the first word line bias condition.
Type:
Grant
Filed:
June 7, 2010
Date of Patent:
October 23, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
ByungKyu Cho, Kwang Soo Seol, Sunghoi Hur, Jungdal Choi
Abstract: A semiconductor memory device includes a plurality of active pillars protruding from a semiconductor substrate, a first gate electrode disposed on at least one sidewall of the active pillar, a first gate insulating layer being disposed between the active pillar and the first gate electrode, a second gate electrode disposed on at least one sidewall of the active pillar over the first gate electrode, a second gate insulating layer being disposed between the active pillar and the second gate electrode, first and second body regions in the active pillar adjacent to respective first and second respective electrodes, and first through third source/drain regions in the active pillar arranged alternately with the first and second body regions.
Type:
Grant
Filed:
February 24, 2010
Date of Patent:
October 23, 2012
Assignee:
Samsung Electronics Co., Ltd.
Inventors:
Sanghun Jeon, Jongwook Lee, Jong-Hyuk Kang, Heungkyu Park