Abstract: A conductive soft-durometer fire-retardant mixture comprises a thermoplastic base elastomer material, a fire-retardant material and metal-coated graphite fibers. The resulting mixture is easily molded, relatively low-cost and recyclable.

Abstract: First and second wafers are micromachined by standard integrated-circuit fabrication techniques to respectively make first and second component parts of a variable capacitor. A thin flexible membrane in the first wafer is integral with and mechanically supported by the first wafer. A metal pattern on the first wafer includes a first capacitor plate on the membrane. In the second wafer, a well is formed. A metal pattern on the second wafer includes a second capacitor plate in the well. By bonding the two parts together face-to-face, the capacitor plates are positioned in spaced-apart alignment with each other. External electrical connections to the plates are made via bonding-pad portions of the metal patterns on the wafers. In response to electrical control signals, the metal plate on the membrane can be moved toward the other plate, thereby selectively changing the capacitance of the assembly.

Abstract: Highly oriented thin films exhibiting good piezoelectric effects are formed in a reaction chamber. This is done by bombarding a target comprising a piezoelectric material. Dislodged particles from the target are ionized and then electrostatically attracted to the surface of a substrate where they are neutralized and deposited in an ordered way.

Abstract: Digital circuit for shunting a ground separation plane, formed, for example, by a transformer, and present in a digital signal path. In this circuit a long sequence of equal bits offered to one side of such a ground separation plane must be conveyed further at the other side as a replica of said first bit sequence. Such sequences in essence represents a direct current. According to the invention, there is provided at the ingoing end of such a ground separation plane a modulator for up-modulating a bit stream applied thereto on a carrier frequency for which the ground separation plane is transparent. At the discharge end of the ground separation plane a demodulator is provided for down-modulation in such manner that a replica is obtained of the bit stream applied to the digital modulator. For such a modulator and such a demodulator use can be made of an XOR-gate or a D-flip-flop, respectively.A preferred use of the invention relates to a video circuit with A/D and D/A conversion, respectively.

Abstract: A binary-to-ternary converter arrangement which achieves protective resistance against high outside voltages without having to compromise the voltage level of the positive and negative output ternary pulses. In so achieving, the minimum amplitude requirement of a CCITT recommendation of an output pulse for a given supply voltage is satisfied. This converter arrangement includes a parallel circuit of first and second series circuits. The first series circuit forms a main current path of two transistors and the second series circuit forms a current path of a diode, two resistors, and a third transistor. The different elements of these two circuits, along with a capacitor element, are interconnected in such a way as to eliminate the need for the use of a transformer altogether. The control electrodes of the first and second transistors serve as input ports and the junction port of the two resistors serves as the output port.

Abstract: An adaptive time-discrete filter having an impulse response h(i) with i=0,1,2, . . . for forming a cancelling signal from synchronous data symbols (for example to cancel echoes or lagging intersymbol interference) comprises a transversal filter section (12) having adjustable coefficients C.sub.i with i=0,1,2, . . . , N-1 for realizing the first N values h(i) of the impulse response as well as a recursive filter section (12') for realizing the values h(i) with i=N,N+1, . . . . The recursive filter section (12') receives the input signal delayed over N-1 discrete time intervals from the adaptive filter as an input signal x(n) and forms an output signal y(n) according to the relationship:y(n)=C.sub.B [C.sub.A .times.(n-1)+y(n-1)]where C.sub.A is equal to the last adjustable coefficient C.sub.N-1 of the transversal filter section (12) and C.sub.B is a predetermined fixed coefficient.

Abstract: Reactive ion etching of the planarizing layer of a multilevel resist structure utilized to make integrated-circuit devices is carried out employing a plasma derived from carbon dioxide. The etching step is characterized by high throughput, good linewidth control, negligible radiation damage and low sensitivity to process parameter variations.

Abstract: A switching system for switching-through in time-division multiplex broadcast connections and point-to-point connections. In prior art broadcast switching systems the incoming (transmitter) channels are fed with multiplicity into the switching system and distributed there in accordance with a distribution algorithm. This multiple feed-in is effected in the switching system of the invention in a time-division multiplex switching stage divided into parallel units as a result of which the switching rate of this stage does not become excessively high. In order to realise this parallel distribution of this time-division switching stage a certain restriction of the distribution algorithm must be tolerated.It has been found that the switching system thus obtained is suitable for multislot connections, whilst it can also be rendered suitable for point-to-point connections by slightly extending it.

Abstract: Electronic gain control is achieved by means of a differential controller in combination with a multistage, feedback amplifier. Both the input impedance and the output impedance have a low ohmic value, so that the influence of parasitic capacitances in the differential controller on the bandwidth is significantly reduced.

Abstract: Adaptive filter for producing an echo cancellation signal in a transceiver system arranged for digital communication in the duplex mode via one single pair of conductors, the filter comprising delay means (8) having N terminals for delaying the N most recently transmitted symbols, an addressing circuit (10) having M input terminals (M<N), each of which is coupled to the terminals 1 to M of the delay means, the addressing circuit forming from the signals applied to the input terminals an address for a memory (11) in which for each of these addresses always a first correction signal is stored; a weighting and summing arrangement (9) having N input terminals coupled to the N terminals of the delay means, the arrangement providing a second correction signal which is a weighted sum of all the signals at the input terminals thereof, means (12) for adding together the first correction signal and the second correction signal and an adaptive control loop (13).

Abstract: The invention relates to a switching system for a broadband ISDN-network by means of which signals can be transmitted with a large variety of bit rates. In addition to 64 kbit/s, 144 kbit/s and 2 Mbit/s narrow-band channels for inter alia telephony, data, video-information broadband channels for, for example, broadcast-TV having bit rates from 35-70 Mbit/s are switched through. For both signal catagories, a common switching system of the TST-type is utilised, which avoids the necessity of providing a multiplexer for each subscriber. The control of the time switching stages and the space switching stage forming part of the switching system is divided in a control for the broadband channels and a control for the narrow-band channels. Thus, a simple, effective control of the switching system is realised which operates at a low rate whenever possible.

Abstract: A clamping circuit for a television transmission system, includes an input amplifier whose non-inverting input is connected to the input of the clamping circuit and whose output is connected to the output of the clamping circuit. A negative feedback loop is provided between the output of the clamping circuit and the inverting input of the input amplifier, the negative feedback loop including the series arrangement of a sample and hold circuit and two amplifiers functioning as integrators. A switchable filter switched by the same pulse which switches the sample and hold circuit is provided between the output of the clamping circuit and the signal input terminal of the sample and hold circuit.

Abstract: An optical high-impedance preamplifier for processing signals over a large dynamic and automatically operating control range. The automatic control is provided by a variable impedance which is arranged in series with the source circuit of a current-stabilized input MOSFET of the optical preamplifier. As a result thereof, no overloading or loss of sensitivity occurs at a high or low input level.

Abstract: If in a broadband switching system broadcast TV-signals are switched, then it should be preferred that they can be switched through without the risk of blocking. To achieve this it is proposed to distribute the broadcast TV-signals via a p-fold bus line (BUS.sub.1, . . . BUS.sub.64) over the 64 inputs (DTV.sub.1, . . . DTV.sub.64) of the information stores IM.sub.1, IM.sub.2, . . . IM.sub.256. Together with their associated addressing and control, these information stores IM constitute a T-type T-stage switching system. Multiplex signals coming, for example, from the series-parallel converters SPT.sub.1, SPT.sub.2, . . . of an S-stage of a TST switching system are applied to the further, for example 36, inputs (I.sub.out,1, . . . I.sub.out,36) of each information store IM. By the action of the time slot control and the addressing associated with each information store IM 36 of the 100 memory locations are read and the contents are applied to the subscribers via outgoing multiplex line OMT.

Abstract: In the future ISDN network, up to eight subscriber terminals for speech, data and image traffic can be connected to the network terminating circuit (NT). The interface between the subscriber terminals and the network terminating circuit - the S-interface - is specified in CCITT Recommendation I.430. The transmitter in the S-interface must satisfy many, sometimes conflicting, requirements. This is satisfied to an optimum extent by providing the transmitter with a bridge circuit formed by semiconductor switching elements which are controlled by a digital control circuit. According to the invention, the output current of the transmitter is maintained substantially constant with the aid of a differential amplifier connected to the bridge circuit.

Abstract: The invention relates to a broadband space switching network and to a parallel-series converter and to a series-parallel converter in combination with such a space switching network. The crosspoints of the space switching network are set once per n-bit word. So as to find the time required therefor, each word contains (n-n.sub.1) "idle" bits, n.sub.1 representing the number of information bits. During the time in which the "idle" bits are transmitted, the space switching network is switched to the desired new state. The parallel-series converter, which is also required for other reasons, is used to inject "idle" bits into the bit stream conveyed to the space switching stage. The "idle" bits are removed again by means of a series-parallel converter at the output of the space switching stage.

Abstract: Parallel elongated trenches in a silicon substrate are utilized to form multiple distinct memory cell capacitors on each continuous wall of each trench. Chanstops are formed between adjacent capacitors to achieve electrical isolation. A separate word line overlies each trench wall and is connected via respective MOS transistors to the spaced-apart capacitors formed on the wall. A reliable high-density memory characterized by excellent performance is thereby realized.

Abstract: Adaptive transversal filter for use with three-signal level signals, arranged to cancel shifts in the two extreme signal levels relative to the central signal level, information signaling whether the signal level is the central signal level being coupled to first delay means (2) having N+1 connecting terminals, and information signaling whether the signal level is either one or the other extreme signal level being coupled to second delay means (4) having N+1 connecting terminals and comprising first and second coefficient registers (C.sub.OO -C.sub.ON ; C.sub.O -C.sub.sN) each containing N+1 coefficients; means (8, 9) for always multiplying one of the coefficients by an associated connecting terminal signal of the delay means, means (10) for adding together all the multiplying results obtained for providing a cancellation signal and means for always blocking the signal from a connecting terminal of the second delay means when this signal represents neither the one nor the other extreme signal level.

Abstract: A deep-UV step-and-repeat photolithography system includes a narrow-bandwidth pulsed excimer laser illumination source and an all-fused-silica lens assembly. The system is capable of line definition at the 0.5-micrometer level. One significant feature of the system is its ability to perform wafer focus tracking by simply changing the frequency of the laser.

Abstract: A deep-UV step-and-repeat photolithography system includes a narrow-bandwidth pulsed excimer laser illumination source and an all-fused-silica lens assembly. The system is capable of line definition at the 0.5-micrometer level. One significant feature of the system is its ability to perform wafer focus tracking by simply changing the frequency of the laser.