Patents Represented by Law Firm Rabin, Champagne & Lynt, P.C.
  • Patent number: 5744392
    Abstract: A multi-stage ROM device capable of storing multi-stage data and allowing high packing density for a ROM chip thus fabricated and a process for fabricating such a multi-stage ROM device. In the ROM device, the intersection between a first bit line and a word line is formed with a diode having a threshold voltage controlled at about 0.7 V, and the intersection between another bit line and word line is formed with a bipolar transistor with a threshold voltage controlled at about 3 V-5 V. The other intersections are each formed with a permanently-OFF transistor. By using these different types of memory cells, the ROM device is capable of storing multi-stage data.
    Type: Grant
    Filed: March 11, 1996
    Date of Patent: April 28, 1998
    Assignee: United Microelectronics Corporation
    Inventor: Chen-Chung Hsu
  • Patent number: 5744847
    Abstract: This invention describes a device structure and a method of forming the device structure using trenches with sidewalls formed in the substrate of an integrated circuit. A highly doped polysilicon layer is formed on the walls of the trench or the trench is filled with highly doped polysilicon to form the source and drain of a field effect transistor in an integrated circuit. The invention provides reduced source and drain resistance. The capacitances between the gate and source and the gate and drain are reduced as well.
    Type: Grant
    Filed: September 2, 1997
    Date of Patent: April 28, 1998
    Assignee: United Microelectronics Corporation
    Inventor: Jemmy Wen
  • Patent number: 5742865
    Abstract: An apparatus controls a temperature of a heat roller for fixing a developer material transferred on a print medium such as paper. The apparatus includes a controller, a sensor for detecting the thickness and/or width of a print medium such as paper, and a temperature-detecting element such as a thermistor for detecting the temperature on a first surface of the heat roller outside of a second surface area of the heat roller in contact with the print medium. The controller controls the temperature of the heat roller in accordance with the dimension of the print medium so that the middle portion of the heat roller is maintained substantially at a temperature of a first predetermined value during continued printing operation.
    Type: Grant
    Filed: July 26, 1996
    Date of Patent: April 21, 1998
    Assignee: Oki Data Corporation
    Inventors: Hiroyuki Yajima, Zenji Takahashi
  • Patent number: 5740580
    Abstract: The present invention discloses a stepper vacuum chuck wiper for cleaning a stepper vacuum chuck, which includes a rod frame, a bearing device, a flare type soft shield, a wiping stick and an illuminating device. The rod frame has a through hole at one end and the bearing device is sleeved inside of the through hole. The flare type soft shield with a flare opening on its lower end is sleeved inside the bearing device, and the diameter of the flare opening is larger than the outside diameter of the bearing device. The wiping stick is sleeved inside the flare type soft shield. The illuminating device for illuminating the stepper vacuum chuck includes a light source, a battery set and a switch. The battery set is coupled to the other end of the rod frame to provide electricity to the light source, and the switch is coupled between the battery set and the light source to control the illumination of the light source, wherein the light source and the switch are disposed on the rod frame.
    Type: Grant
    Filed: November 29, 1996
    Date of Patent: April 21, 1998
    Assignee: United Microelectronics Corporation
    Inventors: Chung-Chien Leu, Hsi-Huang Lee, En-Tien Tan
  • Patent number: 5742084
    Abstract: A punchthrough-triggered ESD protection circuit which disposes an NMOS transistor at the anode gate of an lateral silicon-controlled rectifier, and a control circuit which provides a gate voltage for the gate of the NMOS transistor. By changing the channel length of the NMOS transistor as well as the gate voltage, the punchthrough voltage of the NMOS transistor is readily adjusted to a predetermined level. When ESD stress is present at the IC pad, the NMOS transistor goes into breakdown because of punchthrough and then triggers on the lateral silicon controlled rectifier. Thus, the trigger voltage of the ESD voltage can be lowered to the punchthrough voltage of the NMOS transistor. Accordingly, the ESD stress at the IC pad is bypassed by the conduction of the ESD protection circuit to allow an internal circuit to be protected from ESD damage.
    Type: Grant
    Filed: July 23, 1996
    Date of Patent: April 21, 1998
    Assignee: Winbond Electronics Corporation
    Inventor: Ta-Lee Yu
  • Patent number: 5742083
    Abstract: A MOSFET structure for an ESD protection circuit in a semiconductor IC device having segmented diffusion regions. The transistor includes a gate having an extended strip-shaped structure formed on the substrate of the IC device. A well region is formed in the substrate on a first side of the gate structure. A first drain diffusion region is formed in the well region, and a second drain diffusion region is formed partially inside the well region. A source diffusion region is formed in the substrate along a second side of the gate structure, opposing the first side. A field oxide layer is formed over the surface of the substrate, the field oxide layer comprises a number of finger-shaped extensions originating from the drain side of the transistor and extending into the source side of the transistor. The finger-shaped extensions divide the second drain diffusion region into a number of parallel-aligned segmented diffusion regions.
    Type: Grant
    Filed: January 2, 1997
    Date of Patent: April 21, 1998
    Assignee: Winbond Electronics Corporation
    Inventor: Shi-Tron Lin
  • Patent number: 5739060
    Abstract: A method of fabricating a semiconductor memory device having a transfer transistor and a storage capacitor. First, a first insulating layer is formed on the substrate to cover the transfer transistor. Next, a first conductive layer is formed, which penetrates the first insulating layer and is electrically connected to one of the source/drain regions of the transfer transistor. A pillar-shaped layer is formed on the first conductive layer. At least first and second films are successively formed on the first conductive layer and the pillar-shaped layer. Then, the second film, the first film, and the first conductive layer are patterned to form an opening, exposing the first insulating layer. A second conductive layer is then formed on sidewalls of the opening. The pillar-shaped layer and the first film are then removed. Finally, a dielectric layer is formed on the first and second conductive layers and the second film and a third conductive layer is formed on the dielectric layer.
    Type: Grant
    Filed: October 23, 1996
    Date of Patent: April 14, 1998
    Assignee: United Microelecrtronics Corporation
    Inventor: Fang-Ching Chao
  • Patent number: 5740372
    Abstract: A signal detection circuit receives a data stream containing a signal to be detected and detects the contained to-be-detected signal. The signal detection circuit includes a memory circuit prestoring data for detecting the to-be-detected signal, a first data feeder for feeding data to the memory circuit per given time slot as an upper address, and a second data feeder for feeding data to the memory circuit as a lower address using data outputted from the memory circuit. The memory circuit outputs data stored in a storage area defined by the upper address and the lower address fed from the first and second data feeders, respectively. By arranging the memory circuit to output a given value as the foregoing output data when the to-be-detected signal is detected, detection of the to-be-detected signal is achieved.
    Type: Grant
    Filed: September 11, 1995
    Date of Patent: April 14, 1998
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Keiichiro Hijino
  • Patent number: 5738699
    Abstract: An apparatus for the removal of particles existing in exhaust gases by directly sprinkling the gases with water to congeal the particles. The apparatus also mixes surfactants into the water, and the mixture is driven by a pump to clean out the condensation deposited in a transmitting conduit in order to eliminate settled congealed particles that could block the transmitting conduit.
    Type: Grant
    Filed: September 6, 1996
    Date of Patent: April 14, 1998
    Assignee: United Microelectronics Corporation
    Inventors: Chu Lin Hu, Chia Hsing Huang, Ching Wen Deng, Kuo Cheng Chang
  • Patent number: 5739719
    Abstract: A bias circuit with low sensitivity to threshold variations provides a bias voltage independent of transistor threshold variations and also a bias voltage independent of source potential variation. Negative feedback controls the bias voltage at one output.
    Type: Grant
    Filed: March 3, 1997
    Date of Patent: April 14, 1998
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Tetsuya Tanabe, Satoru Tanoi
  • Patent number: 5740177
    Abstract: A method of correcting an error, which is suitable for use in a storage device. When the error exists in data read from a storage region of a storage medium having the storage region and a spare region and the read data is correctable, the read data is corrected. The number of defective bits included in the read data is detected. Only when the number of the defective bits exceeds and equals a predetermined value, the storage region storing therein the read data is prohibited from being used and an alternate process for storing corrected data in the spare region is executed.
    Type: Grant
    Filed: November 4, 1996
    Date of Patent: April 14, 1998
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Manabu Miyata
  • Patent number: 5739047
    Abstract: A method of fabricating a IC electrical plug, which removes an overhang to prevent formation of voids inside the plug. A transistor with a gate and source/drain terminals is formed on a silicon substrate. A dielectric layer is formed above the silicon substrate. A portion of the dielectric layer is removed by etching to form a contact window, exposing the source region, the drain region, or another conductive material region. A first diffusion barrier layer is formed at the bottom and on the sidewalls of the contact window, and on the top surface of the dielectric layer, overhanging the contact window. A photoresist layer is coated over the substrate filling up the contact window and covering the surface of first diffusion barrier layer.
    Type: Grant
    Filed: August 2, 1996
    Date of Patent: April 14, 1998
    Assignee: Winbond Electronics Corporation
    Inventor: Shing-Shing Chiang
  • Patent number: 5739609
    Abstract: A magnetic bearing apparatus comprises a pair of radial magnetic bearings arranged on both sides in the axial direction of an axial magnetic bearing. A pair of first touchdown bearings are arranged at both ends of a spindle. Annular slide bearings are mounted as second touchdown bearings for receiving the spindle on inner peripheral parts of electromagnets in the axial magnetic bearing. The radial internal clearance between the slide bearing and the spindle is larger than the radial internal clearance between the first touchdown bearings and the spindle and is smaller than the radial internal clearance between the radial magnetic bearings and the spindle. Even if a central part of the spindle is deflected at the time of emergency stop, both the first touchdown bearings and the slide bearings receive the spindle, so that the load on the first touchdown bearings can be reduced.
    Type: Grant
    Filed: April 9, 1997
    Date of Patent: April 14, 1998
    Assignee: Koyo Seiko Co., Ltd.
    Inventors: Hirochika Ueyama, Manabu Taniguchi
  • Patent number: 5740493
    Abstract: An electrophotographic recording apparatus that removes reverse-charged toner that is charged with a polarity opposite to a polarity of a normal-charged toner. The apparatus includes a carrier belt; a transfer roller for carrying the toner adhering to the surface of the photosensitive body toward the carrier belt; a transfer power supply for applying to the transfer roller a first voltage that causes the normal-charged toner adhering to the surface of the photosensitive body to be transferred to the recording medium on the carrier belt, and a second voltage, of opposite polarity to the first voltage, that causes the reverse-charged toner adhering to the surface of the photosensitive body to be transferred to the carrier belt; and a carrier belt cleaning blade.
    Type: Grant
    Filed: November 13, 1995
    Date of Patent: April 14, 1998
    Assignee: Oki Data Corporation
    Inventors: Noboru Otaki, Kazuyoshi Yoshida, Yoshitatsu Okiyama, Masato Sakai, Hiroyuki Inoue, Syuichiro Ogata
  • Patent number: 5737259
    Abstract: A diode type read only memory (ROM) includes a diode as a memory cell. The diode is a logic level "on" memory cell and coupled to one of the word lines and one of the bit lines of the ROM. A relative high voltage is given to the bit line coupled to the diode and a relative low voltage is given to the corresponding word line. Therefore, the data saved in the diode can be read out.
    Type: Grant
    Filed: December 31, 1996
    Date of Patent: April 7, 1998
    Assignee: United Microelectronics Corporation
    Inventor: Kuang Yeh Chang
  • Patent number: 5736441
    Abstract: A semiconductor structure for a DRAM cell having a high capacitance capacitor. The DRAM cell includes a silicon substrate on which a field oxide layer and a transistor having a gate layer and a source/drain region are formed. A contact surface is formed on a surface of the source/drain region. A silicon nitride layer is formed over the gate layer. A thick oxide layer is formed over one part of the silicon nitride layer, at a lateral side of the contact surface. Silicon nitride spacers are formed over opposite lateral sides of the gate layer, the silicon nitride layer, and the thick oxide layer. One of the silicon nitride spacers located adjacent to the contact surface, is shaped in the form of a pointed protrusion. A self-aligned contact insulating layer covers the thick oxide layer and the other silicon nitride spacer, that is located away from the contact surface. This structure defines a jagged surface over at least the contact surface, the pointed protrusion and the silicon nitride layer.
    Type: Grant
    Filed: March 15, 1996
    Date of Patent: April 7, 1998
    Assignee: United Microelectronics Corporation
    Inventor: Anchor Chen
  • Patent number: 5734200
    Abstract: A bonding pad adapted for use with an Aluminum wire that resists stresses that would otherwise peel the pad from the substrate. The pad has a polysilicon layer adhered to an insulating layer on a semiconductor substrate, a overlying refractory metal polycide layer, a second polysilicon layer, a refractory metal layer, and a thick Aluminum alloy bonding pad.
    Type: Grant
    Filed: January 28, 1997
    Date of Patent: March 31, 1998
    Assignee: United Microelectronics Corporation
    Inventors: Chen-Chiu Hsue, Sun-Chieh Chien
  • Patent number: 5734406
    Abstract: A driver IC includes a plurality of electrode pads on a belt-shaped power supply electrode. The electrode pads are arrayed with a pitch dividing a row of driver circuits into groups of equal number. A power source voltage VDD is supplied through the plurality of the electrode pads. Further, the power supply electrode is disposed between the digital circuits and the driver circuits. A print head includes the driver IC with a plurality of light emitting elements connected thereto. A printer includes the print head in combination with photo sensitive drum, a lens array, a charger, a developer and a transcriber.
    Type: Grant
    Filed: April 7, 1994
    Date of Patent: March 31, 1998
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Yukio Nakamura, Hiroshi Furuya, Takashi Ishizaki, Takeyuki Yanagibashi
  • Patent number: 5734356
    Abstract: This invention discloses an improved construction for portable disk antenna. This construction mainly comprises a disk antenna body, an outer member, an inner member, and a base. The outer member may rotate over 360 degrees about a first axis relative to the base. The inner member is rotably fitted into the outer member. The disk antenna body is connected to the inner member such that the disk antenna body, together with the inner member, can be rotated with respect to the outer member within an appropriate angular range about a second axis perpendicular to the first axis. This invention is characterized by further comprising an azimuth calibrating device having an azimuth calibration scale formed thereon for calibrating the azimuth deviation of the disk antenna body before use according to the indication of a compass; and an elevation calibrating device having an elevation scale formed thereon for calibrating the elevation deviation of the disk antenna body according to the indication of a level instrument.
    Type: Grant
    Filed: June 7, 1996
    Date of Patent: March 31, 1998
    Assignee: RF-Link Systems, Inc.
    Inventor: Johnny Chang
  • Patent number: D392965
    Type: Grant
    Filed: February 7, 1997
    Date of Patent: March 31, 1998
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Jeffrey P. Copeland, Gerald W. Vandenengel, Paul Waihung Chau