Abstract: A method for forming a copper conductor in an electronic structure by first depositing a copper composition in a receptacle formed in the electronic structure, and then adding impurities into the copper composition such that its electromigration resistance is improved. In the method, the copper composition can be deposited by a variety of techniques such as electroplating, physical vapor deposition and chemical vapor deposition. The impurities which can be implanted include those of C, O, Cl, S and N at a suitable concentration range between about 0.01 ppm by weight and about 1000 ppm by weight. The impurities can be added by different methods such as ion implantation, annealing and diffusion.

Abstract: An apparatus and a method for mounting a wafer and etching a wafer backside in an etchant solution are provided. The apparatus is constructed by a first circular disc that has a first sidewall integrally formed, a gas inlet in the first circular disc or the first sidewall, a second circular disc that has a second sidewall integrally formed for positioning inside the first circular disc and forming a first cavity therein between, a third circular disc that has a third sidewall integrally formed for positioning inside the second circular disc and forming a second cavity therein between, a gas outlet in the second circular disc for withdrawing air from the second cavity, and sealing means positioned on top of the sidewalls for providing a substantially sealed second cavity when a wafer is positioned on top of the sidewalls.

Abstract: A polishing head for holding a wafer during a polishing process without the edge-effect or the edge peeling defect and a method for improving edge profile on a wafer during a polishing process are described. The polishing head is constructed by a carrier head, a retaining ring, and at least three piezoelectric actuator/sensors mounted in-between a recessed peripheral edge portion of the carrier head and a top surface of the retaining ring.

Abstract: A method for forming metal interconnect in a semiconductor structure and the structure formed are disclosed. In the method, a seed layer of a first metal is first deposited into an interconnect opening wherein the seed layer has an average grain size of at least 0.0005 &mgr;m. The semiconductor structure is then annealed at a temperature sufficient to grow the average grain size in the seed layer to at least the film thickness. A filler layer of a second metal is then deposited to fill the interconnect opening overlaying the seed layer such that the filler layer has an average grain size of larger than 0.0005 &mgr;m and comparable to the annealed seed layer.

Abstract: The present invention discloses a method for forming a layer of nitrogen and silicon containing material on a substrate by first providing a heated substrate and then flowing a gas which has silicon and nitrogen atoms but no carbon atoms in the same molecule over said heated substrate at a pressure of not higher than 500 Torr, such that a layer of nitrogen and silicon containing material is formed on the surface. The present invention is further directed to a composite structure that includes a substrate and a layer of material containing nitrogen and silicon but not carbon overlying the substrate for stopping chemical species from reaching the substrate. The present invention is further directed to a structure that includes a semiconducting substrate, a gate insulator on the substrate, a nitrogen-rich layer on top of the gate insulator, and a gate electrode on the nitrogen-rich layer, wherein the nitrogen-rich layer blocks diffusion of contaminating species from the gate electrode to the gate insulator.

Abstract: A method for direct chip attach of a semiconductor chip to a circuit board by using solder bumps and an underfill layer is disclosed. In the method, a layer of in-situ polymeric mold material is first screen printed on the top surface of the semiconductor chip exposing a multiplicity of bond pads. The in-situ polymeric mold layer is formed with a multiplicity of apertures which are then filled with solder material in a molten solder screening process to form solder bumps. A thin flux-containing underfill material layer is then placed on top of a circuit board over a plurality of conductive pads which are arranged in a mirror image to the bond pads on the semiconductor chip. The semiconductor chip and the circuit board are then pressed together with the underfill layer inbetween and heated to a reflow temperature of higher than the melting temperature of the solder material until electrical communication is established between the bond pads and the conductive pads.

Abstract: A semiconductor structure that includes at least one circuit element of a fuse, a diffusion barrier or a capacitor that is formed by refractory metal-silicon-nitrogen is disclosed. A method for fabricating such semiconductor structure that includes a fuse element, a diffusion barrier, a resistor or a capacitor by a refractory metal-silicon-nitrogen material is further disclosed. A suitable refractory metal-silicon-nitrogen material to be used is TaSiN which provides a wide range of resistivity by changing the ratio of Ta:Si:N. The invention provides the benefit that the various components of diffusion barriers, fuses, capacitors and resistors may be formed by a single deposition process of a TaSiN layer, the various components are then selectively masked and treated by either heat-treating or ion-implantation to vary their resistivity selectively while keeping the other shielded elements at the same resistivity.

Abstract: The present invention discloses a method and apparatus for forming solder bumps by a molten solder screening technique in which a flexible die head constructed of a metal sheet is utilized for maintaining an intimate contact between the die head and a solder receiving mold surface. The flexible die head, when used in combination with a pressure means, is capable of conforming to any curved mold surface as long as the curvature is not more than 2.5 &mgr;m per inch of die length.

Abstract: A method forforming a refractory metal-silicon-nitrogen capacitor in a semiconductor structure and the structure formed are described. In the method, a pre-processed semiconductor substrate is first positioned in a sputtering chamber. Ar gas is then flown into the sputtering chamber to sputter deposit a first refractory metal-silicon-nitrogen layer on the substrate from a refractory metal silicide target, or from two targets of a refractory metal and a silicon. N2 gas is then flown into the sputtering chamber until that the concentration of N2 gas in the chamber is at least 35% to sputter deposit a second refractory metal-silicon-nitrogen layer on top of the first refractory metal-silicon-nitrogen layer. The N2 gas flow is then stopped to sputter deposit a third refractory metal-silicon-nitrogen layer on top of the second refractory metal-silicon-nitrogen layer. The multi-layer stack of the refractory metal-silicon-nitrogen is then photolithographically formed into a capacitor.

Abstract: Within both a magnetically enhanced plasma apparatus and a magnetically enhanced plasma method there is employed: (1) a repetitive and geometrically selective pulsing of a magnetic field from a first level to a second level within a reactor chamber; and (2) a repetitive pulsing of a radio frequency power from a first level to a second level within the reactor chamber when repetitively and geometrically selectively pulsing from the first level to the second level the magnetic field within the reactor chamber. The concurrent repetitive pulsings provide a plasma within the reactor chamber with enhanced plasma uniformity and enhanced ion energy control.

Abstract: An electrical conductor for use in an electronic structure is disclosed which includes a conductor body that is formed of an alloy including between about 0.001 atomic % and about 2 atomic % of an element selected from the group consisting of Ti, Zr, In, Sn and Hf; and a liner abutting the conductor body which is formed of an alloy that includes Ta, W, Ti, Nb and V. The invention further discloses a liner for use in a semiconductor interconnect that is formed of a material selected from the group consisting of Ti, Hf, In, Sn, Zr and alloys thereof, TiCu3, Ta1−XTix, Ta1−X, Hfx, Ta1−X, Inxy, Ta1−XSnx, Ta1−XZrx.

Abstract: A low dielectric constant, thermally stable hydrogenated oxidized silicon carbon film which can be used as an interconnect dielectric in IC chips is disclosed. Also disclosed is a method for fabricating a thermally stable hydrogenated oxidized silicon carbon low dielectric constant film utilizing a plasma enhanced chemical vapor deposition technique. Electronic devices containing insulating layers of thermally stable hydrogenated oxidized silicon carbon low dielectric constant materials that are prepared by the method are further disclosed. To enable the fabrication of thermally stable hydrogenated oxidized silicon carbon low dielectric constant film, specific precursor materials having a ring structure are preferred.

Abstract: Within each of: (1) an internal combustion engine system; (2) a transportation vehicle which incorporates the internal combustion engine system; and (3) a method for operating the internal combustion engine system, there is employed: (1) an internal combustion engine having a minimum of one combustion chamber; (2) a gas compressor absent an associated compressed gas tank, where the gas compressor is driven by a power output of the internal combustion engine; and (3) a controller programmed for providing a compressed gas charge from the gas compressor to the minimum of one combustion chamber during a portion of a compression cycle within the minimum of one combustion chamber, but not including a beginning portion of the compression cycle within the minimum of one combustion chamber. Each of the internal combustion engine system, transportation vehicle and method provides enhanced internal combustion engine performance and economy.

Abstract: In order to provide for reduced internal combustion engine exhaust emissions when cold starting an internal combustion engine, there is provided two methods and systems for cold starting an internal combustion engine, and one method and system for shutting down an internal combustion engine. The methods and systems are directed towards: (1) a preheating of a minimum of one thermally activated sensor within an internal combustion engine prior to cold starting of the internal combustion engine; (2) an autocranking of an internal combustion engine while metering fuel into the internal combustion engine and timing ignition within the internal combustion engine such as to reduce internal combustion exhaust emissions when cold starting the internal combustion engine; and (3) a phased shut down of fuel supply control followed by ignition source control when shutting down an internal combustion engine after operating the internal combustion engine.

Abstract: A low dielectric constant, multiphase material which can be used as an interconnect dielectric in IC chips is disclosed. Also disclosed is a method for fabricating a multiphase low dielectric constant film utilizing a plasma enhanced chemical vapor deposition technique. Electronic devices containing insulating layers of the multiphase low dielectric constant materials that are prepared by the method are further disclosed.

Abstract: An apparatus and a method for filling high aspect ratio holes in electronic substrates that can be advantageously used for filling holes having aspect ratios larger than 5:1 are disclosed. In the apparatus, a filler plate and a vacuum plate are used in conjunction with a connection means such that a gap is formed between the two plates to accommodate an electronic substrate equipped with high aspect ratio via holes. The filler plate is equipped with an injection slot while the vacuum plate is equipped with a vacuum slot such that when a substrate is sandwiched therein, via holes can be evacuated of air and injected with a liquid simultaneously from a bottom side and a top side of the substrate. The present invention novel apparatus and method allows the filling of via holes that have small diameters, i.e., as small as 10 &mgr;m, and high aspect ratios, i.e.

Abstract: A method for forming a porous dielectric material layer in an electronic structure and the structure formed are disclosed. In the method, a porous dielectric layer in a semiconductor device can be formed by first forming a non-porous dielectric layer, then partially curing, patterning by reactive ion etching, and final curing the non-porous dielectric layer at a higher temperature than the partial curing temperature to transform the non-porous dielectric material into a porous dielectric material, thus achieving a dielectric material that has significantly improved dielectric constant, i.e. smaller than 2.6.

Abstract: A method for forming a TiN layer on top of a metal silicide layer in a semiconductor structure without the formation of a thick amorphous layer containing Ti, Co and Si and the structure formed are provided. In the method, after a Ti layer is deposited on top of a metal silidide layer, a dual-step annealing process is conducted in which a low temperature annealing in a forming gas (or ammonia) at a temperature not higher than 500° C. is first conducted for less than 2 hours followed by a high temperature annealing in a nitrogen-containing gas (or ammonia) at a second temperature not lower than 500° for less than 2 hours to form the TiN layer. The present invention method prevents the problem usually caused by a thick amorphous material layer of Ti—Si—Co which produces weakly bonded Ti which reacts with fluorine atoms from WF6 during a subsequent CVD W deposition process and causes liner failure due to a volume expansion of the amorphous material.

Abstract: A method for spin-coating a high viscosity liquid on a wafer surface capable of producing an improved uniformity in the coating thickness and a reduced material usage is disclosed. In the method, a liquid that has a high viscosity of at least 1000 cp is first provided. A wafer is then rotated to a speed of less than 300 rpm while simultaneously, a first volume of a high viscosity liquid is dispensed onto the wafer surface forming a cup-shaped pattern. The spinning of the wafer is then stopped and a second volume of the high viscosity liquid is dispensed into a cavity formed in the cup-shaped pattern to substantially fill the cavity. The wafer is then rotated again to a high rotational speed of at least 3000 rpm such that liquid in the cup-shaped pattern spreads out to substantially cover an entire surface of the wafer resulting in improved coating uniformity.

Abstract: A low dielectric constant, multiphase material which can be used as an interconnect dielectric in IC chips is disclosed. Also disclosed is a method for fabricating a multiphase low dielectric constant film utilizing a plasma enhanced chemical vapor deposition technique. Electronic devices containing insulating layers of the multiphase low dielectric constant materials that are prepared by the method are further disclosed.