Abstract: It has been found that selective metallization in integrated circuits is expeditiously achieved through a copper plating procedure. In this process, palladium silicide is used as a catalytic surface and an electroless plating bath is employed to introduce copper plating only in regions where the silicide is present. Use of this procedure yields superior filling of vias and windows with excellent conductivity.
Type:
Grant
Filed:
April 27, 1993
Date of Patent:
May 3, 1994
Assignee:
AT&T Bell Laboratories
Inventors:
Leonard C. Feldman, Gregg S. Higashi, Cecilia Y. Mak, Barry Miller
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