Abstract: The present invention is an acceleration sensor chip having characterized a third layer formed on a first layer of a support substrate through an insulating second layer, where the third layer has a sensor structure. The second layer between the detection surface of the sensor structure and the first layer is removed. A beam part with a detection device, and a weight part with a plurality of cutouts of a same width are formed over the entire detection surface.

Abstract: An optical switch for switching a light path between two optical waveguides is provided. The switch has a slit formed diagonally cutting across the crossing point of crossing optical waveguides and a substance in the slit has a function of transmitting or reflecting an optical signal is selectively held in the slit. The slit is narrower than cores of the optical waveguides, and has a center line formed on a bisection of an interior angle between optical axes of the crossing optical waveguides. Thus, the substance in the slit serves to make optical intensity reflected to each of the optical waveguides uniform. Further, a crossing optical waveguide consists of a reflecting structure having its interior filled with air during reflection and the intersecting angle between the first group of optical waveguides is between 0 to 90 degrees and preferably substantially between 73 and 74 degrees.

Abstract: An optical filter is manufactured by placing a photosensitive optical fiber in a spiral arrangement on a fiber holder, preferably having a spiral groove for holding the fiber, and exposing the fiber to ultraviolet light through a phase mask having a spiral diffraction grating, forming an in-fiber Bragg grating. The fiber can be conveniently scanned by an ultraviolet beam as the fiber holder and phase mask turn on a rotating stage. The fiber can be compactly packaged between the fiber holder and a cover. The fiber holder and cover can be formed by coating a substrate with layers of polymer material, the spiral groove being formed by photolithographic patterning of one of the layers.

Abstract: Using an oxide superconductor that does not require cryogenic temperatures, a superconducting tunnel junction device is provided which can accurately control the magnitudes of critical current and step voltage necessary for electronics applications and which has good characteristics as designed. The intrinsic Josephson superconducting tunnel junction device includes an oxide superconductor defined by a general expression (I): Bi2−zPbzSr2Can(1−x)RnxCun+1O2n+6 (n≧1, 0<x≦0.2, 0≦z≦1.0, R: rare-earth element).

Abstract: Each block is multiplexed. Each block is provided with an interface portion (10). A section terminating portion (11) receives overhead information from an associated equipment, and an APS byte processing portion (12) converts APS bytes contained in overhead information to event information. A state processing portion (16) inputs event information and state of a self block at an address on a state transition table (5) and read out a new next state information of said self block. The transition of a state of said self block is effected to a new state and its result information is transmitted to said associated equipment and the like. Sending and receiving of state information and state transition are hard-ware controlled, causing no load to firmware and allowing a high speed switching accordingly.

Abstract: A small-parts feed and conveying device includes a movable section in which trains having a plurality of through holes are arranged along a direction of conveying the small parts, a parts drawing means for drawing the small parts to parts-conveying surface and holding them by reducing the pressure of an air opposite thereto, a conveying path cover in which open faces of spaces for conveying the parts slidably come into contact with the parts-conveying surface, and a parts mixing means for blowing a pressurized air to the small parts from nozzles in the conveying path cover and mixing them. The through holes may be arranged so as to form a plurality of parallel trains. The movable section may be a rotor or a belt.

Abstract: A chain ferroelectric RAM includes a memory cell array having a plurality of memory cell, which connected in series between bit line and a plate line. Each memory cell includes a first ferroelectric capacitor having upper and lower electrodes between which a ferroelectric layer is provided; a second ferroelectric capacitor having upper and lower electrodes between which a ferroelectric layer is provided; and a transistor connected to the upper and lower electrodes of the first and second ferroelectric capacitors. The upper electrode of the first ferroelectric capacitor is connected to the lower electrode of the second ferroelectric capacitor, and the lower electrode of the first ferroelectric capacitor is connected to the upper electrode of the second ferroelectric capacitor in a complimentary manner.

Abstract: A non-volatile memory including a storage device composed of a ferroelectric material having first and second remaining polarization characteristics offset from each other. Selection of a first or a second remaining polarization characteristic is determined by a predetermined voltage applied to the ferroelectric material. A controller outputs a control signal, in response to a predetermined address signal, which is applied to the storage device and the controller. The address signal includes for each address a data portion and an offset portion, the offset portion corresponding to either the first or the second remaining polarization characteristic. The control signal couples a first predetermined voltage to the storage device when the offset portion of the address signal corresponds to the first remaining polarization characteristic and couples a second predetermined voltage to the storage device when the offset portion of the address signal corresponds to the second remaining polarization characteristic.

Abstract: To prevent a calling party from paying an Internet connection fee when a called party is busy, in an Internet telephone, a call setting message including a sub-address to the called party is used to notify the called party of an incoming call which can be placed through the Internet. ISDN terminal adapters of the calling party and the called party are automatically connected to access points to the Internet to reduce the telephone rate when using the Internet.

Abstract: A logic circuit having a first logic gate and remaining logic gate or gates. The first logic gate is interposed in a signal path determining an operating speed, and includes at least one first MOS transistor which has a threshold voltage lower than a predetermined voltage and operates at a high speed. The remaining logic gate or gates include at least one of a second MOS transistor and a third MOS transistor as a transistor having a margin for operating speed. The second MOS transistor has a middle threshold voltage equal to or greater than the predetermined voltage, and the third MOS transistor has a high threshold voltage equal to or greater than the predetermined voltage. The power consumption of the entire logic circuit at the time of operation is reduced, while maintaining the maximum operating speed.

Abstract: An optical switch circuit network includes r input optical switches 102a each having n input ports, m 1×r optical switches 125a, and an n×m optical switch for switching a path connecting the input ports and the 1×r optical switches, and r output optical switches 125 each having r×1 optical switches, n output ports, and an m×n optical switch for switching a path connecting the output ports and 1×r optical switches. The i-th 1×r optical switch of each input optical switch is connected to the i-th r×1 optical switch of each output optical switch.

Abstract: In a differential surface acoustic wave resonator, when an unbalanced electric signal is inputted between an input terminal 301 and an output terminal connected to a ground potential, this electric signal is inputted to two-terminal-pair surface acoustic wave resonators 351 and 352. The electric signal inputted to the two-terminal-pair surface acoustic wave resonator 351 is converted into a surface acoustic wave, and thereafter it is again converted into an electric signal to be outputted to a two-terminal-pair surface acoustic wave resonator 353. The electric signal inputted to the two-terminal-pair surface acoustic wave resonator 353 is converted into a surface acoustic wave, and thereafter it is again converted into an electric signal to be outputted from an output terminal 302 of the differential surface acoustic wave filter as a balanced signal.

Abstract: An LED is provided with a p-type semiconductor region in the shape of an island being buried in an n-type semiconductor region from the surface of it, and forms a pn junction at the interface between these n-type region and p-type region. The pn junction has a bottom junction at the bottom of the n-type region and a side junction at the peripheral side face. The bottom junction comprises a first subjunction being deep and constant in junction depth and a second subjunction varying continuously in junction depth. The depth of the second subjunction is shallower than the depth of the first subjunction. The p-type region portion above the second subjunction is thinner in thickness than the p-type region portion above the first subjunction. A light passing through the p-type region portion of the former is less in absorptior and more in optical power of the output light. The total power of the output light of the whole LED is increased correspondingly to reduction in thickness of the p-type region.

Abstract: A tellurite glass as a glass material of optical fiber and optical waveguide has a composition of 0<Bi2O3≦20 (mole %), 0≦Na2O≦35 (mole %), 0≦ZnO≦35 (mole %), and 55≦TeO2≦90 (mole %). The tellurite glass allows an optical amplifier and a laser device that have broadband and low-noise characteristics. In a splicing structure of non silica-based optical fiber (as a first fiber) and a silica-based optical fiber (as a second fiber), optical axes of the first and second optical fibers are held at different angles &thgr;1 and &thgr;2 (&thgr;1≠&thgr;2) respectively from a vertical axis of a boundary surface between their spliced ends, and a relationship between the angles &thgr;1 and &thgr;2 satisfies Snell's law represented by an equation of sin &thgr;1/sin &thgr;2=n2/n1 (where n1 is a refractive index of the first optical fiber and n2 is a refractive index of the second optical fiber) at the time of splicing the first and second optical fibers.

Abstract: An internal clock generation circuit according to the present invention comprises a phase comparator, a shift register, a filter, a monitor circuit, and a plurality of delay lines such as first and second delay lines. The first delay line has delay steps each larger than that of the second delay line. The first delay line is first used to generate a clock minimized in phase difference with respect to an external clock. The clock signal is inputted to the second delay line to perform fine adjustment to the phase difference.

Abstract: A wrist mechanism of an industrial robot is described which comprise first, second and third wrist elements rotatably supported relative to each other around respective rotation axes which are mutually inclined, which leaves a hollow space inside thereof free for passage of supply cables and pipes which are to be connected to a tool being secured to the robot wrist. The second and third wrist elements carries first and second ring-shaped hollow reduction units, and their respective output shafts rotates the second and third wrist elements, respectively, thereby the amounts of backlashes and flank wears in the transmitting gears as well as the amounts of reflected rotational movements of the second and third wrist elements affected by the rotational movements of the first and second wrist elements are reduced within fractions of the reduction ratios of each of the reduction units, which result the controllings of the positionings of the wrist elements become easy and accuracies thereof are increased.

Abstract: The object of the present invention is to provide the telemetering apparatus, which telemeters electric power, gas, and waterworks, for telemetering via a telephone network with an exchange, wherein the telemetering apparatus responds to the normal polarity inversion, the slow polarity inversion, and calling bell signal applied to the communication line therebetween upon starting or releasing of use of the communication line. To attain the above object, the telemetering appears according to the present invention comprises detection means for detecting a rising edge or falling edge of those polarity inversions and signal characterized thereby with reference to the respective predetermined voltage and the respective predetermined period, thus distinguishing one of these polarity inversions and signal from the others.

Abstract: A convolutional coder performs rate 1/N and 1/M convolutional coding (M<N). The convolutional coder includes a convolutional code generator, a parallel/serial converter, a rate indicator, and a selector. The rate indicator indicates either rate 1/N or 1/M convolutional coding. The selector provides the N convolutional coding bits for rate 1/N convolutional coding. Also for the rate 1/M convolutional coding, the selector provides M convolutional coding bits generated by M generator polynominals common to rate 1/N and 1/M convolutional coding and nullifies (N−M) convolutional coding bits generated by the other (N−M) generator polynominals for the rate 1/N convolutional coding. A Viterbi decoder performs rate 1/N convolutional decoding and includes a rate indicator and a data converter. The rate indicator detects a 1/N or 1/M convolutional coding rate from a received signal (M<N).

Abstract: A ferroelectric memory device in which an imprint is prevented, and a method of operating the ferroelectric memory device to prevent its characteristics from deteriorating due to an imprint. The ferroelectric memory device includes a sense amplifier having first and second transistors which connect first and third sub-bit lines to a ground in accordance with a sense amplifier control signal, third and fourth transistors which connect the first sub-bit line with a fourth sub-bit line and further connect the third sub-bit line with a second sub-bit line in accordance with a first switching control signal, and fifth and sixth transistors which connect the first sub-bit line with the second sub-bit line and further connect the third sub-bit line with the fourth sub-bit line in accordance with a second switching control signal.

Abstract: A radio communication apparatus having a rake receiver for searching and combining reception paths. The apparatus includes at least one combination searcher/finger unit which performs a searcher operation for detecting signals on the reception paths and estimates the signal strength of each of the signals. The searcher/finger unit also performs a finger operation which outputs a demodulated symbol in response to a command signal generated by an assignment unit. The assignment unit assigns either a searcher operation or a finger operation to the searcher/finger unit in accordance with the number of reception paths transmitting a signal suitable for demodulation.