Abstract: Disclosed is a method for providing an insulation trench on a semiconductor substrate. The method includes the steps of depositing a pad oxide layer and a nitride layer on a semiconductor substrate; etching the nitride layer and the pad oxide layer and depositing a first insulating layer; forming spacers along sidewalls of the pad oxide layer and the nitride layer by anisotropic etching the first insulating layer; forming trenches by etching the semiconductor substrate; forming a trench insulating layer pattern by depositing a second insulating layer and etching the same; and polishing the trench insulating layer pattern.

Abstract: A radio frequency synthesizer receives a relatively low frequency input signal and synthesizes from it a high frequency output signal whose frequency can be programmed to change in fine steps, for use e.g. in cordless telephone. The frequency synthesizer includes three linked phase locked loops with a single side band mixer in one embodiment coupling two of the phase locked loops together. This provides an output signal free of in-band frequency spurs within the spacing of two channels. The synthesizer can be integrated in a single chip with a narrowband FM modulation circuit. In spite of using a novel synthesizer to achieve monolithic integration, the user programming interface and control value equations are the industry standard format.

Abstract: Device for determining the rate of a received communication frame, including a plurality of encoded signal quality estimators, each at a different rate, a decision controller, connected to the encoded signal quality estimators, a decoder connected to the controller and an erasure detection unit connected to the decoder and the controller, wherein each of the quality estimators processes the received encoded frame according to an encoded signal quality criteria, thereby producing a quality value, wherein the controller selects the rate with the best quality value, the decoder decodes the encoded frame according to the selected rate and the erasure detection unit analyzing the decoded frame, thereby determining it as allowed or as erased.

Abstract: A video poker gaming machine is described where, after initially dealing five cards to a player, the machine displays a sixth card to replace a discarded card by the player. In one embodiment, the sixth card automatically replaces the leftmost discarded card. In another embodiment, the sixth card can replace any of the discarded cards.

Abstract: Portions (40 and 44) of a structure, such as a flat-panel device, are sealed together by a gap-jumping technique in which a sealing area (40S) of one portion is positioned near a matching sealing area (44S) of another portion such that a gap (48) at least partially separates the two sealing areas. The gap typically has an average height of 25 .mu.m or more. With the two portions of the structure so positioned, energy is initially transferred locally to material of a specified one of the portions along part of the gap while the two portions are in a non-vacuum environment to cause material of the two portions to bridge that part of the gap and partially seal the two portions together along the sealing areas.

Abstract: An apparatus for securing a board in a connected position includes at least a first edge and a second edge, the apparatus including at least a first retention arm capable of holding in a connected position a first edge of the board, wherein the board is chosen from a plurality of circuit board cards, a heatsink thermal plate coupled to a circuit board card, and a heatsink thermal plate. A computer system includes at least one processor; a memory coupled to the processor and an apparatus for securing a board in a connected position, the device having at least a first edge and a second edge, the apparatus having at least a first retention arm capable of holding in a connected position a first edge of the board, wherein the board is chosen from a plurality of circuit board cards, a heatsink thermal plate coupled to a circuit board card, and a heatsink thermal plate.

Abstract: In electroplating a metal layer on a semiconductor wafer, the resistive voltage drop between the edge of the wafer, where the electrical terminal is located, and center of the wafer causes the plating rate to be greater at the edge than at the center. As a result of this so-called "terminal effect", the plated layer tends to be concave. This problem is overcome by first setting the current at a relatively low level until the plated layer is sufficiently thick that the resistive drop is negligible, and then increasing the current to improve the plating rate. Alternatively, the portion of the layer produced at the higher current can be made slightly convex to compensate for the concave shape of the portion of the layer produced at the lower current. This is done by reducing the mass transfer of the electroplating solution near the edge of the wafer to the point that the electroplating process is mass transfer limited in that region.

Abstract: An HSP communication system includes a host computer which executes a software portion of an HSP modem and a device containing a digital-to-analog converter (DAC). In response to interrupts, the host executes an update routine that generates and writes samples to a software circular buffer in memory of the host computer. The samples represent amplitudes of an analog signal complying with a desired communication protocol. A direct transfer moves samples from the software circular buffer to a hardware circular buffer the device, and the DAC converts the samples from the hardware circular buffer into an analog communication signal. In an exemplary embodiment, the hardware portion is coupled to a PCI bus in the host computer, and direct transfers are according to the PCI bus master protocol. In environments such as multi-tasking systems, the host may skip interrupts or otherwise not provide new samples when required.

Abstract: The present invention relates to a method and structure for controlling plasma uniformity in plasma processing applications. Electron thermal conductivity parallel and perpendicular to magnetic field lines differs by orders of magnitude for low magnetic fields (on the order of 10 gauss). This property allows the directing of heat flux by controlling the magnetic field configuration independent of ions since the effect of modest magnetic fields upon the transport of ions themselves is minimal. Heat is preferentially conducted along magnetic field lines with electron temperatures on the order of 0.1 to 1 eV/cm being sufficient to drive kilowatt-level heat fluxes across areas typical of plasma processing source dimensions.

Abstract: A carrier ring provides a stiffening function for assembling flexible circuits or semi-rigid circuits. The carrier ring is attached to a substrate adapted for attachment of a matrix of semiconductor dies. The carrier ring is provided with mold gates and mold vents for use with a transfer molding step to provide encapsulation for the semiconductor dies. Alignment and indexing marks on the carrier ring allows use of conventional assembly process flows in conventional assembly equipment. The height of the carrier ring also provides a means of providing integrated circuits with a predetermined thickness.

Abstract: An electrode (12 or 30) of an electron-emitting device has a plurality of openings (16 or 60) spaced laterally apart from one another. The openings can be used, as needed, in selectively separating one or more parts of the electrode from the remainder of the electrode during corrective test directed towards repairing any short-circuit defects that may exist between the electrode and other overlying or underlying electrodes. When the electrode with the openings is an emitter electrode (12), each opening (16) normally extends fully across an overlying control electrode (30). When the electrode with the openings is a control electrode (30), each opening (60) normally extends fully across an underlying emitter electrode (12). The short-circuit repair procedure typically entails directing light energy on appropriate portions of the electrode with the openings.

Abstract: A device (16) for sensing current flowing in a generally flat plate structure (10) contains a magnetic head (18) and signal processing circuitry (20). The magnetic head (a) senses changes in current-induced magnetic flux as the head is positioned over the plate structure and (b) provides a head output signal. The signal processing circuitry processes the head output signal to produce a data signal indicative of how much current appears to flow in the plate structure below the head. A driving voltage, which typically varies in a periodic manner to produce a characteristic signature, is applied to a primary conductor in the plate structure. A location sensor, typically formed with a light source (100) and a light sensor (102), detects the position of the magnetic head relative to the plate structure. A gas-cushion mechanism (80-98) controls the height of the head above the plate structure.

Abstract: A preamplifier circuit couple to a magneto-resistive (MR) head used in the read circuitry of a magnetic storage device includes differential amplifiers coupled to receive an input from the MR head and to provide output signals. The preamplifier is designed to provide a low noise level. To minimize noise, transistors of the differential amplifiers provide high current gain and have large device geometries.

Abstract: A flat-panel display contains a pair of plate structures (40 and 42) coupled together to form a sealed enclosure. A spacer (44) is situated in the enclosure for resisting external forces exerted on the display. The spacer is formed with a main spacer portion (60), typically shaped like a wall, and a face electrode (66) situated over a face of the main spacer portion. The face electrode causes electrons moving from one of the plate structures to the other to be deflected in such a manner as to compensate for other electron deflection caused by the presence of the spacer. The face electrode is divided into multiple laterally separated segments (66.sub.1 -66.sub.N) to improve the accuracy of the compensation along the length of the spacer. In fabricating the display, a masking step is typically utilized in defining the widths of the segments of the face electrode.

Abstract: A semiconductor chip packaging method includes the provision of individual elastomer chip carriers cut from an elastomer sheet having a uniform thickness and smooth, parallel surfaces. The elastomer sheet is mounted on an adhesive tape held by a fixing member, such as a support ring, and is then divided into individual carriers. The carrier is attached to a circuit interposer, and a semiconductor chip is attached to the carrier. Circuit leads of the interposer are bonded to connection pads on the chip. The beam lead bonding area is then encapsulated, and conductive bumps are formed on the underside of the package to serve as input/output terminals for the packaged device. Using this method, an number of devices can be packaged simultaneously on a flexible sheet and then separated into individual devices by cutting the sheet between the devices.

Abstract: An improved programmable logic device is disclosed. In one embodiment, the programmable logic device includes a plurality of I/O cells and a plurality of logic block clusters. Each logic block cluster has a set of logic blocks and a cluster routing pool, which provides programmable connections among the logic blocks and the I/O cells. A global routing pool provides programmable connections among the logic block clusters and the I/O cells. Each logic block includes a programmable logic array with a plurality of outputs. A product term sharing array in the logic block has a plurality of bus lines, each of which is coupled to at least one of the outputs of the programmable logic array. The product term sharing array also includes a plurality of output lines, each of which is coupled to a plurality of programmable interconnections that each provide a connection to one of the bus lines. Each output line of the product term sharing array is coupled to the same number of programmable interconnections.

Abstract: In a digital circuit, a method for avoiding a bus contention condition which results from an overlap of active phases of multiple bus drivers. The method avoids such bus contention condition by including holding amplifiers in the data bus and by turning on respective bus drivers only for durations sufficient to establish a data value on the data bus.

Abstract: A method for automatically generating a knowledge database in an object classification system having a digital image data source, and a computer, includes the steps of inputting digital image data corresponding to a plurality of training images, and characterizing the digital image data according to pre-defined variables, or descriptors, to thereby provide a plurality of descriptor vectors corresponding to the training images. Predetermined classification codes are inputted for the plurality of training images, to thereby define object class clusters comprising descriptor vector points having the same classification codes in N-dimensional Euclidean space. The descriptor vectors, or points, are reduced using a similarity matrix indicating proximity in N-dimensional Euclidean space, to select those descriptors vectors, called extreme points, which lie on the boundary surface of their respective class cluster. The non-selected points interior to the class cluster are not included in the knowledge database.

Abstract: A method for nondestructive layer defect detection includes projecting radiation such as a laser beam on a surface of the layer. The surface of the layer is heated by the projected radiation so as to melt at least a portion of the layer. An impurity contained in a defect is heated by the projected radiation so as to increase the pressure of the material within the defect sufficiently to cause the impurity to emerge from the defect through the surface of the layer. The layer is then scanned for a visible defect created by the emergence of the impurity from the defect. A wafer scanning system for nondestructive layer defect detection includes a radiation source such as a laser and a wafer support system that supports a semiconductor wafer with a layer formed thereon in alignment with the radiation source.

Abstract: Apparatus for providing an optimized sampling phase to a received signal in a given channel, the received signal including inter-symbol interference. The apparatus includes a voltage controlled clock (VCC) for providing a VCC sampling phase, a first signal detector, connected to the VCC, for sampling the signal according to an advanced sampling phase which is advanced by a predetermined value .delta. with respect to the VCC sampling phase, thereby producing a first sampled signal, a second signal detector, connected to the VCC, for sampling the signal according to a delayed sampling phase which is delayed by a predetermined value .delta.