Abstract: A mechanism provides for sending an envelope and replying to an envelope. A transmitter is configured to send an envelope. A receiver is coupled to the transmitter, wherein the receiver is configured to receive the envelope and generate a reply envelope. A send buffer is coupled to the transmitter. A receive buffer is coupled to the receiver. A retry timer is coupled to the transmitter, wherein the retry timer is configured to reset upon the receipt of a reply envelope correlated to the transmit envelope. The transmitter is configured to retransmit an envelope if the transmitter does not receive a corresponding reply envelope within a selected time period as determined by the retry timer. This leads to a decrease in the total number of envelopes, transmitted from both the transmitter and the receiver.

Abstract: A hash key is generated based on an information object and a lookup operation is performed in a hash table based on the hash key. A determination is made whether an entry in the hash table at an index corresponding to the hash key identifies a labelset for the information object. A labelset, identifying a sensitivity of the information object, is stored in the entry at the index corresponding to the hash key for the information object if a labelset for the information object is not identified in the entry in the hash table. Information flows involving the information object are authorized based on a lookup of the labelset associated with the information object in the hash table. The hash table may be a multidimensional hash table.

Abstract: A mechanism for configuring and scheduling logical discovery processes in a data processing system is provided. A discovery engine communicates with information providers to collect discovery data. An information provider is a software component whose responsibility is to discover resources and relationships between the resources and write their representations in a persistent store. Discovery directives are used to coordinate the execution of information providers.

Abstract: A mechanism detects cable length in a storage subsystem with wide ports. The mechanism uses in-situ bidirectional cable wrapping for determining different cable lengths. The mechanism under-margins transmitter output to failure for each external port and even for each PHY within a wide port. Based on the transition point from “good” wrap to “bad” wrap, the cable length may be determined. The transition point identifies if the cable is long or short, at which point the optimum tuning parameters can accordingly be set. A calibration mechanism calibrates the high speed transmitter/receiver pair characteristics, and, thus, optimizes the transmission performance between subsystems. The calibration mechanism mitigates the need for frequent error correction and does not incur the performance degradation associated with error correction techniques.

Abstract: A method of synchronization for use in a distributed data processing system comprising a legacy computer having means for storing a master version of data, an application server, and a thin client computer which stores a copy of the master version of data. Firstly, the thin client executes operations locally on the copy. The operations are sent in a list to the application server. The application server executes the operations on the master data, on behalf of the thin client. If the operations can be executed successfully on the master version, synchronization occurs in that the successful operations are applied to the master version.

Abstract: A confidential content search engine method is provided. With the method, a security compliance search engine is provided for searching one or more client computing devices for items of information that meet a security criteria identifying items of information containing confidential content. Results of the search are provided to an analysis engine for determining if the items of information identified by the search are being maintained in accordance with a security policy for ensuring the confidentiality of the confidential content. Results of the analysis may be used to generate a report or log and to generate a notification to the client computing device identifying any violations of the security policy and possible solutions for bringing the item of information into compliance with the security policy. In addition, an administrator may be notified of any violations so that corrective action may be taken.

Abstract: A mechanism is provided for unified management of power, performance, and thermals in computer systems. This mechanism incorporates elements to effectively address all aspects of managing computing systems in an integrated manner, instead of independently. The mechanism employs an infrastructure for real-time measurements feedback, an infrastructure for regulating system activity, component operating levels, and environmental control, a dedicated control structure for guaranteed response/preemptive action, and interaction and integration components. The mechanism provides interfaces for user-level interaction. The mechanism also employs methods to address power/thermal concerns at multiple timescales. In addition, the mechanism improves efficiency by adopting an integrated approach, rather than treating different aspects of the power/thermal problem as individual issues to be addressed in a piecemeal fashion.

Abstract: A network management method and system. The method includes identifying by a computing system, overlapping address spaces between networks. The computing system generates virtual servers associated with the overlapping address spaces. The computing system determines and configures a routing technique for routing the virtual servers to the overlapping address spaces. The computing system installs a copy of management software on each of the virtual servers. The computing system performs a network management installation process. The network management process prepares the virtual servers for managing the overlapping address spaces. The computing system generates and stores a log report associated with the network management installation process.

Abstract: A mechanism for measuring the absolute duty cycle of a signal is provided. A non-inverted path from a signal source is selected and various DCC circuit setting indices are cycled through until a divider, coupled to the output of the DCC circuit, fails. A first minimum pulse width at which the divider fails is then determined based on the index value of the DCC circuit at the time of the failure. An inverted path from the signal source is selected and the various DCC circuit setting indices are cycled through again until the divider fails. A second minimum pulse width at which the divider fails is then determined based on the index value of the DCC circuit at the time of this second failure. The duty cycle is then calculated based on a difference of the first and second minimum pulse width values.

Abstract: A mechanism uses in-situ bidirectional cable wrapping for determining different cable lengths. A calibration mechanism calibrates the high speed transmitter/receiver pair characteristics, and, thus, optimizes the transmission performance between subsystems. The calibration mechanism mitigates the need for frequent error correction and does not incur the performance degradation associated with error correction techniques.

Abstract: An addressing model is provided where devices, including I/O devices, are addressed with internet protocol (IP) addresses, which are considered part of the virtual address space. A task, such as an application, may be assigned an effective address range, which corresponds to addresses in the virtual address space. The virtual address space is expanded to include Internet protocol addresses. Thus, the page frame tables are also modified to include entries for IP addresses and additional properties for devices and I/O. Thus, a processing element, such as an I/O adapter or even a printer, for example, may also be addressed using IP addresses without the need for library calls, device drivers, pinning memory, and so forth. This addressing model also provides full virtualization of resources across an IP interconnect, allowing a process to access an I/O device across a network.

Abstract: A mechanism provides a layered communication stack. A connection manager manages the actual transfer of data through a single point-to-point connection crossing a respective firewall. A sessions manager multiplexes multiple sessions over the connection. A routing manager exploits the sessions manager for building a routing table dynamically. A routed sessions manager implements routed sessions between two applications at opposite ends of the system; the routed sessions manager exploits the sessions manager to let the data navigate through the firewalls, and it exploits the routing manager to address the data correctly from source to destination.

Abstract: An addressing model is provided where all resources, including memory and devices, are addressed with internet protocol (IP) addresses. A task, such as an application, may be assigned a range of IP addresses rather than an effective address range. Thus, a processing element, such as an I/O adapter or even a printer, for example, may also be addressed using IP addresses without the need for library calls, device drivers, pinning memory, and so forth. This addressing model also provides full virtualization of resources across an IP interconnect, allowing a process to access an I/O device across a network.

Abstract: An apparatus and computer program product for driving values to “don't care” (DC) adjusted/untimed nets of an integrated circuit design to thereby identify timing problems are provided. The apparatus and computer program product may be utilized, for example, with logical built-in self test (LBIST) testing of an integrated circuit in which the DC adjusted (dcadj) nets for normal functional mode of the integrated circuit may not be DC adjusted for LBIST mode. By using the apparatus and computer program product, timing related problems associated with DC adjusted/untimed nets can be made apparent either by using simulation or semi-formal/formal analysis. For example, with regard to DC adjusted/untimed nets, the apparatus and computer program product may identify any violations of these nets with regard to maintaining their DC adjusted values. Such identification of violations of DC adjusted/untimed nets may be made without interfering with the static timing analysis of timed nets.

Abstract: A mechanism for in-band problem log data collection is provided. Facilities are provided for a host system, host application, or server system to instigate a state save operation in a storage system utilizing direct commands in response to an error or failure. The host system may include an application program interface (API) to force the storage device to collect a set of state save data for debug purposes at a specific time interlocked with a host system log. The API of the illustrative embodiments may be provided in a failover driver and/or host bus adapter (HBA) driver in the prime code path such that first time data capture following an error is maximized. Since the host system is instigating the state save operation with direct commands, a larger amount of transient data may be collected to provide more comprehensive state information for debugging purposes.

Abstract: A method is provided for managing resources within an integrated development environment for multiple users. The resources include both content resources and people resources. The method comprises managing a plurality of nodes representing resources. The nodes include content nodes and person nodes. The node contains a resource reference for referencing the resource. The method comprises managing one or more links representing one or more relationships between the resources. Each link comprises node references to identify the nodes in the relationships and an importance value to identify the importance of the relationship. The method further comprises providing an interface for selecting one of the plurality of content nodes or person nodes and estimating, in response to a selected nodes, a node having a likelihood of subsequent selection based on the importance value of its link to the selected nodes. The method comprises providing an interface for selecting said estimated node.

Abstract: A mechanism is provided for biasing placement of a software thread on a currently idle and dispatched processor. The operating system starts with the last logical processor on which the software thread ran and determines whether that processor is idle and dispatched and considers each logical processor until a currently dispatched and idle logical processor is found. If a currently dispatched and idle logical processor is not found, then the operating system biases placing the software thread on an idle logical processor.

Abstract: A collaboration system is provided in combination with a system administration monitoring system. The monitoring software for the system may recognize an error or other event in a component that is being monitored. The monitoring software then sends a message to all administrators that may be associated with the error or event. When an administrator receives an alert, the administrator may choose to join a collaborative resolution session. When a plurality of administrators joins a collaborative resolution session, each administrator is presented with a user interface at his or her console. The user interface may present one or more shared system administration elements, such as system administration portals, and one or more collaboration elements, such as instant messaging elements or the like. Participating administrators may then communicate using the collaboration elements to attempt to resolve an error or other event. Users may share additional system administration elements.

Abstract: A “kill” intrinsic that may be used in programs for designating specific data objects as having been “killed” by a preceding action is provided. The concept of a data object being “killed” is that the compiler is informed that no operations (e.g., loads and stores) on that data object, or its aliases, can be moved across the point in the program flow where the data object is designated as having been “killed.” The “kill” intrinsic limits the reordering capability of an optimization scheduler of a compiler with regard to operations performed on “killed” data objects. The “kill” intrinsic may be used with DMA operations. Data objects being DMA'ed from a local store of a processor may be “killed” through use of the “kill” intrinsic prior to submitting the DMA request. Data objects being DMA'ed to the local store of the processor may be “killed” after verifying the transfer completes.

Abstract: A mechanism is provided for determining whether to use cache affinity as a criterion for software thread dispatching in a shared processor logical partitioning data processing system. The server firmware may store data about when and/or how often logical processors are dispatched. Given these data, the operating system may collect metrics. Using the logical processor metrics, the operating system may determine whether cache affinity is likely to provide a significant performance benefit relative to the cost of dispatching a particular logical processor to the operating system.