Patents Represented by Attorney W. J. Burke
  • Patent number: 5561617
    Abstract: Multiresolution (pyramid) filtering is useful in image processing. An IC for implementing a variety of multiresolution filters includes a programmable, symmetric, and separable two-dimensional filter. The input signal to the filter can be an input signal applied to the IC or a combination of two such signals. Circuitry in the IC may be programmed to imply pixel values around the edges of the two-dimensional image signals processed by the filter. The filter provides an output signal as well as each of the unfiltered signals from a tapped delay line of a filter that combines successive lines of the image. The IC also includes an arithmetic and logic unit in which the filtered output signal may be combined with an unfiltered input signal or one of the unfiltered tap signals. If the filter is programmed to produce a Gaussian low-pass filtered image, this image, combined with image data from a center one of the filter taps produces a Laplacian function of the original image.
    Type: Grant
    Filed: March 10, 1995
    Date of Patent: October 1, 1996
    Assignee: David Sarnoff Research Center, Inc.
    Inventor: Gooitzen S. van der Wal
  • Patent number: 5491482
    Abstract: There is described an electronic interrogation and identification (I/I) system in which an interrogator/reader (I/R) unit operates remotely using a microwave beam in conjunction with one or more coded articles. The articles are identified by a unique method and search sequence. As the I/R unit interrogates the articles, one or more of them respond to the I/R unit whenever a code word (data value) sent from the I/R unit matches a code word stored in one or more of the memory positions within the articles. After searching through all of the possible code words and word positions the I/R unit will have identified at least one code word stored in each of the word positions of at least one article. Then combinations of the just-identified code words are matched with the respective stored words of the various articles. After being uniquely identified each article is "powered-down" on command from the I/R unit and remains inactive so that one-by-one all remaining articles are also identified.
    Type: Grant
    Filed: December 29, 1992
    Date of Patent: February 13, 1996
    Assignee: David Sarnoff Research Center, Inc.
    Inventors: Andrew G. F. Dingwall, Jonathan L. Schepps
  • Patent number: 5488674
    Abstract: A method for fusing two or more source images to form a composite image with extended information content which may be color augmented and apparatus for forming the composite image from the source images is disclosed. Each source image is decomposed into a number of source images of varying resolution. The decomposed source images are analyzed using directionally sensitive operators to generate a set of oriented basis functions characteristic of the information content of the original images. The oriented basis functions for the composite image are then selected from those of the different source images and the inverse of the decomposition performed to construct the composite image. Color augmentation provides information as to the relative weighting of the contribution of each source to the composite image.
    Type: Grant
    Filed: May 12, 1993
    Date of Patent: January 30, 1996
    Assignee: David Sarnoff Research Center, Inc.
    Inventors: Peter J. Burt, Gooitzen S. van der Wal, Raymond J. Kolczynski, Rajesh Hingorani
  • Patent number: 5483366
    Abstract: A liquid crystal display includes a base plate having a plurality of pixels on a surface thereof with the pixels arranged in an array of spaced rows and columns. Each of the pixels includes a substantially rectangular region of polycrystalline silicon. A separate select line of polycrystalline silicon extends over and across the polycrystalline silicon regions of each row of pixels adjacent one side of the polycrystalline silicon region. The select lines has two extensions extending over and along two opposite sides of each polycrystalline silicon region. A layer of a dielectric material extends between the polycrystalline silicon regions and the first lines and the extensions of the first lines. Each of the first lines and its extensions forms a capacitor with the respective polycrystalline silicon region of each pixel. Data lines extend along the rows of the pixels and are electrically connected to each polycrystalline silicon region in its respective column of pixels.
    Type: Grant
    Filed: July 20, 1994
    Date of Patent: January 9, 1996
    Assignee: David Sarnoff Research Center Inc
    Inventor: James H. Atherton
  • Patent number: 5360316
    Abstract: A flats singulation apparatus includes a input buffer section having a substantially horizontal ramp which is adapted to support thereon a stack of flats mailpieces on edge. The buffer section includes a moving belt and ram plate for moving the stack of flat pieces toward the front end of the ramp. A transfer section is at the end of the ramp and is adapted to remove the flat pieces substantially one at a time from the ramp and drop them downwardly. The transfer section includes a plurality of edge rollers extending across the end of the ramp and adapted to move the flat pieces from the stack, and a ledge plate extending downwardly from the edge rollers and having a horizontal ledge onto which the flat pieces drop. A pusher shelf is movable across the ledge to push the flat pieces off of the shelf. A separation section extends substantially horizontally across the end of the transfer section and includes means for moving the flat pieces away from the transfer section and separating flat pieces.
    Type: Grant
    Filed: December 23, 1991
    Date of Patent: November 1, 1994
    Assignee: David Sarnoff Research Center, Inc.
    Inventors: Kerry D. O'Mara, Christopher J. Poux, Ross M. Carrell, Kurt R. Grice
  • Patent number: 5343053
    Abstract: The invention is a protection circuit for an integrated circuit which includes an SCR switch, a zener diode in parallel with the SCR to trigger the SCR to its on-state, and a zener diode in series with the SCR controls the on-state or clamping voltage of the SCR. The protection circuit is formed in a semiconductor substrate of first conductivity type having a well region of second conductivity type, a first region of first conductivity type in the well and a second region of second conductivity type in the substrate spaced from the well region. The first region, well region, substrate and second region forming the SCR. A third region of second conductivity type is in the well region and contacts the first region to form a first zener diode. A fourth region of second conductivity type is in the substrate and electrically connected to the well region. A fifth region is in the substrate and contacts the fourth region to form a second zener diode.
    Type: Grant
    Filed: May 21, 1993
    Date of Patent: August 30, 1994
    Assignees: David Sarnoff Research Center Inc., Sharp Corporation
    Inventor: Leslie R. Avery
  • Patent number: 5337068
    Abstract: A back-lighted color LCD display is formed by placing a single matrix of liquid crystal devices (LCDs) over a bank of red, green and blue fluorescent lamps. The LCD matrix is operated to sequentially form separate red, green and blue images synchronous with the illumination of the respective red, green and blue lamps. The flashing of the sequential red, green and blue images is perceived as a color image. The images are scanned, one line at a time, onto the LCD matrix. The bank of fluorescent lamps includes several lamps of each color which are arranged in parallel with the lines of the LCD matrix. The different lamps of each color are activated in synchronism with the scanning of the LCD matrix. Each LCD in the matrix includes a rapidly varying liquid crystal material, sandwiched between conductive plates. The electric field between the conductive plates may be controlled by a polysilicon thin-film transistor.
    Type: Grant
    Filed: February 1, 1993
    Date of Patent: August 9, 1994
    Assignee: David Sarnoff Research Center, Inc.
    Inventors: Roger G. Stewart, William R. Roach
  • Patent number: 5325449
    Abstract: A method for fusing two or more source images to form a composite image with extended information content and apparatus for forming the composite image from the source images is disclosed. Each source image is decomposed into a number of source images of varying resolution. The decomposed source images are analyzed using directionally sensitive operators to generate a set of oriented basis functions characteristic of the information content of the original images. The oriented basis functions for the composite image are then selected from those of the different source images and the inverse of the decomposition performed to construct the composite image. Apparatus for fusing two or more source images to form a composite image is also disclosed.
    Type: Grant
    Filed: May 15, 1992
    Date of Patent: June 28, 1994
    Assignee: David Sarnoff Research Center, Inc.
    Inventors: Peter J. Burt, Gooitzen S. van der Wal, Raymond J. Kolczynski, Rajesh Hingorani
  • Patent number: 5122792
    Abstract: A drive circuit for a liquid crystal display converts a display information signal to an n bit gray scale code to control the brightness at a prescribed pixel. A counter receives the m most significant bits of the n bit gray scale code and a latch receives the n-m least significant bits of the n bit gray scale code. The counter is decremented by clock pulses occurring at predetermined intervals and a set of 2.sup.n-m sub-interval timing signals are generated in response to each clock pulse. A transfer gate is enabled by an interval initiating pulse to permit charging of the pixel. One of the sub-interval timing signals is selected in response to the n-m least significant bits of the n bit gray scale code stored in the latch. The transfer gate is disabled by the sub-interval timing signal immediately succeeding the decrementing of the counter to its zero state.
    Type: Grant
    Filed: June 21, 1990
    Date of Patent: June 16, 1992
    Assignee: David Sarnoff Research Center, Inc.
    Inventor: Roger G. Stewart
  • Patent number: 5113097
    Abstract: A level shifter circuit has a pair of voltage buses, first and second p-channel MOS transistors and third and fourth n-channel MOS transistors. Each transistor has a gate to control conduction. The first and third transistors are connected in series between the voltage buses and the second and fourth transistors are connected in series between the voltage buses. A node between the first and second transistors is connected to the gates of the second and fourth transistors. An input signal having one of first and second levels is applied to the gate of the first transistor while the inverse of the input signal is applied to the gate of the second transistor. One voltage bus is connected through one of the second and fourth transistors in response to the first level input signal. The other voltage bus is connected the other of the second and fourth transistors in response to the second level input signal.
    Type: Grant
    Filed: May 2, 1991
    Date of Patent: May 12, 1992
    Assignee: David Sarnoff Research Center, Inc.
    Inventor: Sywe N. Lee
  • Patent number: 5089429
    Abstract: A process is disclosed for forming bipolar transistors in a BiCMOS process which is fully compatible with the CMOS process used to form other devices in the same integrated circuit. The process produces bipolar transistor sizes which are compatible with the minimum size features and design rules of the CMOS process. A CVD silicon oxide layer to be used to form spacers is deposited on the top of emitter and gate electrodes covered with a first oxide layer.
    Type: Grant
    Filed: June 22, 1989
    Date of Patent: February 18, 1992
    Assignee: David Sarnoff Research Center, Inc.
    Inventor: Sheng T. Hsu
  • Patent number: 5067014
    Abstract: An iterative process, implemented by a feedback loop, responds to all the image data in the respective analysis regions of three consecutive frames of a motion picture, to provide, after a plurality of cycles of operation thereof, an accurate estimation of the motion of either one or both of two differently moving patterns defined by the image data of these respective analysis regions. The analysis region of each frame is preferably large, and may occupy the entire frame area of a frame. The type of differently moving patterns include (1) separation by a motion bounty, (2) overlapping transparent surface in motion, (3) "picket fence" motion (4) masking of a small and/or low-contrast pattern by a dominant pattern, and (5) two-component aperture effects. Also, the operation of this iterative process inherently accurately estimates the motion of image data defining a single moving pattern.
    Type: Grant
    Filed: December 13, 1990
    Date of Patent: November 19, 1991
    Assignee: David Sarnoff Research Center, Inc.
    Inventors: James R. Bergen, Peter J. Burt, Rajesh Hingorani, Shmuel Peleg
  • Patent number: 5051790
    Abstract: The optoelectronic interconnection of the present invention provides a means for interconnecting a plurality of integrated circuits and each having at least one termination. The termination includes a transmitting section and a receiving section. Each transmitting section includes means for converting an output electrical signal from the integrated circuit to an optical signal in the form of a beam and an output grating for emitting the optical beam from the integrated circuit. Each receiving section includes an input grating for receiving an input optical signal in the form of a beam, means for amplifying the optical signal and a photodetector for converting the optical signal to an electrical signal which is fed to the circuit. The integrated circuits may be mounted adjacent each other with the output signals being emitting from the integrated circuits in the same direction.
    Type: Grant
    Filed: December 22, 1989
    Date of Patent: September 24, 1991
    Assignee: David Sarnoff Research Center, Inc.
    Inventor: Jacob M. Hammer
  • Patent number: 5051921
    Abstract: A liquid level and composition sensor includes a first interdigitated capacitor mounted substantially vertically in a tank, and a second interdigitated capacitor mounted substantially horizontally in and near the bottom of the tank. An electronic processor is responsive to the value of capacitance of the first capacitor for producing a first voltage signal proportional to the level of the liquid in the tank and is responsive to the value of capacitance of the second capacitor for producing a second voltage signal having a voltage level corresponding to the composition or dielectric constant of the liquid. The processor also multiplies the first and second voltage signals together to produce a liquid level voltage output signal having a constant slope for voltage amplitude versus liquid level, regardless of the composition of the liquid in the tank.
    Type: Grant
    Filed: November 30, 1989
    Date of Patent: September 24, 1991
    Assignee: David Sarnoff Research Center, Inc.
    Inventor: Robert W. Paglione
  • Patent number: 5035939
    Abstract: In the manufacture of printed circuit boards, a first photoresist post is patterned on the substrate where via holes are to be made. A dielectric layer is put down, a second photoresist layer patterned so as to have openings over and in alignment with the photoresist posts, and the dielectric removed from the via holes. Barrier layers to reduce interaction between layers of copper, dielectric and photoresist during filling of the via holes with a conductor via fill ink are also described.
    Type: Grant
    Filed: February 9, 1990
    Date of Patent: July 30, 1991
    Assignee: David Sarnoff Research Center, Inc.
    Inventors: Edward J. Conlon, Ashok N. Prabhu, Simon M. Boardman, Valerie A. Pendrick
  • Patent number: 5019787
    Abstract: An optical amplifier comprising a substrate of a semiconductor material having a pair of opposed surfaces and a body of semiconductor material on one of the surfaces. The body includes a pair of clad layers of opposite conductivity types having an intermediate quantum wall region therebetween. The clad layers are of a semiconductor material which form a heterojunction with the material of the quantum well region. The clad layers and quantum well region forms a waveguide which extends along the body. A gain section is in the body along the waveguide. The gain section includes a capping layer over the outermost clad layer, a contact on the capping layer and a contact on the other surface of the substrate to allow a voltage to be applied across the gain section. The gain section is adapted to generate light in the active region when a voltage is applied thereacross. A light input section having a grating extending across the body is at one end of the gain section.
    Type: Grant
    Filed: October 30, 1989
    Date of Patent: May 28, 1991
    Assignee: David Sarnoff Research Center, Inc.
    Inventors: Nils W. Carlson, Gary A. Evans, Jacob M. Hammer, Michael Ettenberg
  • Patent number: 5010380
    Abstract: A protection structure comprises a semiconductor substrate of a first conductivity type with a region of second conductivity type in the substrate at the surface thereof. A region of second conductivity type has disposed therein first and second regions of the second conductivity type, a third region of the first conductivity type adjacent the surface of the substrate, and a fourth region of the second conductivity type adjacent the substrate surface adjacent the third region. A shallow field region extends a distance into the region of second conductivity type between the first and second regions. A first electrical contact overlies the surface of the first region and a second electrical contact overlies the third and fourth regions.
    Type: Grant
    Filed: May 4, 1990
    Date of Patent: April 23, 1991
    Assignee: David Sarnoff Research Center, Inc.
    Inventor: Leslie R. Avery
  • Patent number: 5001481
    Abstract: A circuit that compensates for threshold voltage variations in a large array of deposited thin film MOS transistors includes a threshold voltage compensation transistor for a subset of the deposited analog thin film transistors having a prescribed source to gate threshold voltage. The source electrode of the threshold voltage compensation transistor receives a voltage corresponding to the maximum threshold voltage in the large array. The gate and drain electrodes of the threshold voltage compensation transistor are connected together and to one terminal of a capacitor. The other terminal of the capacitor is connected to a second voltage and the capacitor is momentarily discharged to set the threshold voltage compensation transistor gate and drain electrodes to the second voltage. The gate and drain electrodes of the threshold voltage compensation transistor are connected to the gate electrodes of the subset of analog thin film transistors.
    Type: Grant
    Filed: January 30, 1990
    Date of Patent: March 19, 1991
    Assignee: David Sarnoff Research Center, Inc.
    Inventor: Swye N. Lee
  • Patent number: 4976539
    Abstract: A diode laser array comprises a substrate of a semiconductor material having first and second opposed surfaces. On the first surface is a plurality of spaced gain sections and a separate distributed Bragg reflector passive waveguide at each end of each gain section and optically connecting the gain sections. Each gain section includes a cavity therein wherein charge carriers are generated and recombine to generate light which is confined in the cavity. Also, the cavity, which is preferably a quantum well cavity, provides both a high differential gain and potentially large depth of loss modulation. Each waveguide has a wavelength which is preferably formed by an extension of the cavity of the gain sections and a grating. The grating has a period which provides a selective feedback of light into the gain sections to supporting lasing, which allows some of the light to be emitted from the waveguide normal to the surface of the substrate and which allows optical coupling of the gain sections.
    Type: Grant
    Filed: August 29, 1989
    Date of Patent: December 11, 1990
    Assignee: David Sarnoff Research Center, Inc.
    Inventors: Nils W. Carlson, Gary A. Evans, Charlie J. Kaiser
  • Patent number: RE34982
    Abstract: Low-expansion devitrifying glass compositions exhibiting a negative-slope temperature coefficient of expansion over a temperature range from about 125.degree. C. to about 500.degree. C. are useful for the fabrication of thick film copper via-fill inks of multilayer printed-circuit boards.
    Type: Grant
    Filed: January 4, 1994
    Date of Patent: June 27, 1995
    Assignee: David Sarnoff Research Center, Inc.
    Inventors: Ashok N. Prabhu, Kenneth W. Hang