Abstract: A parallax barrier 3D display utilizes adjustable at least one parallax barrier for having an observer always retrieve stereo vision no matter whether horizontal or vertical movements towards the parallax barrier 3D display are made. The parallax barrier is adjustable in its width and a distance from the parallax barrier 3D display, or a parallax barrier having an appropriate width or distance may be chosen from each parallax barrier set. Therefore, the observer does not have to search for sweet spots nor keep on staying at the sweet spots for retrieving stereo vision.

Abstract: A portable electronic apparatus consists of a wireless module, a micro-processing unit, a determining circuit, and a control circuit. The wireless module provides a wireless communication function, and a first controller of the micro-processing unit provides a data access function. When a designated device is coupled to the portable electronic apparatus, the determining circuit determines whether to use the wireless communication function and whether to use the data access function in order to generate a determining result. The control circuit selectively connects a transmission interface of the first controller or a transmission interface of the wireless module to the designated device according to the determining result. When the control circuit connects the transmission interface of the wireless module to the designated device, the portable electronic apparatus is simulated as a wireless communication product.

Abstract: A shift register circuit with waveform-shaping function includes plural shift register stages. Each shift register stage includes a first input unit, a pull-up unit, a pull-down circuit, a second input unit, a control unit and a waveform-shaping unit. The first input unit is utilized for outputting a first driving control voltage in response to a first gate signal. The pull-up unit pulls up a second gate signal in response to the first driving control voltage. The pull-down circuit is employed to pull down the first driving control voltage and the second gate signal. The second input unit is utilized for outputting a second driving control voltage in response to the first gate signal. The control unit provides a control signal in response to the second driving control voltage and an auxiliary signal. The waveform-shaping unit performs a waveform-shaping operation on the second gate signal in response to the control signal.

Abstract: A voltage hold circuit includes four switches, an operational amplifier and a capacitor. By turning the switches on and off, the operational amplifier functions as a unity-gain buffer. In the normal operation mode, the positive input end of the operational amplifier is coupled to a node, and the output end of the operational amplifier is coupled to the capacitor. Thus the voltage of the capacitor is equal to the voltage of the node. In the power off mode, the positive input end of the operational amplifier is coupled d to the capacitor, and the output end of the operational amplifier is coupled to the node. Thus the voltage of the node is equal to the voltage of the capacitor. Therefore, the voltage hold circuit is able to hold the voltage of the node in the power down state.

Abstract: A method for fabricating a semiconductor structure is disclosed. The method includes the steps of: providing a substrate; depositing a material layer on the substrate; forming at least one dielectric layer on the material layer; forming a patterned resist on the dielectric layer; performing a first trimming process on at least the patterned resist; performing a second trimming process on at least the dielectric layer; and using the dielectric layer as mask for etching the material layer.

Abstract: An image sensor includes a light-sensing element, a first transistor, and a second transistor. The light-sensing element has a first end and a second end electrically connected to a select line. The first transistor has a first end electrically connected to a first control line, a control end electrically connected to the first end, and a second end electrically connected to the first end of the light-sensing element. The second transistor has a first end electrically connected to a voltage source, a control end electrically connected to the first end of the light-sensing element, and a second end electrically connected to an output line. The light-sensing element uses the material of silicon rich oxide so that the light-sensing element can sense the luminance variance and have the characteristic of the capacitor for the level boost.

Abstract: A method for detecting motion in an image display device includes receiving a plurality of composite signals having luminance signals and chrominance signals corresponding to a plurality of frames, determining luminance motion factors of the plurality of frames according to the luminance signals of the plurality of composite signals, determining chrominance motion factors of the plurality of frames according to edge intensities of the plurality of frames and the chrominance signals of the plurality of composite signals, and determining motion factors of the plurality of frames according to the luminance motion factors and the chrominance motion factors.

Abstract: A packet retransmission method utilized for enhancing data transmission efficiency is disclosed. The packet retransmission method includes steps of retransmitting a first packet which carries a first data at a previous transmission when the first packet is not received successfully, and updating the first data to reform the first packet according to a second data when the retransmission is performed, wherein the second data is a next transmission data of the first data on timing sequence.

Abstract: A semiconductor process having a dielectric layer including metal oxide is provided. The semiconductor process includes: A substrate is provided. A dielectric layer including metal oxide is formed on the substrate, wherein the dielectric layer has a plurality of oxygen-related vacancies. A first oxygen-importing process is performed to fill the oxygen-related vacancies with oxygen. Otherwise, three MOS transistor processes are also provided, each of which has a gate dielectric layer including a high dielectric constant, and a first oxygen-importing process is performed to fill the oxygen-related vacancies with oxygen.

Abstract: A method for performing active jammer suppression on an electronic device includes: performing down conversion on a received signal having in-band interference, in order to obtain at least one down-converted received signal; performing down conversion on a jammer signal derived from a jammer source causing the in-band interference, in order to obtain at least one down-converted jammer signal; adjusting a phase and/or an amplitude of the down-converted jammer signal to obtain a jammer suppression signal; and performing jammer suppression according to the down-converted received signal and the jammer suppression signal. An apparatus for performing the active jammer suppression on the electronic device includes a received-signal down converter, at least one jammer down converter, and at least one adjustment module. In particular, the adjustment module is arranged to iteratively adjust the phase and/or the amplitude of the down-converted jammer signal to obtain an optimal version of the jammer suppression signal.

Abstract: A transflective display device of the present invention includes a backlight module, an electrophoretic device, and a liquid crystal panel. The electrophoretic device includes a first substrate; a second substrate; an electrophoretic layer; a collector; a gate electrode and a plurality of transparent electrodes. The first substrate has at least a pixel region, and a device region and a display region are defined in the pixel region. The first substrate is disposed oppositely to the second substrate, and the electrophoretic layer is disposed between the first substrate and the second substrate. The electrophoretic layer includes a transparent fluid and a plurality of opaque charged particles. The collector, the gate electrode, and the plurality of transparent electrodes are disposed between the first substrate and the second substrate, wherein the collector and the gate electrode are disposed in the device region and the transparent electrodes are disposed in the display region.

Abstract: A thermal protection method for a computer system comprising a thermal detector, a controller, and an input/output system, the thermal protection method including the thermal detector measuring the temperature of the computer system and generating a temperature value, the controller comparing the temperature value and a threshold value, the controller periodically transmitting an over-temperature indication signal to the input/output system when the temperature value is not lower than the threshold value, the input/output system executing a temperature-lowering process when receiving the over-temperature indication signal, and the controller executing a compulsory thermal protection process when determining that the temperature-lowering process is unsuccessfully executed.

Abstract: An equalizer includes an oversampling logic unit, a direct current setting unit, and an alternating current setting unit. The oversampling logic unit oversamples data from a channel to generate a plurality of direct current terms and a plurality of alternating current terms according to an oversampling clock, and outputting a plurality of direct current terms corresponding to an output clock and a plurality of alternating current terms corresponding to the output clock according to the output clock. The direct current setting unit adjusts a direct current setting of the equalizer according to a plurality of direct current terms inputted by the oversampling logic unit within a first predetermined time. And the alternating current setting unit adjusts an alternating current setting of the equalizer according to a plurality of alternating current terms inputted by the oversampling logic unit within the first predetermined time.

Abstract: Activate one active word line of two active word lines formed between two isolation word lines to a logic-high voltage, and float another active word line of the two active word lines. Then activate a plurality of first memory cells corresponding to the active word line having the logic-high voltage to a logic “1” voltage, and write a logic “0” voltage to a plurality of second memory cells corresponding to the floating active word line. Then write the logic “1” voltage to a plurality of bit lines. Then, suspend for charge sharing for a third predetermined time. Finally, read a voltage of the floating active word line to check if any leakage path exists between the floating active word line and the active word line having the logic-high voltage.

Abstract: A buffer apparatus and a thin film deposition system are provided. The buffer apparatus is connected between a liquid material supply apparatus and a deposition machine. The buffer apparatus includes a container and a baffle. The container is used for containing a liquid material supplied from the liquid material supply apparatus. The top of the container has an input hole and an output hole. The baffle is disposed in the container and located under the input hole.

Abstract: A calibration apparatus includes: a first circuit arranged for generating a reference voltage with respect to a first circuit element according to a reference current flowing to the first circuit element; a second circuit arranged for generating an output voltage according to a tunable current; and an adjusting circuit for adjusting the tunable current to a target current value according to the reference voltage and the output voltage, wherein the adjusting circuit comprises: a search unit for performing a search according to a comparison result of the reference voltage and the output voltage to thereby determine a control setting; and a control unit coupled to the search unit, and for generating a control signal to the second circuit according to the control setting, and after the search unit adjusts the control setting, the search unit stops adjusting the control setting according to the comparison result.

Abstract: A method of fabricating a semiconductor structure, in which after an etching process is performed to form at least one recess within a semiconductor beside a gate structure, a thermal treatment is performed on the recess in a gas atmosphere including an inert gas before a silicon-containing epitaxial layer is formed in the recess through an epitaxy growth process.

Abstract: A data receiving method for an electronic system including a host apparatus and a target apparatus, wherein the host apparatus transmits at least one request to the target apparatus for requesting at least one desired data, and the target apparatus transmits the desired data to the host apparatus according to the request. The data receiving method includes: (a) generating a statistic value according to a number of the requests; (b) varying the statistic value according to a number of the desired data; and (c) determining if data received by the host apparatus is the desired data corresponding to the request according to the static value, and storing the data received by the host apparatus to the host apparatus when the data received by the host apparatus is determined to be the desired data corresponding to the request.

Abstract: A driving circuit includes a dead-time detecting circuit, a duty-cycle controlling circuit, and a switch controlling circuit. The dead-time detecting circuit is coupled to an output of a power switch set for detecting a switching voltage on the output of the power switch set and accordingly outputting a dead-time detecting signal. The output of the power switch set is coupled to the first end of an inductive load, and the second end of the inductive load provides an output voltage. The duty-cycle controlling circuit is coupled to the second end of the inductive load for generating a set/reset signal according to the output voltage. The switch controlling circuit controls the power switch set to be away from a dead state according to the set/reset signal and the dead-time detecting signal.

Abstract: A phase calibration circuit applied to at least one signal processing module group includes at least two phase calibration modules, a phase detection module and a filter module. An output node of a first phase calibration module is coupled to an input node of a first signal processing module, an input node of a second phase calibration module is coupled to an output node of the first signal processing module, and the first signal processing module receives a calibrated signal outputted from the first phase calibration module and generates a processed signal. The phase detection module is utilized for generating a phase error signal according to a calibrated signal of an Mth phase calibration module, where M is an integer equal to or greater than two. The filter module is utilized for generating at least a first and a second phase calibration signal according to the phase error signal.