Abstract: A voltage follower circuit includes a first MOS transistor which has a source connected to an input port, a second MOS transistor which has a source connected to an output port and has a gate and a drain connected to a gate of the first MOS transistor, a first constant current source connected between a drain of the first MOS transistor and a second power supply terminal, a second constant current source connected between the drain of the second MOS transistor and the second power supply terminal, and a depletion type third MOS transistor which has a gate connected to the drain of the first MOS transistor, has a drain connected to a first power supply terminal, and has a source connected to the output port.

Abstract: A semiconductor device includes a magnetic switch provided on a semiconductor substrate. The magnetic switch includes: a Hall element, first and second power supply terminals; a current source driving the Hall element; a switch circuit switching a differential output voltage supplied from two electrodes of the Hall element to a first or second state based on a control signal supplied from a control terminal; an amplifier amplifying a signal from the switch circuit; a reference voltage circuit generating a reference voltage based on a reference common mode voltage and a control signal; a comparator receiving an output signal of the amplifier and the reference voltage; and a latch circuit latching an output voltage of the comparator. The reference voltage of the reference voltage circuit is controlled by switching from a reference value to a voltage with a high or low adjustment value according to the output voltage of the comparator.

Abstract: To provide a resistance device which has a small temperature dependence, in which a resistance value is adjustable in a wide range of from a high resistance value to a low resistance value, and which has a small circuit area, and to provide a current detection circuit including the resistance device. The resistance device is to be connected between two terminals, and a resistance value thereof is variable, the resistance device including: a reference resistor; a series variable resistor circuitry including at least one parallel variable resistor circuit which is connected in series to each other, and which each includes a resistor and a trimming element connected in parallel to the resistor; and a parallel variable resistor circuitry including at least one series variable resistor circuit which is connected in parallel to each other, and which each includes a resistor and a trimming element connected in series to the resistor.

Abstract: Provided is a semiconductor device with a reference voltage circuit including an enhancement type transistor having P-type polycrystalline silicon as a first gate electrode, and a depletion type transistor having N-type polycrystalline silicon as a second gate electrode, in which the enhancement type transistor has an impermeable film that is locally provided to cover the first gate electrode via an interlayer insulating film disposed on the first gate electrode, and a nitride film that has an opening portion which is provided larger than the first gate electrode and smaller than the impermeable film, and is provided to cover a periphery of the impermeable film, and the depletion type transistor has a nitride film that is directly provided on an interlayer insulating film disposed on the second gate electrode and covers the depletion type transistor without a gap.

Abstract: Provided is a semiconductor storage apparatus having a storage apparatus driving circuit which can efficiently perform screening tests for the semiconductor memory device. A semiconductor memory device includes a wright-voltage supply circuit, a wright-voltage switching circuit, a bit line discharge control circuit, a bit line discharge circuit, and a memory array. The wright-voltage supply circuit is connected to the memory array through the wright-voltage switching circuit. The bit line discharge control circuit is connected to the memory array through the bit line discharge circuit.

Abstract: Provided is a DC/DC converter capable of providing overvoltage protection reliably without being affected by, for example, an external element connected to an output terminal. The DC/DC converter includes a comparator, an RS-FF circuit, a drive circuit, and an ON-timer circuit, and the ON-timer circuit includes: a current source circuit which provides an electric current based on a power supply voltage; a ripple generation circuit which generates a ripple voltage; an averaging circuit which averages the ripple voltage; a timer circuit which generates an ON-timer signal; and an overvoltage protection circuit (clamp circuit).

Abstract: A semiconductor device has an off transistor (10) in which a gate electrode (3) and a source region (6) of an N-type MOS transistor are connected to a ground terminal and a drain region (5) is connected to an external signal terminal (100b). In the off transistor (10), the gate electrode (3) is extensively provided over a portion or entirety of the drain region (5) in addition to a channel region. A capacitance (C2) formed between the gate electrode (3) and the drain region (5) may be greater than a capacitance (C1) generated between the gate electrode (3) and a ground potential.

Abstract: The present invention provides a Schmitt trigger circuit in which chattering does not occur in the output of the Schmitt trigger circuit even when it is connected to a communication bus without impedance matching and reflected noise is superimposed on the input signal. The Schmitt trigger circuit includes: a first signal detection circuit; a second signal detection circuit; a latch circuit; a selection signal generation circuit; a first input port; and a first output port. The first signal detection circuit is connected to the first input port, the latch circuit and the selection signal generation circuit. The second signal detection circuit is connected to the first input port, the latch circuit and the selection signal generation circuit. The latch circuit is connected to the selection signal generation circuit and the output port. The selection signal generation circuit includes a delay circuit.

Abstract: A power generation sensor includes: a housing body in which a module receiving a generated power is housed; a module with a first connector electrode disposed on a front face; a second connector electrode disposed on an inner face of the housing body connected to the first connector electrode; and a power generation electrode connected to the second connector electrode.

Abstract: A power generation sensor, generating electric power using a liquid, includes: a base; a positive electrode for power generation disposed in a first direction of the base and containing a first material; a negative electrode for power generation disposed in the first direction and containing a second material; a first connector electrode connected to a one-side end of the positive electrode in the first direction and to a sensor module; and a second connector electrode connected to a one-side end of the negative electrode in the first direction and to the sensor module. The first connector electrode contains the first material and has a larger width in a second direction orthogonal to the first direction than the positive electrode in the second direction. The second connector electrode contains the second material and has a larger width in the second direction than the negative electrode in the second direction.

Abstract: According to the present invention, an optical latch circuit includes a voltage detector configured to compare a first power generation voltage input from a first input terminal with a preset first threshold voltage and output a set signal from a determination output terminal when the first power generation voltage exceeds the first threshold voltage, a first photovoltaic element connected between the first input terminal and a grounding point in a forward direction and configured to output a first power generation voltage to the first input terminal according to photovoltaic power when light is radiated, and a feedback resistor inserted between the first input terminal and the determination output terminal.

Abstract: Provided is a semiconductor device applicable to both types of packages regardless of whether or not double bonding of a lead frame pad is allowed. The semiconductor device includes: an operational amplifier; a feedback resistor; a reference voltage generation circuit; an output transistor; a first pad which is connected to an output terminal of the output transistor, and is to be selectively connected to a lead frame pad by a bonding wire; a second pad to be selectively connected to the lead frame pad by a bonding wire; and a connection switching element provided between the first pad and the second pad. In a case in which the second pad is connected to the lead frame pad by the bonding wire, the connection switching element interrupts connection between the first pad and the second pad.

Abstract: A convenient electronic circuit in which a switch is able to be switched through electric power obtained by weak radio waves is provided.

Abstract: Provided is a sensor device provided with improved reproducibility of a switching characteristic and reduced average consumption current. A sensor device include: a sensor; a drive circuit configured to drive the sensor; a processing circuit configured to output a binary result signal obtained by binarizing an electrical signal output from the sensor; a determination circuit configured to capture the binary result signal a plurality of times and perform a predetermined logical determination processing; a latch circuit configured to capture an output signal of the determination circuit; an output terminal; and a control circuit configured to output a control signal for intermittently controlling at least one of the drive circuit and the processing circuit such that an operation period and a pause period are repeated with a predetermined cycle. The operation period is interrupted and caused to transition to the pause period in a predetermined case.

Abstract: A shunt regulator includes: a capacitor, connected between an output terminal and a ground terminal; a voltage divider circuit and an output transistor, connected between the output terminal and the ground terminal; an error amplifier, controlling the output transistor based on a voltage at an output terminal of the voltage divider circuit and a reference voltage; a non-volatile memory; a memory control circuit, outputting a data read signal to the non-volatile memory; and a voltage detection circuit, detecting that a voltage at the output terminal has reached a predetermined voltage which permits a data reading operation of the non-volatile memory, and outputting a detection signal to the memory control circuit. An operating current of the non-volatile memory is supplied from the capacitor.

Abstract: An electrostatic protection circuit and a semiconductor device include: a first diode whose anode is connected to a signal terminal; a second diode whose cathode is connected to a cathode of the first diode and whose anode is connected to a GND terminal; and a depletion type MOS transistor connected in parallel with the first diode.

Abstract: The present invention provides a ?? AD converter and a sensor device having a small circuit scale and high conversion accuracy. A ?? AD converter includes a ?? AD modulator, an accumulator, a counter, an adjustment value storage part, a first adder, a cumulative value latch part, and a control circuit. The control circuit outputs to the adjustment value storage part a signal designating a temperature range according to the adjustment cumulative value received from the first adder in a case where the count value received from the counter reaches a predetermined value. The adjustment value storage part outputs the adjustment value of the offset value and the adjustment value of the count value according to the signal to the first adder and the counter. The control circuit outputs the latch signal to the cumulative value latch part in response to completion of counting by the counter.

Abstract: The ESD protection circuit includes an off transistor including: a P-type semiconductor substrate; an N-type well region formed in an upper portion of the semiconductor substrate; an N-type drain region formed in an upper portion of the well region and having a higher impurity concentration than the well region; an N-type source region formed apart from the drain region in the upper portion of the well region and having a higher impurity concentration than the well region; a gate insulating film formed between the drain region and the source region; a gate electrode formed on a surface of the gate insulating film; and a P-type high-concentration region formed in the upper portion of the well region to be in contact with at least the drain region near a corner portion of a channel region and having a higher impurity concentration than the well region.

Abstract: Provided is a semiconductor device. The semiconductor device includes a first circuit that includes a plurality of fixed resistance elements connected in series; a second circuit that includes a plurality of variable resistance elements connected in series and that is connected in series to the first circuit; a first cover portion that is provided on an upper layer side of the first circuit and that covers the first circuit; and a second cover portion that is provided on an upper layer side of the second circuit and that covers the second circuit. The first cover portion included two or more first metal films electrically connected, correspondingly, to units having any number of the fixed resistance elements, and the second cover portion includes a second metal film electrically connected to the plurality of the variable resistance elements.

Abstract: A voltage detection circuit, a charge control circuit, a charge and discharge control circuit, and a semiconductor device are provided. The voltage detection circuit includes: an input port; a plurality of transistors connected in series and including at least an input transistor including a gate connected to the input port, a source connected to a first power supply terminal, and a drain, and a first transistor including a drain connected to a second power supply terminal, a gate, and a source connected to the gate of the first transistor; and an output port configured to be one of connection points of the plurality of transistors.