Patents Assigned to ABLIC INC.
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Patent number: 11509267Abstract: An amplifier includes: a signal polarity inversion circuit which modulates an input signal and outputs a modulation signal; an amplifier circuit which is constituted from an operational transconductance amplifier (OTA) to amplify the modulation signal and output a current; and a sample-hold circuit having a sampling capacitor which is charged and discharged by selective sampling of the output current of the amplifier circuit and a holding capacitor to which the voltage of the sampling capacitor is transferred.Type: GrantFiled: October 16, 2020Date of Patent: November 22, 2022Assignee: ABLIC INC.Inventor: Yuji Shiine
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Patent number: 11500408Abstract: Provided is a reference voltage circuit including a first MOS transistor to a sixth MOS transistor, a first resistor and a second resistor, a current source circuit, and an output terminal. Five of the transistors form a differential transconductance amplifier, and an input transistor of the differential transconductance amplifier operates in the manner of weak inversion operation.Type: GrantFiled: January 26, 2021Date of Patent: November 15, 2022Assignee: ABLIC INC.Inventor: Toshiyuki Tanaka
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Patent number: 11482665Abstract: A semiconductor device includes a semiconductor substrate: a vertical Hall element formed in the semiconductor substrate, and having a magnetosensitive portion; a first excitation wiring disposed above the magnetosensitive portion, and configured to apply a first calibration magnetic field (M1) to the magnetosensitive portion; and second excitation wirings disposed above the magnetosensitive portion on one side and on another side of the first excitation wiring, respectively, along the first excitation wiring as viewed in plan view from immediately above a front surface of the semiconductor substrate, and configured to apply second calibration magnetic fields (M2) to the magnetosensitive portion.Type: GrantFiled: March 3, 2020Date of Patent: October 25, 2022Assignee: ABLIC INC.Inventors: Yohei Ogawa, Hirotaka Uemura
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Patent number: 11480464Abstract: Provided is an optical sensor including: a first photodetector including a first photodiode and having a first wavelength sensitivity characteristic; a first resistor having one end connected to a cathode of the first photodiode, and another end connected to a ground point; a second photodetector including a second photodiode and having a second wavelength sensitivity characteristic; a second resistor having one end connected to a cathode of the second photodiode, and another end connected to the ground point; and an amplifier circuit having a first input terminal connected to the first photodiode, a second input terminal connected to the second photodiode, and an output terminal configured to output a potential based on a potential of the first input terminal and a potential of the second input terminal, and using, as an operating power supply, electric power generated by electromotive force of the first photodetector and the second photodetector.Type: GrantFiled: October 28, 2020Date of Patent: October 25, 2022Assignee: ABLIC INC.Inventors: Fumiyasu Utsunomiya, Takakuni Douseki, Ami Tanaka
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Patent number: 11482976Abstract: A differential amplifier includes first and second MOS transistors of a first conductivity type which constitute a differential input circuit, a bias current source which supplies a bias current to the first and second MOS transistors, and a third MOS transistor of the first conductivity type provided between the bias current source and the first and second MOS transistors and constituted to limit a back-gate voltage of the first and second MOS transistors.Type: GrantFiled: January 28, 2021Date of Patent: October 25, 2022Assignee: ABLIC INC.Inventor: Yoshiomi Shiina
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Patent number: 11476206Abstract: A semiconductor element is mounted on a die pad, and electrode pads arranged along the outer circumference of an upper surface of the semiconductor element are electrically connected to leads by wires, respectively. The semiconductor element has an element region having a high sensitivity with respect to stress, and an element region having a relatively low sensitivity with respect to stress. A low-stress resin film is provided on the element region having a high sensitivity with respect to stress. The semiconductor element, the low-stress resin film, the die pad, and the leads are covered with an encapsulating resin.Type: GrantFiled: February 12, 2021Date of Patent: October 18, 2022Assignee: ABLIC INC.Inventor: Takahiro Kato
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Publication number: 20220317714Abstract: A shunt regulator includes: a capacitor, connected between an output terminal and a ground terminal; a voltage divider circuit and an output transistor, connected between the output terminal and the ground terminal; an error amplifier, controlling the output transistor based on a voltage at an output terminal of the voltage divider circuit and a reference voltage; a non-volatile memory; a memory control circuit, outputting a data read signal to the non-volatile memory; and a voltage detection circuit, detecting that a voltage at the output terminal has reached a predetermined voltage which permits a data reading operation of the non-volatile memory, and outputting a detection signal to the memory control circuit. An operating current of the non-volatile memory is supplied from the capacitor.Type: ApplicationFiled: January 25, 2022Publication date: October 6, 2022Applicant: ABLIC Inc.Inventor: Tsutomu TOMIOKA
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Publication number: 20220311425Abstract: A semiconductor device includes a magnetic switch provided on a semiconductor substrate. The magnetic switch includes: a Hall element, first and second power supply terminals; a current source driving the Hall element; a switch circuit switching a differential output voltage supplied from two electrodes of the Hall element to a first or second state based on a control signal supplied from a control terminal; an amplifier amplifying a signal from the switch circuit; a reference voltage circuit generating a reference voltage based on a reference common mode voltage and a control signal; a comparator receiving an output signal of the amplifier and the reference voltage; and a latch circuit latching an output voltage of the comparator. The reference voltage of the reference voltage circuit is controlled by switching from a reference value to a voltage with a high or low adjustment value according to the output voltage of the comparator.Type: ApplicationFiled: March 9, 2022Publication date: September 29, 2022Applicant: ABLIC Inc.Inventor: Tomoki HIKICHI
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Publication number: 20220308614Abstract: Provided is a shunt regulator including: multiple resistors, connected in series between an output terminal and a ground terminal and constituting a voltage divider circuit; an output transistor, connected between the output terminal and the ground terminal; a first drive circuit, including a first reference voltage circuit which outputs a first reference voltage and an error amplifier, and controlling the output transistor based on a voltage of a first output terminal of the voltage divider circuit; a second drive circuit, controlling the output transistor based on a voltage of a second output terminal of the voltage divider circuit; and an activation control circuit, switching operation of the first drive circuit and the second drive circuit based on the first reference voltage. The second drive circuit has a shorter activation time than the first drive circuit.Type: ApplicationFiled: March 17, 2022Publication date: September 29, 2022Applicant: ABLIC Inc.Inventors: Tsutomu TOMIOKA, Hideyuki SAWAI
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Patent number: 11451147Abstract: A transmission circuit includes: a resistor with one end connected to a first power supply; an output terminal connected to the other end of the resistor; an inductor with one end connected to the output terminal; a switch with one end connected to the other end of the inductor and the other end connected to a second power supply; a diode in which an anode is connected to the other end of the inductor and one end of the switch and which is conductive when the switch is off and non-conductive when the switch is on; and a load with one end connected to a cathode of the diode and the other end connected to the second power supply.Type: GrantFiled: April 23, 2020Date of Patent: September 20, 2022Assignee: ABLIC Inc.Inventor: Ryosuke Mori
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Publication number: 20220283204Abstract: A voltage monitoring device 2 includes: a comparator circuit 31; a state determination circuit 32; a pulse pattern setting circuit 33; an output circuit 36; a VDD port 21; a VSS port 22; an input port 24; and an output port 23. The comparator circuit 31 is connected to the state determination circuit 32. The state determination circuit 32 is connected to the pulse pattern setting circuit 33. The pulse pattern setting circuit is connected to the output port 23 via the output circuit 36.Type: ApplicationFiled: March 1, 2022Publication date: September 8, 2022Applicant: ABLIC Inc.Inventors: Yoichi SUTO, Atsushi SAKURAI
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Patent number: 11437984Abstract: Delay circuit includes: first to fourth transistors; capacitor; constant current source; and resistor. The first transistor has a gate connected to an input terminal, a source connected to the first power supply terminal, and a drain. The second transistor has a gate connected to an input terminal and the gate of the first transistor, a drain connected to the drain of the first transistor and the second terminal of the capacitor, and a source. The third transistor has a gate connected to a node between the drain of the first transistor, the drain of the second transistor, and the second terminal of the capacitor, a source connected to the second power supply terminal, and a drain. The fourth transistor has a gate connected to the node and the gate of the third transistor, a drain connected to the drain of the third transistor and an output terminal, and a source.Type: GrantFiled: November 2, 2021Date of Patent: September 6, 2022Assignee: ABLIC Inc.Inventor: Shigeyuki Okabe
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Patent number: 11424159Abstract: A semiconductor device, including: a first semiconductor element formed at a first surface on a substrate, and has a first electrode portion formed thereon a first metal silicide film; a second semiconductor element formed at a second surface at a higher position than the first surface, and has a second electrode portion formed thereon a second metal silicide film and a hydrogen supply film configured to cover a part of an upper portion of the second metal silicide film; an interlayer insulating film formed on the first semiconductor element and the second semiconductor element; a first contact hole formed through the interlayer insulating film until the first metal silicide film; a second contact hole formed through the interlayer insulating film and the hydrogen supply film until the second metal silicide film; and a metal wiring embedded in each of the first contact hole and the second contact hole.Type: GrantFiled: September 9, 2020Date of Patent: August 23, 2022Assignee: ABLIC INC.Inventor: Hideo Yoshino
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Patent number: 11422208Abstract: A magnetic sensor includes a magneto-sensitive portion (105); an excitation wiring (110) formed in a wiring region above the magneto-sensitive portion (105) through intermediation of an insulating film (12), the excitation wiring (110) including a plurality of conductor portions (1101, 1102, 1103, 1104, and 1105) arranged in in order across at least one radial direction from a center axis of the magneto-sensitive portion (105); a current flowing through the excitation wiring (110) having a current density of which an absolute value becomes zero in a vicinity of a center of the magneto-sensitive portion (105) and continuously increases toward an outer side of the magneto-sensitive portion (105); and a magnetic field generated by the current flowing through the excitation wiring (110) in a direction vertical to the surface of the magneto-sensitive portion (105).Type: GrantFiled: November 13, 2019Date of Patent: August 23, 2022Assignee: ABLIC INC.Inventor: Hirotaka Uemura
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Patent number: 11408946Abstract: Provided is a magnetic sensor circuit and includes: a magnetic sensor outputting a first sensor signal based on a magnetic flux density in a first direction; a magnetic sensor outputting a second sensor signal based on a magnetic flux density in a second direction orthogonal to the first direction; a signal processing circuit respectively obtaining a first detection signal and a second detection signal which transition between low and high levels based on the first magnetic sensor signal and the second magnetic sensor signal; a driver outputting a first output voltage based on the first detection signal; a driver outputting a second output voltage based on the second detection signal; and a voltage monitoring circuit generating mode signals whose signal levels transition based on transitions of voltage levels of the first output voltage and the second output voltage input thereto.Type: GrantFiled: July 28, 2021Date of Patent: August 9, 2022Assignee: ABLIC Inc.Inventor: Tomoki Hikichi
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Patent number: 11402863Abstract: Provided is a reference voltage circuit including a Zener diode having a cathode connected to a current source via a first node, and an anode connected to a ground point; a first resistor having one end connected to the first node; a second resistor having one end connected to another end of the first resistor; a first diode having an anode connected to another end of the second resistor via a second node, and a cathode connected to the ground point; and a current control circuit configured to generate a control current corresponding to an anode voltage of the first diode so that the current source supplies a reference current corresponding to the control current to the first diode.Type: GrantFiled: July 16, 2020Date of Patent: August 2, 2022Assignee: ABLIC INC.Inventor: Tsutomu Tomioka
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Publication number: 20220238418Abstract: The present invention provides a small and thin semiconductor device. The semiconductor device flip-chip bonds a semiconductor chip 1 and a lead 6 via a metal bonding portion 5 and includes a sealing resin covering them. The metal bonding portion 5 is provided with a gold-rich bonding layer 5a on the side of a first electrode 3a of the semiconductor chip 1 and a gold-rich bonding layer 5b on the side of a second electrode 3b of the lead 6, and connection between the semiconductor chip 1 and the lead 6 is strengthened, so that the semiconductor device does not require an anchor portion.Type: ApplicationFiled: December 27, 2021Publication date: July 28, 2022Applicant: ABLIC Inc.Inventor: Koji TSUKAGOSHI
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Publication number: 20220238510Abstract: A semiconductor device has an off transistor (10) in which a gate electrode (3) and a source region (6) of an N-type MOS transistor are connected to a ground terminal and a drain region (5) is connected to an external signal terminal (100b). In the off transistor (10), the gate electrode (3) is extensively provided over a portion or entirety of the drain region (5) in addition to a channel region. A capacitance (C2) formed between the gate electrode (3) and the drain region (5) may be greater than a capacitance (C1) generated between the gate electrode (3) and a ground potential.Type: ApplicationFiled: January 11, 2022Publication date: July 28, 2022Applicant: ABLIC Inc.Inventor: Hiroaki TAKASU
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Patent number: 11387825Abstract: An overheat protection circuit includes a first constant current source which supplies a first constant current to a temperature sensitive element, a first transistor provided between the temperature sensitive element and the first constant current source, an output current detection circuit which controls a gate voltage of the first transistor by a voltage based on a sense current corresponding to an output current of a semiconductor device, and an output circuit which supplies an overheat detection signal based on a result of comparison between a temperature sensitive current and the first constant current.Type: GrantFiled: November 20, 2019Date of Patent: July 12, 2022Assignee: ABLIC INC.Inventor: Kaoru Sakaguchi
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Patent number: 11367831Abstract: A semiconductor device includes a semiconductor substrate having a surface perpendicular to the first direction; a vertical Hall element formed in the semiconductor substrate, and including a magnetosensitive portion having a depth in the first direction, a width in the second direction, and a length in the third direction; and an excitation wiring extending in the third direction and disposed above the semiconductor substrate and at a position that overlaps the center position of the width of the magnetosensitive portion, and the value u derived from Expression (1) is 0.Type: GrantFiled: February 27, 2020Date of Patent: June 21, 2022Assignee: ABLIC INC.Inventors: Yohei Ogawa, Hirotaka Uemura