Patents Assigned to Agere Systems Inc.
  • Publication number: 20120128056
    Abstract: A method and apparatus are disclosed for performing joint equalization and decoding of multidimensional codes transmitted over multiple symbol durations. An RSSE scheme is disclosed that cancels the intrasymbol interference caused by other symbol components within the same multidimensional code symbol. The disclosed RSSE technique for multidimensional codes applies where the number of trellis code dimensions exceeds the number of channels. The disclosed RSSE decoder computes the intersymbol interference caused by previously decoded multidimensional code symbols and subtracts the intersymbol interference from the received signal. In addition, a branch metrics unit compensates for the intrasymbol interference caused by other symbol components within the same multidimensional code symbol.
    Type: Application
    Filed: November 22, 2011
    Publication date: May 24, 2012
    Applicant: AGERE SYSTEMS INC.
    Inventors: Kameran Azadet, Erich Franz Haratsch
  • Patent number: 8183698
    Abstract: According to certain embodiments, integrated circuits are fabricated using brittle low-k dielectric material to reduce undesired capacitances between conductive structures. To avoid permanent damage to such dielectric material, bond pads are fabricated with support structures that shield the dielectric material from destructive forces during wire bonding. In one implementation, the support structure includes a passivation structure between the bond pad and the topmost metallization layer. In another implementation, the support structure includes metal features between the topmost metallization layer and the next-topmost metallization layer. In both cases, the region of the next-topmost metallization layer under the bond pad can have multiple metal lines corresponding to different signal routing paths.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: May 22, 2012
    Assignee: Agere Systems Inc.
    Inventors: Joze E. Antol, John W. Osenbach, Kurt G. Steiner
  • Patent number: 8180061
    Abstract: The purpose of the invention is to bridge the gap between parametric multi-channel audio coding and matrixed-surround multi-channel coding by gradually improving the sound of an up-mix signal while raising the bit-rate consumed by the side-information starting from 0 up to the bit-rates of the parametric methods. More specifically, it provides a method of flexibly choosing an “operating point” somewhere between matrixed-surround (no side-information, limited audio quality) and fully parametric reconstruction (full side-information rate required, good quality). This operating point can be chosen dynamically (i.e. varying over time) and in response to the permissible side-information rate, as it is dictated by the individual application.
    Type: Grant
    Filed: July 19, 2006
    Date of Patent: May 15, 2012
    Assignees: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V., Agere System, Inc.
    Inventors: Johannes Hilpert, Christof Faller, Karsten Linzmeier, Ralph Sperschneider
  • Patent number: 8181258
    Abstract: Techniques are disclosed for generating a representation of an access control list, the representation being utilizable in a network processor or other type of processor to perform packet filtering or other type of access control list based function. A plurality of rules of the access control list are determined, each of at least a subset of the rules having a plurality of fields and a corresponding action, and the rules are processed to generate a multi-level tree representation of the access control list, in which each of one or more of the levels of the tree representation is associated with a corresponding one of the fields. At least one level of the tree representation other than a root level of the tree representation comprises a plurality of nodes, with at least two of the nodes at that level each having a separate matching table associated therewith.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: May 15, 2012
    Assignee: Agere Systems Inc.
    Inventors: Vinoj N. Kumar, Narender R. Vangati
  • Patent number: 8180600
    Abstract: In one embodiment, the invention is a method for modeling electrical behavior of a packaged module having multiple integrated circuits (ICs), such as a multi-chip module (MCM). The method includes: (a) identifying one or more pin groups in the module, wherein a pin group comprises two or more buffers connected together and to a package-external pin, and (b) generating one or more corresponding unified behavioral models for the one or more pin groups based on the characteristics of the buffers of the one or more pin groups. The behavioral models are part of an integrated behavioral model file in accordance with the I/O buffer information specification (IBIS) standard.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: May 15, 2012
    Assignee: Agere Systems Inc.
    Inventors: James D. Chlipala, Makeshwar Kothandaraman, Nirav Patel, Venu Babu Ummalaneni
  • Publication number: 20120113853
    Abstract: Methods and apparatus are provided for blind transport format detection using Discontinuous Transmission (DTX) detection. According to one aspect of the invention, the transport format that was used to transmit information is determined by identifying a transition between a Discontinuous Transmission segment and a data segment included in the transmitted information; and determining the transport format based on a location of the transition of the Discontinuous Transmission segment. A cyclic redundancy check can optionally be performed for a plurality of possible transport formats, and then the step of identifying a transition can be to limited to those transport formats having a valid cyclic redundancy check.
    Type: Application
    Filed: January 12, 2012
    Publication date: May 10, 2012
    Applicant: AGERE SYSTEMS INC.
    Inventors: Rafael Carmon, Tamir Scherzer, Eyal Yair
  • Patent number: 8175562
    Abstract: An apparatus including automatic gain control (AGC) includes at least one variable gain amplifier (VGA) operative to receive an input signal and to generate an amplified signal. A gain of the VGA is controlled as a function of at least a first control signal. The apparatus further includes an AGC circuit coupled to the VGA and being operative to generate the first control signal. The AGC circuit has a bandwidth that is controlled as a function of at least the amplified signal and a second control signal, the second control signal being indicative of a motion of the apparatus.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: May 8, 2012
    Assignee: Agere Systems Inc.
    Inventors: Roger A. Fratti, Xiao-an Wang
  • Patent number: 8175179
    Abstract: In one embodiment, the present invention is a method for reducing the peak-to-average power ratio (PAPR) of a multi-carrier modulated symbol, such as an orthogonal frequency division multiplexed (OFDM) symbol. The method first transforms a set of data symbols into a multi-carrier modulated symbol. The method then uses the multi-carrier modulated symbol and a gradient-descent algorithm to generate a set of symbols for PAPR-reduction tones. The data symbols and the PAPR-reduction symbols are then transformed to generate an updated multi-carrier modulated symbol. The PAPR-reduction symbols are iteratively updated until a terminating condition occurs (e.g., an acceptable PAPR is achieved for the multi-carrier modulated symbol).
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: May 8, 2012
    Assignee: Agere Systems Inc.
    Inventors: Jayant Baliga, Alexander J. Grant, Adriel P. Kind, Graeme K. Woodward
  • Patent number: 8174784
    Abstract: Various embodiments of the present invention provide systems and methods for controlling access to a magnetic storage medium. As one example, a method for controlling access to a magnetic storage medium is disclosed that includes providing a location count indicating a location between a portion of a first servo data sector of a magnetic storage media and a portion of a second servo data sector of the magnetic storage media, and asserting an enable window signal based upon the location count.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: May 8, 2012
    Assignee: Agere Systems Inc.
    Inventors: Jeffrey P. Grundvig, Richard Rauschmayer, Timothy T. Ding
  • Patent number: 8176367
    Abstract: Various embodiments of the present invention provide systems and methods for managing solid state drives. As an example, a storage system is described that include at least a first flash memory block and a second flash memory block, and a control circuit. The first flash memory block and the second flash memory block are addressable in the storage system. The control circuit is operable to identify the first flash memory block as partially failed, receive a write request directed to the first flash memory block; and direct the write request to the second flash memory block.
    Type: Grant
    Filed: May 28, 2009
    Date of Patent: May 8, 2012
    Assignee: Agere Systems Inc.
    Inventors: David L. Dreifus, Robert W. Warren, Brian McKean
  • Publication number: 20120106316
    Abstract: A method and apparatus are disclosed for canceling cross-talk in a frequency-division multiplexed communication system. The disclosed frequency-division multiplexed communication system employs multiple carriers having overlapping channels and provides an improved cross-talk cancellation mechanism to address the resulting interference. Bandwidth compression is achieved using n level amplitude modulation in each frequency band. An FDM receiver is also disclosed that decomposes the received broadband signal into each of its respective frequency bands and returns the signal to baseband in the analog domain. Analog requirements are relaxed by removing cross-talk from adjacent RF channels, from image bands, and minimizing the performance degradation caused by In-phase and Quadrature-phase (I/Q) phase and gain mismatches in modulators and demodulators. The disclosed transmitter or receiver (or both) can be fabricated on a single integrated circuit.
    Type: Application
    Filed: January 12, 2012
    Publication date: May 3, 2012
    Applicant: AGERE SYSTEMS INC.
    Inventor: Kameran Azadet
  • Patent number: 8169844
    Abstract: A memory circuit includes an operational memory and a monitor circuit comprising a circuit element in the operational memory and/or a circuit element substantially identical to a corresponding circuit element in the operational memory. The monitor circuit is operative to measure at least one functional characteristic of the operational memory. A control circuit coupled to the monitor circuit is operative to generate a control signal which varies as a function of the measured characteristic of the operational memory. The memory circuit further includes a programmable voltage source coupled to the operational memory which is operative to generate at least a voltage and/or a current supplied to at least a portion of the operational memory which varies as a function of the control signal.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: May 1, 2012
    Assignee: Agere Systems Inc.
    Inventors: Kouros Azimi, Roger A. Fratti, Danny Martin George, Richard J. McPartland
  • Patent number: 8169891
    Abstract: A method of processing cells in a communication system includes obtaining a cell, causing it to be stored, determined if it is associated with a loss event, and if so, causing it to be tagged with a lost cell indicator. An apparatus for processing cells includes a cell processing module and a cell buffer interface that can interface with a cell buffer. The processing module is configured to obtain a cell, cause it to be stored through the buffer interface, determine if it is associated with a loss event, and if so, cause it to be tagged with a lost cell indicator. The lost cell indicator can preferably be a compressed lost cell indicator. The inventive tagging enhances computational efficiency compared to approaches that require moving a stored cell to make room for a complete dummy cell.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: May 1, 2012
    Assignee: Agere Systems Inc.
    Inventor: Kenneth Isley
  • Patent number: 8170165
    Abstract: In one embodiment, an improvement is described for synchronization between devices in, e.g., a wireless network, wherein at least one device includes both a slow clock and a fast clock for different modes of operation. The fast clock for an active mode of operation is calibrated after a sleep mode of operation during which the slow clock is employed for device timing. Calibration employs a filter-based technique. Counts for the slow clock and for the fast clock are measured over a first interval, and the number of slow-clock counts is measured over a second interval. An estimate for the number of fast counts over the second interval is generated, filtered to reduce noise and error effects, and then employed to update the fast clock in the active mode of operation.
    Type: Grant
    Filed: November 12, 2008
    Date of Patent: May 1, 2012
    Assignee: Agere Systems Inc.
    Inventors: Binyamin Arviv, Doron Kalil, Efraim Orian, Eyal Yair
  • Patent number: 8171269
    Abstract: Various embodiments of the present invention provide systems and methods for branch prediction. As an example, some embodiments of the present invention provides processor circuits that include a program address circuit, a branch target buffer, a branch prediction replacement circuit, and an execution pipeline. The branch target buffer includes a plurality of entries each associated with a respective change of flow instruction. Each entry includes an indication of an entry source and a next program address corresponding to the respective change of flow instruction. The branch prediction replacement circuit is operable to determine replacement priorities of the plurality of entries based at least in part on the entry source for each of the plurality of entries. The execution pipeline receives an executable instruction corresponding to one of the next program addresses.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: May 1, 2012
    Assignee: Agere Systems Inc.
    Inventors: Alexander Rabinovitch, Leonid Dubrovin
  • Patent number: 8165253
    Abstract: Methods and apparatus are provided for serializer/deserializer transmitter synchronization. A plurality of channels are synchronized in one or more serializer/deserializer devices by generating a synchronization request in one or more of the channels; generating an enable signal in response to the synchronization request; and generating a gated synchronization signal for only one or more periods of a synchronization signal in response to the enable signal. The gated synchronization signal can optionally be deasserted after the one or more periods of a synchronization signal.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: April 24, 2012
    Assignee: Agere Systems Inc.
    Inventors: Christopher J. Abel, Vladimir Sindalovsky, Lane A. Smith
  • Patent number: 8165149
    Abstract: A medium-reservation mechanism improves transmission efficiency in a multiple-channel network that includes stations with limited-selectivity receivers. The mechanism employs a medium-request signal that conveys channel information. In this network, stations check the channel information in the medium-request signal to decide whether or not to comply with the medium-request signal. If the channel information identifies the channel that is close to the channel that the station is presently operating on, the station then complies with the medium-request signal. If the channel information identifies a channel other than the channel that the station is presently operating on, the station ignores the medium-request signal.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: April 24, 2012
    Assignee: Agere Systems Inc.
    Inventors: Wilhelmus Diepstraten, Richard M. van Leeuwen, Leo Monteban
  • Patent number: 8165257
    Abstract: A circuit for data stream buffer management, lane alignment, and clock compensation of data transfers across a clock boundary using a single first in first out (FIFO) buffer in each serial channel is described. The RapidIO® data channel, for example, operates using a clock recovered from the data stream. The RapidIO® data stream has embedded special characters, where a select sequence of embedded characters is a clock compensation pattern. A look ahead circuit is used to detect the clock compensation pattern early and generate a clock compensation indicator signal. The FIFO writes data and the associated clock compensation indicator signal in a clock compensation indicator bit in synchronism with the recovered clock. A read circuit using a second clock of a different frequency than the first clock reads data and clock compensation bits from the FIFO and generates an almost empty signal when appropriate. A multiplexer is used at the FIFO output to pad data to the system interface.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: April 24, 2012
    Assignee: Agere Systems Inc.
    Inventor: Brijesh Tripathi
  • Patent number: 8165180
    Abstract: Embodiments of the invention include a laser structure having a delta doped active region for improved carrier confinement. The laser structure includes an n-type cladding layer, an n-type waveguide layer formed adjacent the n-type cladding layer, an active region formed adjacent the n-type waveguide layer, a p-type waveguide layer formed adjacent the active region, and a p-type cladding layer formed adjacent the p-type waveguide layer. The laser structure is configured so that a p-type dopant concentration increases across the active region from the n-type side of the active region to the p-type side of the active region and/or an n-type dopant concentration decreases across the active region from the n-type side of the active region to the p-type side of the active region. The delta doped active region provides improved carrier confinement, while eliminating the need for blocking layers, thereby reducing stress on the active region caused thereby.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: April 24, 2012
    Assignee: Agere Systems, Inc.
    Inventor: Joseph Michael Freund
  • Patent number: 8161357
    Abstract: Various embodiments of the present invention provide systems and methods for data regeneration. For example, a system for data regeneration is disclosed that includes a data input derived from the medium. A data detector and a data recovery system receive the data input. The data detector provides a first soft output, and the data recovery system provides a second soft output. The first soft output and the second soft output are provided to a multiplexer. A media defect detector performs a media defect detection process, and provides a defect flag that indicates whether the data input is derived from a defective portion of the medium. The defect flag is provided to the multiplexer where it is used to select whether the first soft output or the second soft output is provides as an extrinsic output.
    Type: Grant
    Filed: April 29, 2008
    Date of Patent: April 17, 2012
    Assignee: AGERE Systems Inc.
    Inventors: Weijun Tan, Shaohua Yang, George Mathew, Kelly Fitzpatrick, Hao Zhong, Yuan Xing Lee