Abstract: An image sensor may be provided with an array of imaging pixels. A color filter array may be formed over photosensitive elements in the pixel array. The color filter array may include color filter elements of different sizes. The color filter array may include color filter elements of at least three different sizes. The color filter array may include color filter elements of only two different sizes. Each color filter element by be square, octagonal, or rectangular. Microlenses of different sizes may also be formed on top of the color filter elements of different sizes. Forming color filter elements with different sizes may help skew the quantum efficiency for light at particular wavelengths of interest so that smaller pixel sizes can be used without suffering from diffraction limits.

Abstract: An imaging system may include an image sensor having an array of image pixels. Some image pixels in the array may be provided with responsivity adjustment structures. For example, broadband pixels in a pixel array may include responsivity adjustment circuitry. The responsivity adjustment circuitry may be configured to narrow the spectral response or to reduce the conversion gain of the broadband pixels in high light conditions. For example, a deep photodiode may divert charge away from a signal photodiode during an integration period. The deep photodiode may divert charge to a power supply or the charge may be transferred to a storage node and used in image processing, if desired. The responsivity adjustment circuitry may include channel-dependent conversion circuitry that is formed in pixels corresponding to a first color channel, while the conversion gains of pixels corresponding to a second color channel may remain fixed.

Abstract: An imaging system may include a camera module with an image sensor having an array of image sensor pixels and one or more lenses that focus light onto the array. The system may include processing circuitry configured to mitigate flare artifacts in image data captured using the array based on at least one image flare map. The image flare map may identify a portion of the captured image data on which to perform image flare mitigation operations. The processing circuitry may perform image flare mitigation operations such as pixel value desaturation on the identified portion of the captured image data without desaturating portions of the image data that do not include flare artifacts. The flare map may be generated using a calibration system that characterizes the location, intensity, and color of all possible image flare artifacts that may be generated by the imaging system during normal imaging operations.

Abstract: An imaging system may include an image sensor having an array of image pixels. Some image pixels in the array may be provided with spectral response adjustment structures. For example, a plurality of broadband pixels in the array may include spectral response adjustment structures. The spectral response adjustment structures may be configured to narrow the spectral response of the broadband pixels in high light conditions. For example, the spectral response of the broadband pixels may transition from clear to gray, from clear to green, or from yellow to green as the light level increases. The spectral response adjustment structures may, for example, be formed from photochromic materials or electrochromic elements. Processing circuitry in the imaging system may generate a color correction matrix for an image based at least partly on the state of the spectral response adjustment structures.

Abstract: Imagers may include analog-to-digital converter circuitry that produces a digital output code from an analog input voltage. The analog-to-digital converter circuitry may include a series of capacitors including a first set of binary-mapped capacitors. The analog-to-digital converter circuitry may include a second set of one or more capacitors that have capacitances that are less than binary-mapped capacitance values. The digital output code may include bits having respective bit positions within the digital output code. During successive-approximation operations performed by the analog-to-digital converter circuitry, each bit of the digital output code may be produced using a corresponding capacitor. Digital processing circuitry such as an image processor may produce a digital value from the digital output code by multiplying the bits of the digital output code with respective weights determined based on the capacitance of the corresponding capacitors.

Abstract: Electronic devices may include time-of-flight (ToF) image pixels. Each ToF pixel may include a photodiode, a first capacitor coupled to the photodiode via a first transfer gate, a second capacitor coupled to the photodiode via a second transfer gate, and a third capacitor coupled to the photodiode via a third transfer gate. The first transfer gate may be turned on for a given duration to store a first charge in the first capacitor. The second transfer gate may be turned on for the given duration to store a second charge in the second capacitor. The third transfer gate may be turned on for a duration that is longer than the given duration to store a third charge in the third capacitor. Depth information may be computed based on the first, second, and third stored charges and a corresponding pixel constant.

Abstract: An array of color filter elements may be formed over an array of photodiodes in an integrated circuit for an imaging device using a carrier substrate. The carrier substrate may have a planar surface with a release layer. A layer of color filter material may be applied to the release layer. The carrier substrate may then be flipped and the layer of color filter material may be bonded to the integrated circuit. Heat may be applied to activate the release layer and the carrier substrate may be removed at the interface between the release layer and the color filter material. The layer of color filter material may be patterned either before bonding the layer of color filter material or after the carrier substrate is removed. A layer of microlenses may be formed over the array of color filter elements using a carrier substrate.

Abstract: An image sensor may have an array of image pixels arranged in color filter unit cells that each have at least one red image pixel that generates red image signals, at least one blue image pixel that generate blue image signals, at least one clear image pixels that generate clear image signals, at least one infrared image pixel that generates infrared image signals, and optionally at least one green image pixel that generates green image signals. The image sensor may be coupled to processing circuitry that performs chroma demosaicking operations on the image signals. The processing circuitry may generate an infrared image using the infrared image signals and a luminance value using the clear, red, blue, and infrared image signals. The processing circuitry may perform point filter operations on the image signals based on the generated luminance value to produce corrected visible light image signals having improved image quality.

Abstract: An image sensor having an array of pixels and a silicon substrate may be provided. In one embodiment, the array of pixels may have pixels of equal charge storage capacity but with varying sizes and thus varying sensitivities. For example, a first pixel may have a larger charge-generating volume than a second pixel. In another suitable embodiment, the charge storage capacity of the image sensor pixels may be varied while the charge-generating volume remains the same. These configurations are achieved by placing a p+ type doped layer in the silicon substrate close to and parallel to the surface of the array. The p+ type doped layer may include a plurality of openings to allow photo-generated carriers to flow from the silicon bulk to the charge storage wells located near the surface of the substrate.

Abstract: An imaging system may include a camera module with an image sensor having an array of image sensor pixels. The image sensor may include a substrate having an array of photodiodes, an array of microlenses formed over the array of photodiodes, and an array of color filter elements interposed between the array of microlenses and the array of photodiodes. A grid of baffles may be formed over the array of image pixels and may be configured to block stray light from striking the image pixels. The baffles may extend above the microlens array and may be tilted at an angle with respect to the optical axis of the image sensor. The angle at which each baffle is tilted may be proportional to the chief ray angle of an associated microlens. Baffles may be formed from a light-blocking material such as metal, photoresist, carbon, graphite, or other suitable material.

Abstract: An imager may include an array of pixels formed on a substrate. A chemisorption layer such as a planar chemisorption layer may be deposited over the array of pixels. The chemisorption layer may include active sites that bond with anchoring molecules. The anchoring molecules may be bonded to the planar chemisorption layer in only localized regions each covering a respective pixel of the array of pixels. The image sensor may include a photoresist layer that covers the chemisorption layer. Openings in the photoresist layer may define the boundaries of the localized regions. The anchoring molecules may be bonded only with the chemisorption layer without bonding to the photoresist layer. The anchoring molecules may serve to bond with analyte molecules. By forming the anchoring molecules within only localized regions centered over respective pixels, spatial resolution of the imager when imaging the analyte molecules may be improved.

Abstract: A method of suppressing a dark halo in an imager includes the steps of: extracting an edge value from an image; determining a chroma zone associated with the edge value extracted from the image; and modifying the edge value based on the chroma zone associated with the extracted edge value. The modified edge value from the imager is then provided to a user. The step of determining the chroma zone includes determining a chroma value of Cr and Cb in a Y-Cr-Cb color space; and modifying the edge value includes multiplying the edge value by a predetermined gain value, k, depending on the chroma value of Cr and Cb. If the value of Cr is greater than zero, then the gain value k is set close to zero, in order to suppress the dark halo in the modified edge value. On the other hand, if the value of Cr is less than zero, then the gain value k is set close to one, in order to sharpen the modified edge value in the image.

Abstract: An electronic device may be provided a plasmonic light sensor. Plasmonic light sensors may include arrays of plasmonic image pixels that detect evanescent electron density waves, or plasmons, generated in the plasmonic image pixel through an interaction with incoming light. Plasmonic image pixels may include microlenses that focus the light onto conducting wires in the plasmonic image pixel. Plasmons generated on the surface of the conducting wire may propagate along the conducting wire. Detector circuitry may be coupled to the wire on which the plasmons propagate to detect the light through detection of the evanescent electron density wave. Detector circuitry may include a biasing component for biasing a photodiode such that a small amount of light results in an avalanche of charge, or a sudden increase in current, produced in the detector circuitry in response to the evanescent wave.

Abstract: An imaging system may include an array of image pixels and verification circuitry. The verification circuitry may inject a test voltage into the pixel signal chain of a test pixel. The test voltage may be output on a column line associated with the column of pixels in which the test pixel is located. The test signal may be provided to a column ADC circuit for conversion from an analog test signal to a digital test signal. Verification circuitry may compare the digital output test signal with a predetermined reference signal to determine whether the imaging system is functioning properly (e.g., to determine whether column ADC circuits or other circuit elements in the pixel signal chain are functioning properly). If the output test signals do not match the expected output signals, the imaging system may be disabled and/or a warning signal may be presented to a user of the system.

Abstract: Electronic devices may include image sensors having image pixel arrays with image pixels arranged in pixel rows and pixel columns. Each pixel column may be coupled to an active and an inactive current supply circuit. Each active current supply circuit may form a portion of a current mirror circuit that includes a common current source and a common input transistor. Each active current supply circuit may include a mirror transistor for mirroring current that flows through the common input transistor and a permanently enabled enabling transistor for activating that mirror transistor. Mirrored current that flows through a particular active mirror transistor may be supplied to image pixels in the pixel column associated with that particular mirror transistor. Each inactive current supply circuit may include a mirror transistor coupled to the input transistor and a permanently disabled enabling transistor.

Abstract: A handheld diagnostic system may include a disposable sample holder and an analysis module having a chip-scale microscope. The sample holder may have a transparent portion having test chambers for containing respective portions of a biological sample. The analysis module may having a housing with an opening configured to receive the transparent portion of the sample holder. The chip-scale microscope may include an image sensor for capturing images of the biological sample as the transparent portion of the sample holder is inserted into the opening of the analysis module. The analysis module may include a light source for illuminating the sample during image capture operations and optics for gathering light from the sample and focusing the light onto the image sensor. The analysis module may transmit sample imaging information to a portable electronic device, which may in turn display corresponding sample analysis information for a user.

Abstract: An imaging system may include an image sensor array and circuitry that rotates and encodes images from the image sensor array. The circuitry may encode images from the image sensor into an image format such as a Joint Photographic Experts Group (JPEG) format. The circuitry may perform rotations of the images during encoding into Joint Photographic Experts Group (JPEG) format. Image rotations during encoding and compression may include redefining minimum coded units of the encoded image such that minimum coded units of a rotated image are processed in the same order as minimum coded units in a non-rotated image. Redefinition of minimum coded units may include rewriting of parameters in a start of frame segment of an image data stream such that the height and width of minimum coded units are reversed during rotation.

Abstract: The invention describes in detail a solid-state CMOS image sensor, specifically a CMOS image sensor pixel that has stacked photo-sites, high sensitivity, and low dark current. The pixels have incorporated therein special potential barriers under the standard pinned photodiode region that diverts the photo-generated electrons from a deep region within the silicon bulk to separate storage structures located at the surface of the silicon substrate next to the pinned photodiode. The storage structures are p channel BCMD transistors that are biased to a low dark current generation mode during a charge integration period. The signal readout from the BCMD is nondestructive, therefore, without kTC noise generation. Thus a single pixel is capable of detecting several color-coded signals while using fewer or without using any light absorbing color filters on top of the pixel.

Abstract: An image sensor pixel suitable for use in a back-side-illuminated or a front-side-illuminated sensor arrangement is provided. The image sensor pixel may be a small size pixel that includes a source follower implemented using a vertical junction field effect (JFET) transistor. The vertical JFET source follower may be integrated directly into the floating diffusion node, thereby eliminating excess metal routing and pixel area typically allocated for the source follower in conventional pixel configurations. Pixel area may instead be allocated for increasing the charge storage capacity of the photodiode or can be used to reduce pixel size while maintaining pixel performance. Using a vertical junction field effect transistor in this way simplifies pixel addressing operations and minimizes random telegraph signal (RTS) noise associated with small size metal-oxide-semiconductor (MOS) transistors.

Abstract: An imaging system may include an image sensor having an array of image pixels. Each image pixel may include an electronic shutter for controlling when a photosensor in the image pixel accumulates charge. The electronic shutter may be operable in an open state during which charge is allowed to accumulate on the photosensor and a closed state during which charge is drained from the photosensor. The electronic shutter may be cycled through multiple open and closed states during an image frame capture. At the end of each open state, the charge that has been acquired on the photosensor may be transferred from the photosensor to a pixel memory element. By breaking up the total exposure time for a pixel during an image frame into shorter, non-continuous periods of exposure time, dynamic scenery image artifacts may be minimized while maintaining the desired total exposure time.