Abstract: Double pass back side image (BSI) sensor systems and methods are disclosed. The BSI sensor may include a substrate, pixel reflectors formed on the substrate, and pixel photodiodes fabricated in the substrate, each pixel photodiode positioned over a respective one of the pixel reflectors. Micro-lenses may be formed over each photodiode and an image filter may be formed between the photodiodes and the micro-lenses. The pixels reflectors, photodiodes, micro-lenses, and filter may be formed using CMOS fabrication.

Abstract: Imaging systems may be provided with image sensors having verification circuitry. Verification circuitry may be configured to continuously or occasionally verify that the image sensor is functioning properly. For example, verification circuitry may be configured to monitor levels of leakage current during standby mode. Verification circuitry may be coupled between a power supply and circuitry that is powered by that power supply. When the imaging system is in standby mode, circuitry associated with the imaging system such as pixel circuitry may draw a standby leakage current. Verification circuitry may be configured to measure the amount of standby leakage current drawn by associated imaging system circuitry. If the measured level of standby leakage current exceeds a maximum acceptable level of standby leakage current, a warning signal may be generated. Standby leakage current levels on multiple power supply lines may be monitored with associated verification circuitry.

Abstract: Methods and devices that incorporate microlens arrays are disclosed. An image sensor includes a pixel layer and a dielectric layer. The pixel layer has a photodetector portion configured to convert light absorbed by the pixel layer into an electrical signal. The dielectric layer is formed on a surface of the pixel layer. The dielectric layer has a refractive index that varies along a length of the dielectric layer. A method for fabricating an image sensor includes forming an array of microlenses on a surface of the dielectric layer, emitting ions through the array of microlenses to implant the ions in the dielectric layer, and removing the array of microlenses from the surface of the dielectric layer.

Abstract: An imager may include analog-to-digital converter circuitry that converts an analog input voltage to a digital output value by generating a number of samples of the analog input voltage. The analog input voltage may be formed from the difference between a pixel signal and a reference signal received at first and second inputs of the analog-to-digital converter circuitry. Processing circuitry may control the number of samples generated from the analog input voltage based on a desired gain level. The analog-to-digital converter circuitry may include a counter that counts to a maximum value. Ramp generation circuitry may generate a ramp signal based on the counter value and apply the ramp signal to the pixel signal at the first input of the analog-to-digital converter circuitry. The total time for generating samples for each different desired gain level may be constant while generating the ramp signal with a slope having a constant magnitude.

Abstract: An imaging system may include an imager integrated circuit with frontside components such as imaging pixels and backside components such as color filters and microlenses. The imager integrated circuit may be mounted to a carrier wafer with alignment marks. Bonding marks on the carrier wafer and the imager integrated circuit may be used to align the carrier wafer accurately to the imager integrated circuit. The alignment marks on the carrier wafer may be read, by fabrication equipment, to align backside components of the imager integrated circuit, such as color filters and microlenses, with backside components of the imager integrated circuit, such as photodiodes.

Abstract: A method of testing analog and digital paths of a pixel in a row of an imager, includes the following steps: (a) injecting first and second charges into the analog path of the pixel, wherein the first charge is in response to a light exposure, and the second charge is in response to a built-in test; (b) sampling the first and second charges to form an image signal level and a test signal level, respectively; and (c) converting, by an analog-to-digital converter (ADC), the image signal level and the test signal level to form image data and test data, respectively. The method then validates the image data based on the test data.

Abstract: An electronic device may be provided with imaging modules or communications modules. Imaging modules and communications modules may be improved with the use of plasmonic light collectors. Plasmonic light collectors exploit the interaction between incoming light and plasmons in the plasmonic light collector to redirect the path of the incoming light. Plasmonic light collectors may be used to form lenses for image pixels in an imaging module or to form light pipes or lenses for use in injecting optical communications into a fiber optic cable. Plasmonic lenses may be formed by lithography of metallic surfaces by implantation or by stacking and patterning of layers of materials having different dielectric properties. Plasmonic image pixels may be smaller and more efficient than conventional image pixels. Plasmonic light guides may have significantly less signal loss than conventional lenses and light guides.

Abstract: Systems and methods are provided for an adjustable filter engine. In particular, an electronic system is provided that can include a focus module, memory, and control circuitry. In some embodiments, the focus module can include an adjustable filter engine and a motor. By using the adjustable filter engine to generate a filter with a large number of filter coefficients, the control circuitry can accommodate a variety of system characteristics. For example, by generating a set of cumulative coefficients and re-arranging the order of the cumulative coefficients, the control circuitry can reduce the bit-width requirements of the adjustable filter engine hardware. For instance, the control circuitry can reduce the number of multipliers required to perform a convolution between an updated filter and one or more input signals. In some embodiments, the updated filter can be generated to reduce oscillations of the motor movement due to a new position request.

Abstract: This is generally directed to systems and methods for providing shiftable column circuitry for a pixel array of an imaging system. Columns of a pixel array can be switchably coupled (e.g., through multiplexers) to their default column circuitry as well as coupled to one or more instances of a neighboring column's column circuitry. In response to an instance of default column circuitry being identified as defective, its corresponding column may “shift” and choose to couple to the neighboring column circuitry. Similarly, all following columns may also shift and couple to a neighboring column circuitry. In some embodiments, the defective column circuitry can be identified during wafer testing and identifying information (e.g., an address) of the defective column circuitry stored in memory. The identifying information may then be accessed from memory and, during an image signal readout phase, used to suitably shift the columns to avoid the defective column circuitry.

Abstract: This is generally directed to systems and methods for reduced metal lines and control signals in an imaging system. For example, in some embodiments a pixel cell of an imaging system can operate without a row select transistor, and therefore can operate without a row select metal control line. As another example, in some embodiments a pixel cell can share its reset transistor control line with a transfer transistor control line of another pixel cell. In this manner, an imaging system can be created that averages a single metal line per pixel cell. In some embodiments, operation of such reduced-metal line imaging systems can use modified timing schemes of control signals.

Abstract: An image sensor having small pixels with high charge storage capacity, low dark current, no image lag, and good blooming control may be provided. The high charge storage capacity is achieved by placing a p+ type doped layer under the pixel charge storage region with an opening in it for allowing photo-generated charge carriers to flow from the silicon hulk to the charge storage well located near the surface of the photodiode. A compensating n-type doped implant may be formed in the opening. Image lag is prevented by placing a p? type doped region under the p+ type doped photodiode pinning layer and aligned with the opening. Blooming control is achieved by adjusting the length of the transfer gate in the pixel and thereby adjusting the punch-through potential under the gate.

Abstract: An imaging system may include an array of image pixels. The array of image pixels may be provided with one or more rows and columns of optically shielded dark image pixels. The dark image pixels may be used to produce verification image data that follows the same pixel-to-output data path of light-receiving pixels. The output signals from dark pixels may be continuously or intermittently compared with a set of expected output signals to verify that the imaging system is functioning properly. In some arrangements, verification image data may include a current frame number that is encoded into the dark pixels. The encoded current frame number may be compared with an expected current frame number. In other arrangements, dark pixels may be configured to have a predetermined pattern of conversion gain levels. The output signals may be compared with a “golden” image or other predetermined set of expected output signals.

Abstract: Pixels for solid-state CMOS image sensor arrays may be provided that have a lateral blooming control structure incorporated in them. The lateral blooming control structure is built as a separate structure from the charge transfer gate and it is fabricated in a self-aligned manner, which is particularly suitable for incorporating into small size pixels. The blooming control structure can be used for backside or for front side illuminated image sensors. When the lateral blooming control structure is provided with a separate bias means, it may also be used for the complete or partial charge removal from the photodiode and thus used in pixels that are designed for global shutter operation.

Abstract: Row-control signal monitoring system for an electronic imager includes signal processing circuitry coupled a pixel array of the electronic imager which receives at least one row control signal from the pixel array and provides an output signal corresponding to the selected row control signal. Monitoring circuitry compares the output signal to a target value to test the at least one row-control signal.

Abstract: Electronic devices may include image sensors having image sensor pixels arranged in rows and columns. Pixels arranged along a column may be coupled to a common column line. Two or more column lines may by coupled to a shared analog-to-digital converter circuit. The shared analog to digital converter circuit may sample and hold reset-level or image-level voltages presented on the column line. The shared analog to digital converter circuits may pre-amplify and convert the voltages to digital signals. The shared analog-to-digital converter may simultaneously sample pixel voltages for all columns in a selected row of the pixel array. The image sensor may read the converted signals out of memory for an active row in the pixel array while simultaneously sampling and holding the voltages for the next row of the pixel array.

Abstract: Electronic devices may include image sensors and processing circuitry. Image sensors may be used to capture multiple exposure images. Processing circuitry may be used to combine multiple exposure images into high-dynamic-range images. A motion correction method is provided that detects motion between multiple exposure images without using a frame buffer. A noise model is used to separate noise from motion for more accurate motion detection. A dilation operator may be used to enlarge a motion mask generated by the motion detector. Motion-corrected images may be generated from the multiple exposure images using a soft switch based on the motion strength. Motion-corrected multiple exposure images may be combined to generate a motion-corrected HDR image. A smoothing filter may be applied to the motion region of the motion-corrected HDR image. A blooming correction may be used to eliminate color artifacts in the motion-corrected HDR image.

Abstract: An electronic device may have an array of image sensors that capture image data using different exposure times. Processing circuitry may be used to combine image data with a first exposure time and image data with a second exposure time to create a high-dynamic-range image. The image sensors may use electronic rolling shutter and global shutter image capture schemes. Using the electronic rolling shutter scheme, the reset signals for each sensor may be staggered and the read signals for each sensor may be aligned to allow synchronized readout from the image sensors. When using the global shutter scheme, image capture operations associated with a shorter exposure time may be centered in time within image capture operation associated with a longer exposure time to minimize motion artifacts. Multiple image sensors may also be used to capture short-exposure-time data that is spaced evenly in time within the longer exposure time data.

Abstract: Common electronic devices having imaging systems that use a rolling shutter scheme suffer from flicker due to the oscillating brightness of an illuminating light source. Some imaging systems use fast frame rates that result in less than two cycles of the illuminating light source occurring during a single frame capture. For devices that employ rolling shutter schemes and fast frame rates, a method of data collection and processing is provided that utilizes a combination of multiple sets of more than two image data frames to automatically detect flicker. Measured patterns of energy differences between various image frames and a reference image frame may be compared with an expected pattern of energy differences to determine a probability of flicker detection due to a given flicker frequency. This probability of flicker detection may be used to activate flicker avoidance procedures in an electronic device.

Abstract: An imager including a self test mode. The imager includes a pixel array for providing multiple pixel output signals via multiple columns; and a test switch for (a) receiving a test signal from a test generator and (b) disconnecting a pixel output signal from a column of the pixel array. The test switch provides the test signal to the column of the pixel array. The test signal includes a test voltage that replaces the pixel output signal. The test signal is digitized by an analog-to digital converter (ADC) and provided to a processor. The processor compares the digitized test signal to an expected pixel output signal. The processor also interpolates the output signal from a corresponding pixel using adjacent pixels, when the test switch disconnects the pixel output signal from the column of the pixel array.

Abstract: An integrated circuit may have rows and columns of imaging pixel arrays. Row driver circuitry and column readout circuitry may be shared between the imaging pixel arrays. Control circuit blocks may bypass inactive pixel arrays and may shift signals between different signal paths on the integrated circuit. The control circuit blocks may include synchronizing circuitry for deskewing control signals and buffer circuitry for regenerating weak signals as they are distributed across the integrated circuit. An array of lenses may be associated with the integrated circuit. The spacing between imaging pixel arrays may differ at different parts of the integrated circuit. Images from multiple image sensor pixel arrays may be combined to form a single digital image. Image sensors may be provided with unique lenses, different color responses, different image pixels, different image pixel patterns, and other differences. Reference pixels may be interposed in the gaps between image sensor arrays.