Abstract: The invention relates to the improvement of the passband of physical systems. Use is made of a finite impulse response filter which is calculated in the following manner, on the basis of the behavior (observed or known) of the physical system: the impulse response a(t) of the physical system according to a temporal or spatial variable is determined; an impulse response b(t) of similar form but compressed according to the scale of the variable t in a ratio n and expanded in amplitude in the same ratio is calculated sample by sample, and the coefficients of a finite impulse response filter able to provide at its output the signal b(t) when the signal a(t) is applied to its input are calculated. This finite impulse response filter is incorporated into the physical system, preferably at the output, so as to improve the passband thereof in the ratio n.

Abstract: The invention relates to the manufacture of a matrix sensor using a sensitive layer of a ferroelectric P(VDF/TrFE) copolymer, deposited on an integrated circuit. In order to simplify the manufacture and improve the yields, deposited first on the integrated circuit is a first layer of titanium and it is etched in order to form a matrix array of electrodes electrically connected to the integrated circuit; next, a P(VDF/TrFE) copolymer comprising a small proportion of around 1 to 10% of a second polymer that favors the adhesion of the P(VDF/TrFE) copolymer is deposited on the integrated circuit; the polymer is either underneath the P(VDF/TrFE) or blended therewith. The copolymer and its adhesion promoter are etched in a single step, and finally a second conductive layer is deposited and it is etched in order to form a counter electrode for the whole of the matrix array. For use in ultrasonic image sensors.

Abstract: The invention relates to image sensors produced with CMOS technology, whose individual pixels, arranged in an array of rows and columns, each consist of a photodiode associated with a charge storage region which receives the photogenerated charge before a charge readout phase. To eliminate the risk of introducing kTC-type noise into the signal, during the reset of the storage zone at the end of a readout cycle, the invention proposes that the storage zone be divided into two parts one of which, adjacent to the reset gage, is covered by a diffused region of the same type of conductivity as the substrate in which the photodiode is formed, this region being brought to the fixed potential of the substrate, and the other of which is not covered by such a region and is not adjacent to the reset gate.

Abstract: The invention relates to the fabrication of electronic circuits on a thinned semiconductor substrate. To produce a connection pad on the back side of the thinned substrate, the procedure is as follows: an integrated circuit is produced on an unthinned substrate, in which a portion of a polycrystalline silicon layer (18) dedicated for the connection of the pad is provided. The circuit is transferred onto a transfer substrate (30) and then its back side is thinned. A via is opened in the thinned semiconductor layer (12) in order to gain access to the polycrystalline silicon; aluminum (80) is deposited and this layer is etched so as to define a pad which is in contact with the internal interconnects of the integrated circuit by way of the polycrystalline silicon.

Abstract: The invention relates to matrix-array image sensors with MOS-technology active pixels, comprising a matrix-array of pixels arranged in rows and columns. To read the signal from a pixel, the reset potential present on a column conductor is sampled in two capacitors.

Abstract: The invention relates to a memory point of SRAM (static memory) type memory. The memory point conventionally comprises two inverters mounted head-to-tail between two nodes, and at least one access transistor able to be made conductive during a writing phase and linked between a first node and a line of data to be written, characterized in that it comprises an isolating transistor inserted in series between the output of a first inverter and the first node, the isolating transistor being controlled by an insulation signal at the start of a writing phase. The current consumption is reduced when the state of the memory point has to be inverted.

Abstract: The invention relates to the collective fabrication of superposed microstructures, such as an integrated circuit and a protective cover. Individual structures each comprising superposed first and second elements are fabricated collectively. The first elements (for example, integrated circuit chips) are prepared on a first plate and the second elements (for example, transparent covers) are prepared on a second plate. The plates are bonded to each other over the major portion of their facing surfaces, but with no bonding of the defined zones in which there is no adhesion. The individual structures are then diced via the top on the one hand and via the bottom on the other hand along different parallel dicing lines passing through the zones with no adhesion, so that, after dicing, the first elements retain surface portions (those lying between the parallel dicing lines) that are not covered by a second element. A connection pad may thus remain accessible at this point.

Abstract: The invention relates to analog integrated electronic circuits using differential pairs. The proposal is for a method of automatic correction of offset voltage. The inputs (V1, V2) of the differential circuit are short circuited during a calibration phase distinct from the normal usage phase. A capacitor is charged through the difference of the output currents of the branches of the differential pair in this phase. The voltage at the terminals of the capacitor is compared with at least one threshold. During the normal usage phase following the calibration phase, the result of the comparison is kept in memory. In the normal usage phase, a correction is applied depending on the result kept in memory to a current source of a follower stage upstream of the differential pair.

Abstract: The invention relates to matrix image sensors. It applies most particularly to intraoral dental radiology sensors. The invention provides a sensor architecture comprising a column decoder controlling select conductors of a column, and a row decoder controlling select conductors of a row. The pixels of a column are connected to a signal conductor that extends along the column and goes toward an analog multiplexer extending within the pixel matrix between two rows of pixels of the matrix. The multiplexer is controlled via the column select conductors coming from the decoder and it transmits the signal from a signal conductor of a selected column to an output conductor extending parallel to the rows. A signal sampling circuit common to all the columns is connected at the end of the output conductor of the multiplexer. An increase in matrix area is achieved by in practice losing only a single image row.

Abstract: The invention relates to the attachment of a multiple-conductor electronic cable to an electronic circuit in a sealed housing. The cable is placed in a sheath of a heat-deformable material and the method comprises the following steps: placing a rigid bushing (40) with a protruding collar (48) on the exposed end of the cable, heating the end in a conical mold or softening the sheath, inserting the bushing between the cable conductors and the softened sheath, the collar of the bushing pushing the sheath material until the conical portion of the mold is filled, cooling the sheath for solidifying it, extracting the end of the cable from the mold, the end having a conical portion with an increasing diameter ending with the protruding collar, inserting the cable in the housing opening from the inside before closing the housing. The invention can be used or an intra-oral dental radiology sensor.

Abstract: The invention relates to sample-and hold modules, and notably those which are intended to be placed upstream of an analog-digital converter. The sample-and-hold module conventionally comprises a differential pair of transistors, a follower transistor and a storage capacitor. The follower transistor is turned on during a sampling phase by the application of an emitter current by means of a first current switch and can be disabled during a hold phase by the application of a disabling voltage to its base. The sample-and-hold module operates according to the invention with a hold phase beginning at the same time as the end of a sampling phase and terminating before the start of a new sampling phase. Switching spikes are thus avoided at the transition between the end of a hold phase and the start of a new sampling phase.

Abstract: The invention relates to fast, high resolution, analog digital converters, and more particularly those which possess at least one conversion stage of “flash” type. The converter according to the invention uses N differential amplifiers with four inputs. The amplifier of rank j receives the input voltage to be converted Vep?Ven on two first inputs, and a reference potential difference on two other inputs. The reference potential difference is obtained between two taps of networks of resistors that are identical operating in parallel and supplied between a high voltage source and a low current source; the taps for an amplifier are respectively a tap Pj of rank j of a first network and a tap P?N?j+1 of rank N?j+1 of a second network. This reduces the first and second order non-linearity effects due to the fact that the differential amplifiers consume an input current tapped off from the networks of resistors.

Abstract: The invention relates to an image sensor comprising an integrated circuit chip incorporating a matrix of rows and columns of photosensitive pixels and a read amplifier, the amplifier supplying successive signals representing the lighting of the different pixels of the image, with a pixel reading frequency determined by a system clock. The system is powered by a general power supply voltage and the read amplifier is powered by a stabilized power supply voltage supplied by a DC/DC voltage converter receiving the general power supply voltage. The DC/DC converter comprises a switched-mode power supply that uses a switch to chop a direct current at high frequency and a rectifier to rectify and filter the chopped current. The chopping frequency is the pixel reading frequency, which eliminates certain power supply-related noises that degrade the video signal.

Abstract: The invention relates to large-dimension linear image sensors operating by relative translation between the image and the sensor and consisting of a plurality of linear arrays abutting in a staggered fashion. In order to improve the design of the sensor, according to the invention the arrays are mounted on packages whose upper surface has an elongate rectangular shape provided on two opposite sides of the rectangle with two extensions substantially covered by the ends of the array, two adjacent packages bearing against each other along a respective extension of each of them. The staggered arrangement prevents the blind zones, photosensitive points being present in the extensions, and the offset between the two rows of staggered chips is practically no greater than the width of the chips.

Abstract: The invention relates to current switches using a differential pair of transistors and being able to operate under a low supply voltage Vcc. According to the invention, provision is made for the current switch to include two differential pairs of two transistors each (T1, T1b; T2, T2b), cascaded together, the second pair (T2, T2b) having complementary current outputs (H, Hb) that flip according to the states of the inputs (E, Eb). The first pair (T1, T1b) is connected to a ground (GND) through a current source, supplying a current of value Io and comprising a transistor (Ts1) biased by a voltage Vbias, and it is supplied by a voltage equal to N·Vbe+Vbias, where N is a whole number (preferably equal to 1) and Vbe is the base-emitter voltage of the transistor (Ts1). The second pair (T2, T2b) is connected to ground directly through a resistance (R2). The invention can be applied to the on-off control of sample-and-hold circuits, multiplexers, fast low-voltage logic circuits, etc.

Abstract: The invention relates to intraoral radiological dental image sensors, i.e. sensors placed in the mouth of a patient, an X-ray source being located outside the cheek of the patient in order to emit X-rays in the direction of the sensor. According to the invention, the image sensor is attached to a first end of a short electrical cable (22) of around 5 to 20 cm, a second end of which leaves the patient's mouth when the sensor is in the mouth, the second end carrying a light source (24) comprising light-emitting diodes that can be digitally modulated as a function of information coming from the sensor, the electrical cable being able to transmit an electrical control signal from the sensor to the diode for modulating the latter.

Abstract: The invention relates to image sensors produced on a thinned silicon substrate. To limit the optical crosstalk between adjacent filters and, notably filters of different colors, the invention proposes positioning, between the adjacent filters of different colors (FR, FB, FV), a wall (20) of a material tending to reflect the light so that the light arriving obliquely on a determined filter corresponding to a first pixel does not tend to pass toward an adjacent filter or toward a photosensitive zone corresponding to an adjacent pixel but is returned by the wall to the first filter or the photosensitive zone corresponding to the first pixel. The wall is preferably made of a material with a high reflection coefficient such as aluminium and it is sunk depthwise into the thinned semiconductor layer (16), preferably in p+ diffusions formed in the layer if it is of p-type.

Abstract: The invention relates to integrated electronic circuits in MOS technology that have to be supplied by a cell or a battery that have a relatively high voltage capable of destroying the circuit in the event of a battery connection error, most particularly when a negative voltage is connected to an output of the integrated circuit. The logic output stage connected to this output comprises two pMOS transistors in series operating in push-pull mode under the control of the logic input signal, a first transistor being connected to a high supply terminal of the integrated circuit and the second transistor to a low supply terminal; the output is taken at the junction point of the two transistors. A conduction control circuit, capable of applying a negative voltage relative to the low supply terminal to the gate of the second transistor when the logic input signal passes to a level tending to turn off the first transistor, is interposed between the input and the gate of the second transistor.

Abstract: The invention relates to an electronic circuit making it possible to extract a clock signal from an incident binary data sequence arriving at a constant rate. The electronic circuit comprises an oscillator (VCO) with voltage-controlled frequency providing a sinusoidal signal, a circuit (R, Cp, RD, I1, I2) for extracting the transition edges of the binary sequence producing a brief pulse at each transition, a sampler (MLT) for tapping off the level of the sinusoidal voltage at the instant of the brief pulse, and an integrator (AOP, R1, C1) for integrating this level in tandem with the successive pulses, the output of the integrator being applied as control voltage to the oscillator with controlled frequency, the output of the oscillator being the desired clock frequency with a slaved phase passing through zero substantially in the middle of the interval between two binary data transitions.

Abstract: The invention relates to a temperature-independent voltage reference circuit. The circuit comprises a first circuit of bandgap type providing a first-order temperature-stable voltage, on the basis of a bipolar transistor base-emitter voltage having a negative slope of variation as a function of temperature, and of a voltage or a current having a positive slope of variation as a function of temperature provided by a generator of current proportional to absolute temperature. The base currents of the PMOS transistors thereof are compensated in such a manner that the output current is proportional to a collector current and not an emitter current.