Patents Assigned to Edge Technologies, Inc.
-
Patent number: 7862627Abstract: A method of fabricating a battery comprises selecting a battery substrate having cleavage planes, and cutting the battery substrate with pulsed laser bursts from a pulsed laser beam to control or limit fracture along the cleavage planes. The pulsed laser beam was also found to work well on thin substrates which are sized less than 100 microns. Before or after the cutting step, a plurality of battery component films can be deposited on the battery substrate. The battery component films include at least a pair of electrodes about an electrolyte which cooperate to form a battery.Type: GrantFiled: April 27, 2007Date of Patent: January 4, 2011Assignee: Front Edge Technology, Inc.Inventors: Jianchao Li, Kai-Wei Nieh, Sandeep Makhar
-
Publication number: 20100227214Abstract: A battery comprises a substrate comprising a first surface comprising a first battery cell having a first non-contact surface, a pliable dielectric abutting the first non-contact surface, the pliable dielectric comprising a peripheral edge, and a first cap about the pliable dielectric.Type: ApplicationFiled: May 19, 2010Publication date: September 9, 2010Applicant: FRONT EDGE TECHNOLOGY, INC.Inventors: Victor KRASNOV, Kai-Wei NIEH
-
Patent number: 7647404Abstract: The Content Transform Proxy (CTP) service is an advanced Web proxy service, the basic function of which is to modify incoming HTTP requests having a server-side destination and/or outgoing HTTP responses. The CTP service is implemented by the CTP program, which resides on a host in a data communications network between an end user (the Web client) and a content server that the client is attempting to access. The HTTP request and/or an HTTP response is modified by making an HTTP request on the client side using a client web browser, processing the HTTP request on the server side using outgoing proxy rules, passing on the processed HTTP transaction to the server-side destination, returning the results of the processed HTTP request from the server-side destination, processing the HTTP response on the server side using incoming proxy rules, and returning the processed HTTP response to the client web browser on the client side.Type: GrantFiled: January 31, 2007Date of Patent: January 12, 2010Assignee: Edge Technologies, Inc.Inventors: Nathaniel Cooper, Steven Hodecker, Douglas Yeager
-
Publication number: 20080274605Abstract: A method of manufacturing a silicon nitride film that forms a silicon nitride film on a surface of a substrate comprises sequentially repeating first through third steps. The first step includes feeding a first gas containing silicon and nitrogen to the surface of the substrate. The second step includes feeding a second gas containing nitrogen to the surface of the substrate. The third step includes feeding a third gas containing hydrogen to the surface of the substrate.Type: ApplicationFiled: July 2, 2008Publication date: November 6, 2008Applicants: Semiconductor Leading Edge Technologies, Inc., TOKYO ELECTRON LIMITEDInventors: Takeshi Hoshi, Tsuyoshi Saito, Hitoshi Kato, Koichi Orito
-
Patent number: 7390242Abstract: An apparatus for turning a hard and/or brittle material includes a precision workpiece spindle, a workpiece support, a hard and/or brittle workpiece rigidly coupled to the workpiece support, and a diamond tool blade rigidly coupled to a spin-turner mechanism. The diamond tool blade is formed to include a cutting edge arranged to confront the hard and/or brittle workpiece to remove material from the workpiece to form precision-turned components such as optical lenses, mirrors, and optical molds.Type: GrantFiled: June 6, 2006Date of Patent: June 24, 2008Assignee: Edge Technologies, Inc.Inventors: George A. Kim, James Andrew Simonson
-
Patent number: 7269625Abstract: A system for providing access to a network is provided. The system includes a management interface system that receives management data from one or more management systems, where each management system provides a type of management data for the network, such as device status data, event data, device performance monitoring data, or other suitable data. A portal system connected to the management interface system receives the management data and presents the management data in a predetermined format, such as in one or more view windows, such that management data from incompatible management systems can be presented in a single user-viewable display.Type: GrantFiled: March 19, 2001Date of Patent: September 11, 2007Assignee: Edge Technologies, Inc.Inventors: Edward M. Willhide, Nathaniel H. Cooper, Steven S. Hodecker, Hugh B. Warren
-
Patent number: 7186479Abstract: A thin film battery comprises a substrate with a front side and a back side. A first battery cell is provided on the front side of the substrate, the first battery cell including an electrolyte between a pair of electrodes. A second battery cell is provided on the back side of the substrate, the second battery cell also including an electrolyte between a pair of electrodes. The battery is capable of providing an energy density of more than 700 wh/l and a specific energy of more than 250 wh/kg. A method of annealing a deposited thin film is also described.Type: GrantFiled: December 7, 2004Date of Patent: March 6, 2007Assignee: Front Edge Technology, Inc.Inventors: Victor Krasnov, Kai-Wei Nieh, Su-Jen Ting
-
Publication number: 20070049175Abstract: An apparatus for turning a hard and/or brittle material includes a precision workpiece spindle, a workpiece support, a hard and/or brittle workpiece rigidly coupled to the workpiece support, and a diamond tool blade rigidly coupled to a spin-turner mechanism. The diamond tool blade is formed to include a cutting edge arranged to confront the hard and/or brittle workpiece to remove material from the workpiece to form precision-turned components such as optical lenses, mirrors, and optical molds.Type: ApplicationFiled: June 6, 2006Publication date: March 1, 2007Applicant: Edge Technologies, Inc.Inventors: George Kim, James Simonson
-
Patent number: 7101691Abstract: A method comprising applying sonication to a grain-based liquid medium processing stream of a starch-to-alcohol production process with one or more transducers is provided. In one embodiment, the one or more transducers apply sonication to the grain-based liquid medium processing stream in one or more locations. In one embodiment, the starch-to-alcohol production process is a starch-to-ethanol production process. In one embodiment, the starch-to-ethanol production process is a dry grind process, modified dry grind process or wet mill process. The methods of the present invention utilize sonication at the frequencies and intensities required on an industrial scale to reduce the production cost of alcohol, such as ethanol, by improving alcohol yield per bushel, reducing processing times for higher throughput, reducing operating costs, and increasing the marketability of co-products, among other benefits.Type: GrantFiled: August 26, 2004Date of Patent: September 5, 2006Assignees: UltraForce Technology LLC, Edge Technologies, Inc.Inventors: Michael T. Kinley, Jonathan D. Snodgrass, Bradley Krohn
-
Patent number: 7056620Abstract: A battery comprises a substrate having a cathode with a lower surface contacting the substrate and an opposing upper surface. A cathode current collector comprises conducting lines that contact the upper surface of the cathode. An electrolyte at least partially extends through the cathode current collector and contacts the cathode. An anode contacts the electrolyte, and optionally, an anode current collector contacts the anode. Also, because the cathode is formed on the substrate before the cathode current collector, the cathode current collector advantageously does not have to be fabricated out of a metal that is capable of withstanding further processing of the cathode, such as annealing of the cathode.Type: GrantFiled: March 22, 2001Date of Patent: June 6, 2006Assignee: Front Edge Technology, Inc.Inventors: Victor Krasnov, Kai-Wei Nieh
-
Publication number: 20060022228Abstract: A method of manufacturing a silicon nitride film that forms a silicon nitride film on a surface of a substrate comprises sequentially repeating first through third steps. The first step includes feeding a first gas containing silicon and nitrogen to the surface of the substrate. The second step includes feeding a second gas containing nitrogen to the surface of the substrate. The third step includes feeding a third gas containing hydrogen to the surface of the substrate.Type: ApplicationFiled: January 21, 2005Publication date: February 2, 2006Applicants: Semiconductor Leading Edge Technologies, Inc., TOKYO ELECTRON LIMITEDInventors: Takeshi Hoshi, Tsuyoshi Saito, Hitoshi Kato, Koichi Orito
-
Patent number: 6992013Abstract: In a method of forming a fine pattern, a silicon-oxide-based film is formed directly or by way of another layer on a substrate or on an underlying layer. The silicon-oxide-based film is formed such that nitrogen content of the surface thereof assumes a value of 0.1 atm. % or less. A chemically-amplified photoresist layer is formed on the silicon-oxide-based film. A mask pattern of a mask is transferred onto the chemically-amplified photoresist layer upon exposure through the mask. Thus, there is prevented generation of a tapered corner in a portion of a resist pattern in the vicinity of a boundary area between the resist pattern and a substrate.Type: GrantFiled: June 20, 2000Date of Patent: January 31, 2006Assignees: Semiconductor Leading Edge Technologies, Inc., ASM Japan K.K.Inventors: Ichiro Okabe, Hiroki Arai
-
Publication number: 20060019173Abstract: A method of designing a charged particle beam mask, comprises locating a plurality of identical chip patterns on a charged particle beam mask in which a plurality of subfields that can be transferred at a time are provided vertically and horizontally. The chip patterns have an arrangement pitch that is an integer multiple of the subfield.Type: ApplicationFiled: December 20, 2004Publication date: January 26, 2006Applicant: Semiconductor Leading Edge Technologies, Inc.Inventor: Jiro Yamamoto
-
Publication number: 20060019175Abstract: A method of manufacturing a membrane mask for use in an electron beam exposure apparatus that exposes resist material, comprises manufacturing the membrane mask. A membrane thickness is determined so that an operation time that the electron beam exposure apparatus spends in exposing the resist material to form a predetermined pattern using the membrane mask is comparable to or less than an operation time that the electron beam exposure apparatus spends in exposing the resist material to form the predetermined pattern using complementary masks.Type: ApplicationFiled: February 11, 2005Publication date: January 26, 2006Applicant: Semiconductor Leading Edge Technologies, Inc.Inventors: Hiroshi Yamashita, Masaki Yamabe
-
Publication number: 20060008964Abstract: In a method for manufacturing a semiconductor device, gate insulation films and gate electrodes are first formed on a substrate. An impurity is implanted into each gate electrode. Next, a first heat treatment is performed to the substrate for diffusing the impurity in the gate electrodes. After the heat treatment, a second heat treatment is performed for releasing stress generated in the substrate in the first heat-treatment. Thereafter, an impurity is implanted into an area to become an implanted region of the substrates using the gate electrodes as masks, and a third heat treatment is performed for activating the impurity implanted.Type: ApplicationFiled: December 6, 2004Publication date: January 12, 2006Applicant: Semiconductor Leading Edge Technologies, Inc.Inventor: Akira Mineji
-
Publication number: 20060003577Abstract: To effectively reduce the dielectric constant of an interlayer insulation film including a low dielectric constant film of a porous structure, and easily realize a practical application of a semiconductor device having an ultrafine and highly reliable Damascene wiring structure. A first interlayer insulation film including a porous first low dielectric constant film is formed on a lower layer wiring, and a first side wall metal is formed on a side wall of a via hole arranged in the first low dielectric constant film, and thereafter a first etching stopper layer is etched and the lower layer wiring is exposed. Then, a via plug is embedded into the via hole. In the same manner, after a second side wall metal is arranged on a side wall of a trench in a second interlayer insulation film including a porous second low dielectric constant film, a second etching stopper layer is etched, and an upper layer wiring that connects to the via plug is formed.Type: ApplicationFiled: January 19, 2005Publication date: January 5, 2006Applicant: Semiconductor Leading Edge Technologies, Inc.Inventor: Shuji Sone
-
Publication number: 20050287811Abstract: A method of performing microfabrication using a hard mask in the manufacture of a semiconductor device having an interlayer dielectric (ILD) film made of low-dielectric constant, K, insulating material is provided. When treating a low-K dielectric film for use in semiconductor integrated circuitry and its underlying etching stopper film, a patterned resist film is used as a mask to etch a hard mask film. Subsequently, the resist pattern is subjected to stripping or “ashing” in the atmosphere of a mixture gas of hydrogen (H2) and helium (He) at a temperature higher than 200° C. under a pressure of about 1 Torr. With this procedure, microfabrication relying upon the hard mask less in facet is achievable during its subsequent etching of the low-K dielectric film, without damaging the hard mask film upon removal of the resist.Type: ApplicationFiled: January 19, 2005Publication date: December 29, 2005Applicant: Semiconductor Leading Edge Technologies, Inc.Inventor: Kazuaki Inukai
-
Publication number: 20050274948Abstract: A gate insulating film and a gate electrode are formed on a silicon substrate. The gate insulating film contains at least hafnium, oxygen, fluorine, and nitrogen. The fluorine concentration is high in the vicinity of an interface with the silicon substrate and progressively decreases with decreasing distance from the gate electrode. The nitrogen concentration is high in the vicinity of an interface with the gate electrode and progressively decreases with decreasing distance from the silicon substrate. The fluorine concentration in the vicinity of the interface with the silicon substrate is preferably 1×1019 cm?3 or more. The nitrogen concentration in the vicinity of the interface with the gate electrode is preferably 1×1020 cm?3 or more.Type: ApplicationFiled: December 17, 2004Publication date: December 15, 2005Applicant: Semiconductor Leading Edge Technologies, Inc.Inventors: Yasuyuki Tamura, Takaoki Sasaki
-
Publication number: 20050253269Abstract: A semiconductor device comprises a semiconductor layer; a stacked body; and an electrode pad provided on the stacked body. The stacked body is provided on the semiconductor layer and has a plurality of stacked layers. The electrode pad is provided on the stacked body. The stacked body has a subpad region that is located below the electrode pad and an extrapad region that is not located below the electrode pad, and any portion made of insulating material in the electrode subpad region except a contact plug layer directly above the semiconductor layer in the stacked body is surrounded by a metal interconnect having a closed structure in the same layer.Type: ApplicationFiled: December 20, 2004Publication date: November 17, 2005Applicant: Semiconductor Leading Edge Technologies, Inc.Inventor: Hiroshi Tsuda
-
Publication number: 20050249876Abstract: An atomic layer deposition (ALD) apparatus capable of forming a conformal ultrathin-film layer with enhanced step coverage is disclosed. The apparatus includes an ALD reactor supporting therein a wafer, and a main pipe coupled thereto for constant supply of a carrier gas. This pipe has two parallel branch pipes. Raw material sources are connected by three-way valves to one branch pipe through separate pipes, respectively. Similarly, oxidant/reducer sources are coupled by three-way valves to the other branch pipe via independent pipes. ALD works by introducing one reactant gas at a time into the reactor while being combined with the carrier gas. The gas is “chemisorped” onto the wafer surface, creating a monolayer deposited. During the supply of a presently selected material gas from its source to a corresponding branch pipe, this gas passes through its own pipe independently of the others. An ALD method is also disclosed.Type: ApplicationFiled: January 14, 2005Publication date: November 10, 2005Applicant: Semiconductor Leading Edge Technologies, Inc.Inventors: Takaaki Kawahara, Kazuyoshi Torii