Abstract: A wet etching apparatus comprises a stage for fixing a substrate having a major surface covered with a film to be etched, a rotation mechanism for rotating the stage, a rotation controller for controlling rotation operation by the rotation mechanism, an ultraviolet irradiation unit having a light source for irradiating a portion of the major surface of the substrate with ultraviolet radiation, and an etching solution supply unit for supplying etching solution to the major surface of the substrate. The entire surface of the substrate can be irradiated with the ultraviolet radiation by a rotation of the stage.

Abstract: In a semiconductor device having a first transistor and a second transistor, the first transistor includes a first gate electrode composed of a first material having a first work function, and a first gate insulating film. The second transistor includes a second gate electrode composed of a second material having a second work function, and a second gate insulating film. The first gate insulating film includes a high-dielectric-constant film, and a first insulating film on the high-dielectric-constant film. In the second gate insulating film, after removing the first gate electrode, the first insulating film on the high-dielectric-constant film is removed.

Abstract: Disclosed is a method of removing resist preventing increase of dielectric constant of low permittivity insulating films and preventing remains of resist. Using a resist mask, a protection insulating film, a MSQ film, and a silicon oxide film composing an ILD are RIE dry etched sequentially, and a via is formed on the surface of a substrate for processing reaching the diffusion layer on the substrate for processing. Subsequent process consists of; removing a modified layer formed on the substrate for processing surface because of prior etching using plasma gas by plasma excitation of NH3 gas, and another etching for complete removal of the resist mask by irradiation of hydrogen active species created by hydrogen gas and inert gas, of which example is helium gas or argon gas.

Abstract: The group creation part divides n ion particles into groups of a group G1, a group G2, . . . , and a group Gk. The individual area setting part sets an initial condition calculation area 1a, as an individual area of the group G1, and makes the calculation part calculate movement of the ion particle. Then, one by one, the individual area setting part sets an individual area of a group Gi+1, based on a range Rp, a dispersion ?L, etc. indicating a calculation result of an ion particle belonging to the group G1. Further, the individual area setting part implants an ion particle belonging to the group Gi+1 into the individual area of the group Gi+1 and makes the calculation part calculate movement of the implanted ion particle.

Abstract: An element isolation dielectric film is formed around device regions in a silicon substrate. The device regions are an n-type diffusion region, a p-type diffusion region, a p-type extension region, an n-type extension region, a p-type source/drain region, an n-type source/drain region, and a nickel silicide film. Each gate dielectric film includes a silicon oxide film and a hafnium silicate nitride film. The n-type gate electrode includes an n-type silicon film and a nickel silicide film, and the p-type gate electrode includes a nickel silicide film. The hafnium silicate nitride films are not on the sidewalls of the gate electrodes.

Abstract: In resist removal using hydrogen gas, the specific dielectric constant of an insulating film of a low dielectric constant can be reduced and the resist removal speed can be increased. A wafer is loaded on a rotary table in a chamber, and hydrogen mixed gas is introduced into a discharge tube from a gas introduction port, and a ? wave is supplied into the discharge tube via a waveguide, and the mixed gas is excited by plasma, and a hydrogen active species is generated. And, a neutral radical (hydrogen radical) of hydrogen atoms or hydrogen molecules is introduced into the chamber from a gas transport pipe and a resist mask on the surface of the wafer is removed. Here, by a substrate heating system for heating the rotary table and controlling the temperature, the temperature of the wafer is set within the range from 200° C. to 400° C. The processed gas after resist removal is ejected from the chamber through a gas ejection port by an exhaust system.

Abstract: A phase shift mask comprises a transparent substrate and a light shielding film. The transparent substrate has two regions that transmit exposure light. The exposure light transmitted through one region having a phase that is inverted in a recessed portion formed in the other region. The light shielding film shields the exposure light. The light shielding film is formed on the transparent substrate with a plurality of film thicknesses and has an edge that does not hang over the recessed portion.

Abstract: A substrate-container measuring device has a kinematic plate 10 having securing pins 12 provided at positions defined by the SEMI standards. There is provided an optical distance-measuring sensor 14, in which a relative position between the optical distance-measuring sensor 14 and the kinematic plate 10 is fixed. A substrate-container measuring jig 20 is placed on the kinematic plate 10. The substrate-container measuring jig 20 has a base plate 22 to be placed on the kinematic plate 10, and a slide plate 24 that is slidable over the base plate 22. The base plate 22 has a group of grooves which uniquely determine a relative position between the base plate 22 and the kinematic plate 10 as a result of being fitted with the corresponding securing pins 12.

Abstract: A method of forming a silicon nitride film comprises: forming a silicon nitride film by applying first gas containing silicon and nitrogen and second gas containing nitrogen and hydrogen to catalyst heated in a reduced pressure atmosphere. A method of manufacturing a semiconductor device comprising the steps of: forming a silicon nitride film by the method as claimed in claim 1 on a substrate having the semiconductor layer, a gate insulation film selectively provided on a principal surface of the semiconductor layer, and a gate electrode provided on the gate insulation film; and removing the silicon nitride film on the semiconductor layer and the gate electrode and leaving a sidewall comprising the silicon nitride film on a side surface of the gate insulation film and the gate electrode by etching the silicon nitride film in a direction generally normal to the principal surface of the semiconductor layer.

Abstract: A heat treatment is performed to an insulating film composition, formed on a semiconductor substrates at a temperature of 350° C. in an inert gas ambient to form a non-porous insulating film. Next, dry etching is performed using a resist pattern as a mask to form a trench in the non-porous insulating film, ashing is performed to remove the resist pattern, and the surface of the semiconductor substrate is cleaned. Thereafter, a second heat treatment is performed for the non-porous insulating film to form a porous insulating film. Since the second heat treatment is performed in an oxidizing-gas atmosphere, the pore-generating material can be removed at a temperature lower than the temperature of conventional methods to form an insulating film having a low dielectric constant.

Abstract: A first insulating film, a second insulating film, a third insulating film, an antireflective film, and a resist film are formed in this order on a lower-layer wiring. After dry etching the third insulating film and the second insulating film, using the resist film as a mask, the resist film and the antireflective film are removed by ashing. Thereafter, the first insulating film is dry etched, using the third insulating film as a mask, to form a wiring trench extending to the lower-layer wiring. The dry etching of the third insulating film and the second insulating film is performed using a gas containing fluorine at a pressure of 0.1 Pa to 4 Pa. Ashing is preferably performed using at least one of hydrogen and an inert gas.

Abstract: An ion implantation simulator that computes an ion density distribution at high speed and with high accuracy based on a beam dispersion phenomenon in an ion implantation process. The ion implantation simulator is provided with the beam dispersion approximate function storage section 121, which stores a beam dispersion approximate function that is obtained through approximation of ion beam dispersion by using a predetermined function; a beam intensity computing section 131, which computes an area surface beam intensity that indicates an intensity of the ion beam on a surface of an implanted area by using the beam dispersion approximate function; and an ion density distribution computing section 132, which computes the density distribution of the ion, which is implanted by the ion beam into the device through the surface of the implanted area, by using the area surface beam intensity.

Abstract: A semiconductor device having a first wiring layer including first wirings on a substrate, a contact layer on the first wiring layer and including contacts connected to the first wirings, and a second wiring layer on the contact layer and including second wirings connected to the contacts. Contact pitch is larger than the minimum wiring pitch of the first wirings or the minimum wiring pitch of the second wirings.

Abstract: A method of forming an inorganic porous film comprises applying, to a support, an inorganic material composition including a mixture of a silicon oxide precursor containing at least one hydrolyzable silane compound and a pore-generating material, thereby forming a film, drying the film, contacting the film after the drying with a supercritical fluid to remove the pore-generating material; and baking the film after the removal of the pore-generating material.

Abstract: A semiconductor device comprises, a protective element on a substrate; a low-k dielectric film opposite the protective element and having mechanical strength smaller than a silicon oxide film; a mesh wiring opposite the protective element and in the low-k dielectric film, the mesh wiring including power supply wirings and ground wirings arranged in a mesh, the mesh wiring being electrically connected to the protective element; a silicon oxide film on the mesh wiring and the low-k dielectric film; and a bonding pad on the silicon oxide film and opposite the mesh wiring.

Abstract: A method of forming a buried wiring in a low-k dielectric film, includes: forming a low-k dielectric film having a dielectric constant of 3 or less on an underlayer; removing the low-k dielectric film by a first width from an edge of the underlayer; forming a cap film on the low-k dielectric film, after removing the low-k dielectric film by the first width; forming a groove in the cap film and the low-k dielectric film; forming a conductive film in the groove and on the cap film; removing the conductive film by a second width, different from the first width by 1 mm or more, from the edge of the underlayer; and polishing unnecessary portions of the conductive film on the cap film, after removing the conductive film by the second width.

Abstract: A semiconductor device comprises: a substrate; a first film provided on the substrate; an insulation layer made of low-k material provided on the first film; a protection layer provided on a sidewall of a hole penetrating through the insulation layer and the first film to the substrate to cover the insulation layer, and a conducting portion filling the hole. The protection layer is more compact than the low-k material.

Abstract: A semiconductor apparatus comprises a first semiconductor device and a second semiconductor device. The first semiconductor device includes: a semiconductor layer having a p-type channel area; an n-type source area, and an n-type drain area; a first gate insulating film provided on the p-type channel area; and a first gate electrode provided on the first gate insulating film containing a first metallic element and nitrogen. The second semiconductor device includes: a semiconductor layer having an n-type channel area, a p-type source area, and a p-type drain area; a second gate insulating film provided on the n-type channel area; and a second gate electrode provided on the second gate insulating film containing a second metallic element and nitrogen. A nitrogen content of the second gate electrode is higher than a nitrogen content of the first gate electrode.

Abstract: A method for manufacturing a semiconductor device comprises: exposing a surface of a substrate to plasma; and forming an insulating film containing a low dielectric constant material on the surface of the substrate. A method for manufacturing a semiconductor device comprises: forming a modified layer by exposing a surface of a substrate to plasma; and forming an insulating film containing a low dielectric constant material on the modified layer. A method for manufacturing a semiconductor device comprises: forming an adhesion enhancement layer on a substrate; exposing a surface of the adhesion enhancement layer to plasma; and forming a first insulating film on the adhesion enhancement layer.

Abstract: A first insulating film, a second insulating film, a third insulating film, an antireflective film, and a resist film are formed in this order on a lower-layer wiring. After dry etching the third insulating film and the second insulating film, using the resist film as a mask, the resist film and the antireflective film are removed by ashing. Thereafter, the first insulating film is dry etched, using the third insulating film as a mask, to form a wiring trench extending to the lower-layer wiring. Dry etching uses a fluorocarbon-based gas to which at least one of hydrogen and an inert gas is added. Ashing is performed using at least one of hydrogen and an inert gas.