Patents Assigned to Fuji Electric Systems Co., Ltd.
  • Publication number: 20110198587
    Abstract: A semiconductor apparatus according to aspects of the invention includes a power MOSFET including a main MOSFET and sensing MOSFET's. The main MOSFET and the sensing MOSFET's are formed on a semiconductor substrate, and a sensing MOSFET is selected for changing the sensing ratio and further for confining the sensing ratio variations within a certain narrow range stably from a low main current range to a high main current range. A semiconductor apparatus according to aspects of the invention facilitates reducing the manufacturing costs thereof, obviating the cumbersomeness caused in the use thereof, and confining the sensing ratio variations within a certain narrow range stably.
    Type: Application
    Filed: February 10, 2011
    Publication date: August 18, 2011
    Applicant: C/O FUJI ELECTRIC SYSTEMS CO., LTD
    Inventor: Shigeyuki TAKEUCHI
  • Patent number: 7999317
    Abstract: A p-type body region and an n-type buffer region are formed on an n? drift region. An n++ emitter region and a p++ contact region are formed on the p-type body region in contact with each other. A p++ collector region is formed on the n-type buffer region. An insulating film is formed on the n? drift region, and a gate insulating film is formed on the n++ emitter region, the p-type body region, and the n drift region. A gate electrode is formed on the insulating film and the gate insulating film. A p+ low-resistivity region is formed in the p-type body region and surrounding the interface between the n++ emitter region and between the p-type body region and the p++ contact region. The p-type body region has two local maxima of an impurity concentration profile at the interface between the body region and the gate insulating film.
    Type: Grant
    Filed: January 9, 2009
    Date of Patent: August 16, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventors: Hong-Fei Lu, Mizushima Tomonori
  • Patent number: 7999633
    Abstract: An integrated structure of common-mode inductors and differential-mode capacitors in an EMI filter realized using a flexible circuit board, including: a closed magnetic circuit formed by a first magnetic core and a second magnetic core, optionally including an air gap formed in a middle pillar of the magnetic cores, and with a flexible printed circuit board (FPC) wound on at least one pillar, the FPC formed by laminating alternating insulating and copper foil layers. The integrated structure of inductors and capacitors is advantageous in reducing the volume of the EMI filter and improving the power density of an electronic power transformer.
    Type: Grant
    Filed: November 6, 2008
    Date of Patent: August 16, 2011
    Assignees: Fuji Electric Systems Co., Ltd., Zhe Jiang University
    Inventors: Dehong Xu, Xiao-feng Wu, Yanjun Zhang, Yi Chen, Yasuhiro Okuma, Kazuaki Mino
  • Patent number: 7995046
    Abstract: A display driving device outputting a driving signal to a display includes a high-voltage power supply terminal, an output terminal, a high-side output transistor connected between the high-voltage power supply terminal and the output terminal, a reference power supply terminal, a low-side output transistor connected between the output terminal and the reference power supply terminal, a buffer circuit including two MOS transistors connected in series, and a discharge element discharging charge stored in a gate of the low-side output transistor, wherein the gate of the low-side output transistor is connected to a connecting point of the two MOS transistors and the discharge element. Thus, even if electrostatic discharge is repeatedly applied to the output terminal by a positive charge as against the ground potential in the display driving apparatus, the low-side output transistor can be prevented from being damaged without charge stored in the gate of the low-side output transistor.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: August 9, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventor: Hideto Kobayashi
  • Patent number: 7994890
    Abstract: An insulating transformer includes a semiconductor substrate, an insulating substrate, a primary winding provided on one of the semiconductor substrate and the insulating substrate, a secondary winding provided on other of the semiconductor substrate and the insulating substrate, and an insulating spacer layer provided in between the semiconductor substrate and the insulating substrate for insulating and separating the primary winding and the secondary winding. The primary winding and the secondary winding are disposed to face each other. The insulating spacer layer maintains a constant interval between the semiconductor substrate and the insulating substrate.
    Type: Grant
    Filed: July 28, 2008
    Date of Patent: August 9, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventors: Masaharu Edo, Katsunori Ueno, Hiroyuki Yoshimura
  • Publication number: 20110189603
    Abstract: Electrophotographic photoconductor including a conductive substrate; and a photosensitive layer provided on the conductive substrate and including at least a charge generation material; a charge transport material; and a resin binder including a copolymer polyarylate resin represented by general formula (I) below: and manufacturing method therefore. Good images with less cracking occurrence are obtained during recycling of a photosensitive drum and peripheral members thereof that includes the electrophotographic photoconductor, and also when a liquid development process is employed.
    Type: Application
    Filed: April 2, 2009
    Publication date: August 4, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO., LTD.
    Inventors: Ikuo Takaki, Yoichi Nakamura, Seizo Kitagawa, Kazuki Nebashi, Fengqiang Zhu
  • Publication number: 20110186965
    Abstract: Reverse-conducting insulated gate bipolar transistor in which IGBT region and FWD region are integrated into a single body in a semiconductor substrate with a common active region is disclosed. MOS gate structure is on a first major surface side. Rear surface side structure is in a second major surface side of the semiconductor substrate and includes a plurality of recessed parts vertical to the second major surface, which are repeated periodically along the second major surface. A plurality of protruding parts are interposed between the recessed parts. Rear surface side structure includes p type collector region on a bottom surface of the recessed part, n type first field stop region at a position deeper than the collector region, n type cathode region on the top surface of the protruding part, and n type second field stop region in the protruding part at a position deeper than the cathode region.
    Type: Application
    Filed: January 27, 2011
    Publication date: August 4, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO. LTD.
    Inventors: Michio NEMOTO, Souichi YOSHIDA
  • Publication number: 20110186999
    Abstract: Hardness of bonding end portions of an external connection terminal to be bonded to circuit patterns of an insulating substrate which is not lower than 90 in Vickers hardness is disclosed. An ultrasonic welding tool is used. In the external connection terminal in which the bonding end portions are provided integrally with a bar, one of the bonding end portion located substantially in the lengthwise center of the bar is first bonded, and the other bonding end portions are bonded alternately in order toward either end. The hardness of the bonding end portions is increased so that strength of the ultrasonic welding portions is increased.
    Type: Application
    Filed: September 10, 2010
    Publication date: August 4, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO., LTD.
    Inventors: Fumihiko Momose, Kazumasa Kido, Yoshitaka Nishimura, Fumio Shigeta
  • Publication number: 20110183246
    Abstract: An ethylene compound having general formula (I) below: wherein R1, R2 and R3 are each independently a hydrogen atom, a halogen atom, an alkyl group of 1 to 6 carbons or an alkoxyl group of 1 to 6 carbons; R4 is an alkyl group of 1 to 3 carbons, phenyl or tolyl; and Ar is an aryl group of 7 to 20 carbons or a heterocyclic group, functions as a charge transport material in an electrophotographic photoreceptor. This compound suppresses photodeterioration, causes little light-induced fatigue, can prevent a rise in the residual potential associated with such light-induced fatigue, has stable properties as an electrophotographic photoreceptor even when used for an extended period of time, and is able to stably provide a satisfactory image.
    Type: Application
    Filed: July 9, 2009
    Publication date: July 28, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO., LTD
    Inventors: Fengqiang Zhu, Yoichi Nakamura, Ikuo Takaki, Seizo Kitagawa, Shinjirou Suzuki
  • Patent number: 7982248
    Abstract: A switching power supply has a start-up circuit that includes a field effect transistor (JFET), which has a gate region (a p-type well region) formed in a surface layer of a p-type substrate and a drift region (a first n-type well region). A plurality of source regions (second n-type well regions) are formed circumferentially around the drift region. A drain region (a third n-type well region) is formed centrally of the source region. The drain region and the source regions can be formed at the same time. A metal wiring of the source electrode wiring connected to source regions is divided into at least two groups to form at least two junction field effect transistors.
    Type: Grant
    Filed: March 24, 2007
    Date of Patent: July 19, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventors: Masaru Saito, Koji Sonobe
  • Patent number: 7983056
    Abstract: In a semiconductor device provided with terminals for external connection, input terminals, power supply terminals and ground terminals are disposed close together on part of one edge portion of two opposing edge portions. Output terminals are disposed in the vicinity of both ends of the one edge portion and on another edge portion of the two edge portions. A ground wiring is routed from the other edge portion and connected to the ground terminals. In so doing, elemental devices connected to the input terminals are disposed close together, whereby needless gaps do not arise between the elemental devices. A ground potential is also supplied by the ground wiring.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: July 19, 2011
    Assignees: Fuji Electric Systems Co., Ltd., LG Electronics Inc.
    Inventor: Takahiro Nomiyama
  • Publication number: 20110163409
    Abstract: A TMBS diode is disclosed. In an active portion and a voltage withstanding structure portion of the diode, an end portion trench surrounds active portion trenches. An active end portion which is an outer circumferential side end portion of an anode electrode is in contact with conductive polysilicon inside the end portion trench. A guard trench is separated from the end portion trench and surrounds it. A field plate provided on an outer circumferential portion of the anode electrode is separated from the anode electrode, and contacts both part of a surface of an n-type drift layer in a mesa region between the end portion trench and the guard trench and the conductive polysilicon formed inside the guard trench. The semiconductor device is high in withstand voltage without injection of minority carriers, and electric field intensity of a trench formed in an end portion of an active portion is relaxed.
    Type: Application
    Filed: January 4, 2011
    Publication date: July 7, 2011
    Applicant: C/O FUJI ELECTRIC SYSTEMS CO., LTD
    Inventors: Tomonori MIZUSHIMA, Michio NEMOTO
  • Patent number: 7971391
    Abstract: A door driving apparatus includes a rotary actuator, a rotary transmission member integrally fixed to an output shaft extending from the rotary actuator, and a pair of linear transmission members opposed to each other via the rotary transmission member. The linear transmission members are configured to be in mesh with the rotary transmission member and to move approximately parallel to each other in opposite directions.
    Type: Grant
    Filed: December 4, 2006
    Date of Patent: July 5, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventor: Hiroshi Harie
  • Publication number: 20110156137
    Abstract: A trench gate semiconductor device is disclosed which has a trench gate structure including an insulator in the upper portion of a first trench, the insulator being on a gate electrode; a source region having a lower end surface positioned lower than the upper surface of the gate electrode; a second trench in the surface portion of a semiconductor substrate between the first trenches, the second trench having a slanted inner surface providing the second trench with the widest trench width at its opening and a bottom plane positioned lower than the lower end surface of the source region, the slanted inner surface being in contact with the source region; and a p-type body-contact region in contact with the slanted inner surface of the second trench. The trench gate semiconductor device and its manufacturing method facilitate increasing the channel density and lowering the body resistance of the parasitic BJT.
    Type: Application
    Filed: December 21, 2010
    Publication date: June 30, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO., LTD.
    Inventor: Yoshihiro IKURA
  • Patent number: 7965070
    Abstract: A current-mode switching power supply is provided, in which there is no unstable operation arising from the fact that signals to generate PWM signals are minute, even when a load is light and a switching frequency is high. In a switching power supply of this invention, an added slope signal is superposed in an early stage of a rise of a current detection signal, so that a combined signal Vsig is caused to reach a certain magnitude even when the load is light and the switching frequency is high, and consequently an output FB of an error amplifier ERRAMP which is balanced with the combined signal is also increased. By this means, even in a current mode, it is possible to eliminate unstable operation arising from the fact that the feedback signal FB which is the output of the error amplifier ERRAMP and the combined signal Vsig are minute.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: June 21, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventor: Yasunori Nakahashi
  • Patent number: 7964472
    Abstract: A semiconductor device is manufactured by forming a mask having a first opening and a second opening wider than the first opening on a principal surface of a first conductivity type semiconductor substrate, etching semiconductor portions of the first conductivity type semiconductor substrate exposed in the first and second openings to thereby form a first trench in the first opening and form a second trench deeper than the first trench in the second opening, and filling the first and second trenches with a second conductivity type semiconductor to concurrently form an alignment marker for device production and a junction structure of alternate arrangement of the first conductivity type semiconductor and the second conductivity type semiconductor. In this manner, it is possible to provide a semiconductor device in which a parallel pn structure and an alignment marker can be formed concurrently to improve the efficiency of a manufacturing process.
    Type: Grant
    Filed: June 2, 2009
    Date of Patent: June 21, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventor: Ayako Yajima
  • Publication number: 20110144947
    Abstract: An online diagnostic system for a geothermal generation facility is discloses that includes: an automatic steam measurement device for measuring a characteristic of steam to be supplied to a steam turbine from a steam-water separator at the geothermal generation facility that outputs analysis data. A monitor•control device controls an operation of the geothermal generation facility while monitoring the geothermal generation facility. A diagnostic device performs at least one of an evaluation of a steam characteristic at the geothermal generation facility, an evaluation of the steam-water separator, and an evaluation of pulsation and confluence of a production well based on the analysis data from the automatic steam measurement device and performance data of the geothermal generation facility from the monitor•control device. An operating status of the geothermal generation facility is diagnosed.
    Type: Application
    Filed: October 19, 2009
    Publication date: June 16, 2011
    Applicants: FUJI ELECTRIC SYSTEMS CO., LTD., GEOTHERMAL ENGINEERING CO., LTD.
    Inventors: Ichiro Myougan, Toshikazu Kato, Isamu Osawa, Yasuyuki Hishi, Daisuke Fukuda, Yasuto Futagoishi, Toshiaki Aoki
  • Publication number: 20110141631
    Abstract: A power factor correction type switching power supply unit can change reference values of an overcurrent limit at an optimum timing at a time of an overcurrent protection of a step-up type converter, so that no sudden change occurs in an inductor current. A detection level selection circuit selects one of first and second threshold values with a selection signal, and outputs it as an overcurrent detection level to an overcurrent detection circuit. An input voltage monitoring circuit determines the selection signal in such a way that the larger of two threshold values is selected when an alternating current input voltage exceeds a first reference voltage, and the smaller threshold value is selected when the alternating current input voltage does not exceed a second reference voltage, and outputs the selection signal to the detection level selection circuit at a timing at which the alternating current input voltage approaches a zero.
    Type: Application
    Filed: November 10, 2010
    Publication date: June 16, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO. LTD.
    Inventors: Jun YABUZAKI, Jian CHEN
  • Patent number: 7960937
    Abstract: A miniaturizable, low-cost highly reliable inverter unit. A control circuit section for controlling operating timing of high breakdown voltage semiconductor elements included in an inverter circuit section and first and second drive and abnormality detection circuit sections for outputting drive signals for driving the high breakdown voltage semiconductor elements according to the operating timing and for feeding back an abnormality of the inverter circuit section to the control circuit section are formed on an SOI substrate as one integrated circuit chip. On the integrated circuit chip, circuit formation areas which differ in reference potential are separated from one another by dielectrics. A plurality of level shifters for transmitting signals exchanged between circuit formation areas separated by the dielectrics are formed.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: June 14, 2011
    Assignees: Fuji Electric Systems Co., Ltd., Sharp Kabushiki Kaisha, Honda Motor Co., Ltd.
    Inventors: Hitoshi Sumida, Akinobu Teramoto, Ken-ichi Nonaka, Toshio Naka
  • Publication number: 20110133712
    Abstract: A digital control switching power supply unit includes an A/D converter circuit having a delay line circuit that has a delay element array whose delay time is controlled by a bias current, and that converts a current value into a digital signal using a signal transmission delay time, a phase difference detector circuit that detects a phase difference between a switching cycle and an A/D conversion cycle, a charge pump circuit that generates a control voltage in accordance with the phase difference, and a bias current indicator circuit that determines a bias current in accordance with an output voltage of the charge pump circuit and a result of a comparison of a detected value of the output voltage and a reference voltage, wherein the digital control switching power supply unit controls in such a way that the A/D conversion cycle is synchronized with the switching cycle.
    Type: Application
    Filed: December 7, 2010
    Publication date: June 9, 2011
    Applicant: C/O FUJI ELECTRIC SYSTEMS CO., LTD
    Inventors: Masahiro SASAKI, Tetsuya KAWASHIMA