Patents Assigned to Fuji Electric Systems Co., Ltd.
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Patent number: 7919790Abstract: A semiconductor substrate and a method of its manufacture has a semiconductor substrate having a carbon concentration in a range of 6.0×1015 to 2.0×1017 atoms/cm3, both inclusively. One principal surface of the substrate is irradiated with protons and then heat-treated to thereby form a broad buffer structure, namely a region in a first semiconductor layer where a net impurity doping concentration is locally maximized. Due to the broad buffer structure, lifetime values are substantially equalized in a region extending from an interface between the first semiconductor layer and a second semiconductor layer formed on the first semiconductor layer to the region where the net impurity doping concentration is locally maximized. In addition, the local minimum of lifetime values of the first semiconductor layer becomes high.Type: GrantFiled: February 8, 2009Date of Patent: April 5, 2011Assignee: Fuji Electric Systems Co., Ltd.Inventor: Michio Nemoto
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Publication number: 20110075464Abstract: A synchronous rectification control device achieves high power conversion efficiency without supplying additional signal to a secondary side from a primary side. An insulated type switching power supply provides such a synchronous rectification control device. An output power is regulated based on a phase difference between two half bridges in the primary side. In the secondary side of the full bridge converter circuit, a center tap is lead out from the secondary windings of a transformer to obtain two symmetrical sections of windings. A device for detecting winding voltage observes winding voltages at terminals of the sections of windings. The synchronous rectification control circuit controls transistors and MOSFETs connected to the secondary windings to make the transistor in the ON or OFF state depending on the current flow in the secondary windings.Type: ApplicationFiled: September 17, 2010Publication date: March 31, 2011Applicant: FUJI ELECTRIC SYSTEMS CO., LTD.Inventor: Tadahiko Sato
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Patent number: 7915759Abstract: A power source IC and noise absorption capacitors (decoupling capacitors) are formed on an inductor in such a manner that the noise absorption capacitors are provided on the input side and the output side, respectively. A micro-power source module can thus be provided which is small in occupied area and height and can reduce conduction noise due to ground lines.Type: GrantFiled: August 5, 2008Date of Patent: March 29, 2011Assignee: Fuji Electric Systems Co., Ltd.Inventor: Kenichi Nishijima
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Publication number: 20110070723Abstract: A method of manufacturing a silicon carbide semiconductor device is disclosed in which a trench and a hole are controlled to have a predetermined configuration even if the silicon carbide semiconductor device is subjected to a heat treatment at a temperature of not lower than 1,500° C. A heat treatment step(s) of a method of the invention includes a step of heat treatment in an argon atmosphere at a temperature in a range of 1,600° C. to 1,800° C. under a pressure of at most 10 Torr for a time duration in a range of 0.1 min to 10 min to evaporate silicon atoms from a surface of the silicon carbide semiconductor substrate or the silicon carbide epitaxial layer and to obtain a silicon carbide surface with a carbon atom concentration of at least 95%.Type: ApplicationFiled: April 27, 2010Publication date: March 24, 2011Applicant: FUJI ELECTRIC SYSTEMS CO.,LTD.Inventors: Yasuyuki KAWADA, Takeshi TAWARA
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Publication number: 20110068965Abstract: A digital control switching power supply unit converts an input voltage into a desired output voltage using a digitally controlled pulse width modulation (PWM) signal according to a switching cycle. The power supply unit includes an analog-to-digital converter (ADC). The ADC converts a result of a comparison between an output voltage and a reference voltage to a digital signal during a conversion cycle. The ADC includes a circuit for outputting a phase difference between a switching cycle and the conversion cycle, and a delay circuit. The delay circuit generates a delay output current based on a result of the comparison and the phase difference and determines the conversion time delay according to the delay output current. The delay circuit also generates a delay reference current based on the reference voltage and the phase difference and determining the duration of the conversion cycle according to the delay reference current.Type: ApplicationFiled: September 14, 2010Publication date: March 24, 2011Applicant: FUJI ELECTRIC SYSTEMS CO., LTD.Inventors: Masahiro SASAKI, Tetsuya Kawashima
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Patent number: 7910962Abstract: To enable driving at a high withstand voltage and a large current, increase latchup immunity, and reduce ON resistance per unit area in an IGBT, a trench constituted by an upper stage trench and a lower stage trench is formed over an entire wafer surface between an n+ emitter region and a p+ collector region, and the trench is filled with a trench-filling insulating film. Thus, a drift region for supporting the withstand voltage is folded in the depth direction of the wafer, thereby lengthening the effective drift length. An emitter-side field plate is buried in the trench-filling insulating film to block a lateral electric field generated on the emitter side of the trench-filling insulating film, and as a result, an electric field generated at a PN junction between an n? drift region and a p base region is reduced.Type: GrantFiled: April 13, 2008Date of Patent: March 22, 2011Assignee: Fuji Electric Systems Co., Ltd.Inventor: Hong-fei Lu
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Patent number: 7911020Abstract: A semiconductor device has an active portion having at least one well region in a semiconductor layer, and a breakdown voltage maintaining structure surrounding the active portion. The maintaining structure includes a conductor layer over each of a plurality of guard rings with an insulating film interposed in between and connected to the respective guard ring. An inner side end portion of each conductor layer projects over the immediate adjacent inner side guard ring. The impurity concentration of the guard rings is set between the impurity concentrations of the semiconductor layer and the well regions. A field plate can extend over the innermost conductor layer with the insulating film interposed in between. The field plate is in contact with the outermost well region and is in contact with the first conductor layer. The outer side end of the field plate extends outwardly beyond an outer side end of the innermost conductor layer.Type: GrantFiled: July 10, 2008Date of Patent: March 22, 2011Assignee: Fuji Electric Systems Co., Ltd.Inventors: Yasushi Niimura, Takashi Kobayashi, Masanori Inoue, Yasuhiko Onishi
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Publication number: 20110063127Abstract: An exposure management system includes dosimeters, wireless relay devices that wirelessly communicate with the dosimeters, and a monitoring device. The dosimeters are carried by workers for measuring exposure doses in a radiation management facility. The wireless relay devices transmit a monitor indication message that requests the dosimeters to provide respective responses that include information of measured exposure doses. The wireless relay devices receive the responses from the dosimeters by using allocated respective communication channels that are different from each other. Each dosimeter receives the monitoring indication message and generates a designated number of response times for providing a response to the monitor indication message, and determines a communication channel corresponding to each of the generated response times. The monitoring device is connected to the wireless relay devices for monitoring an exposure state of each of the workers through the wireless relay devices and dosimeters.Type: ApplicationFiled: January 29, 2009Publication date: March 17, 2011Applicant: FUJI ELECTRIC SYSTEMS CO., LTD.Inventors: Eiji Matsumoto, Tetsuo Shibata, Minoru Imai
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Patent number: 7906926Abstract: A door drive control apparatus capable of an accurate detection, without misidentifying an inverse overrun condition, and a door drive control method that improves safety. The door drive control apparatus includes a power converter that supplies power to a door drive linear motor, and operates the power converter by feedback control using a speed detection value and a speed command value of the door, and controls a speed of the door. The door drive control apparatus includes a speed trouble determiner, which outputs a door inverse direction speed trouble signal in the event that the speed command value of the door exceeds either a positive or negative first setting speed, and the speed detection value exceeds a second setting speed of a polarity opposite to that of the speed command value.Type: GrantFiled: April 2, 2008Date of Patent: March 15, 2011Assignee: Fuji Electric Systems Co., Ltd.Inventors: Takayuki Nagakura, Yoshinobu Sato, Akira Fujimori, Naoki Takeda
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Patent number: 7906942Abstract: A DC-DC converter of a synchronous rectifier type, a control circuit thereof and control method thereof, facilitates detecting and interrupting negative inductor current IL with low power consumption, high accuracy and a simple configuration and facilitates improving the efficiency under a light load. An ON-period decision circuit determines whether an ON-period of the synchronous rectifier switch is too long or too short. An ON-period adjustment circuit generates a signal for adjusting the ON-period, during which the synchronous rectifier switch is ON, based on the decision of the ON-period decision part. A delay circuit adjusts the length of the delay, from the time when a signal changing the ON and OFF states of the synchronous rectifier switch changes to ON, to the time when the synchronous rectifier switch is forcibly turned off based on the adjusting signal.Type: GrantFiled: July 27, 2007Date of Patent: March 15, 2011Assignee: Fuji Electric Systems Co., Ltd.Inventors: Satoshi Sugahara, Kouhei Yamada
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Patent number: 7902596Abstract: A semiconductor device and a method of fabrication thereof includes a bidirectional device having a high breakdown voltage and a decreased ON voltage. An n-type extended drain region is formed in the bottom surface of each trench. A p-type offset region is formed in each split semiconductor region. First and second n-source regions are formed in the surface of the p-type offset region. This reduces the in-plane distance between the first and second n-source regions to thereby increase the density of cells. The breakdown voltage is maintained along the trenches. This increases the resistance to high voltages. Channels are formed in the sidewalls of the trenches by making the voltage across each gate electrode higher than the voltage across each of the first and second n-source electrodes. Thus, a bidirectional LMOSFET through which current flows in both directions is achieved. The LMOSFET has a high breakdown voltage and a decreased ON voltage.Type: GrantFiled: August 16, 2004Date of Patent: March 8, 2011Assignee: Fuji Electric Systems Co., Ltd.Inventors: Mutsumi Kitamura, Naoto Fujishima
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Patent number: 7902653Abstract: A semiconductor module includes a first metal foil; an insulating sheet mounted on a top surface of the first metal foil; at least one second metal foil mounted on a top surface of the insulating sheet; at least one semiconductor device mounted on the second metal foil; and a resin case for surrounding the first metal foil, insulating sheet, second metal foil, and semiconductor device. A bottom end of a peripheral wall of the resin case is located above a bottom surface of the first metal foil. A resin is provided inside the resin case to fill the inside of the resin case. The bottom surface of the first metal foil and the resin form a flat bottom surface so that the flat bottom surface contacts an external mounting member.Type: GrantFiled: April 28, 2008Date of Patent: March 8, 2011Assignee: Fuji Electric Systems Co., Ltd.Inventors: Masafumi Horio, Tatsuo Nishizawa, Eiji Mochizuki, Rikihiro Maruyama
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Publication number: 20110050269Abstract: A yield and productivity of a semiconductor module are improved. A sheet having electrical conductivity is fixed to a main surface of a semiconductor substrate on which a plurality of semiconductor devices having a surface structure and a rear surface electrode are arranged. The semiconductor substrate is divided into semiconductor chips on a first support stage in the state where the sheet is fixed to its main surface. The plurality of divided semiconductor chips are mounted on a second support stage via the sheet and further, the plurality of mounted semiconductor chips are continuously subjected to a dynamic characteristic test on the second support stage. The proposed semiconductor device evaluation method permits a fissure growing and propagating from a crack occurring in the dynamic characteristic test of the vertical semiconductor devices to be suppressed, and the yield and productivity of the semiconductor module to be improved.Type: ApplicationFiled: July 21, 2010Publication date: March 3, 2011Applicants: TOKYO ELECTRON LIMITED, FUJI ELECTRIC SYSTEMS CO., LTD.Inventors: Mitsuyoshi Miyazono, Shigekazu Komatsu, Dai Shinozaki, Masahiro Kato, Atsushi Yoshida
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Patent number: 7898024Abstract: In a MIS-type semiconductor device having a trench gate structure, a withstand voltage is ensured without changing the thickness of a drift layer and on-resistance can be reduced without applying a high gate drive voltage. The lower half of a trench extending through a p-base region into an n-drift region is filled with a high-permittivity dielectric having a relative permittivity that is higher than that of a silicon oxide film, preferably a silicon nitride film, and an insulated gate structure including a gate insulator and a gate electrode is fabricated on the high-permittivity dielectric. The depth d2 of the deepest portion of the high-permittivity dielectric is designed to be deeper than the depth d1 of a depletion layer in the semiconductor region away from the high-permittivity dielectric.Type: GrantFiled: January 31, 2008Date of Patent: March 1, 2011Assignee: Fuji Electric Systems Co., Ltd.Inventors: Akio Sugi, Tatsuji Nagaoka, Hong-fei Lu
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Patent number: 7897452Abstract: A method of producing a semiconductor device having a thickness of 90 ?m to 200 ?m and with an electrode on the rear surface, which achieves a high proportion of non-defective devices by optimizing the silicon concentration and thickness of the aluminum-silicon electrode. A surface device structure is formed on a first major surface of a silicon substrate. A buffer layer and a collector layer are formed on the second major surface after grinding to reduce the thickness of the substrate. On the collector layer, a collector electrode is formed including a first layer of an aluminum-silicon film having a thickness of 0.3 ?m to 1.0 ?m and a silicon concentration of 0.5 percent to 2 percent by weight, preferably not more than 1 percent by weight.Type: GrantFiled: June 16, 2006Date of Patent: March 1, 2011Assignee: Fuji Electric Systems Co., Ltd.Inventors: Kenichi Kazama, Tsunehiro Nakajima, Koji Sasaki, Akio Shimizu, Takashi Hayashi, Hiroki Wakimoto
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Publication number: 20110043269Abstract: In a level shift circuit in a high electric potential side driving circuit, a latch circuit and a transmission circuit located at the front stage of the latch circuit are provided. The transmission circuit makes its output impedance high when two inputs V1 and V2 are detected as low level signals by which erroneous signals due to dv/dt noises can be effectively blocked. In the transmission circuit, since there is no necessity of deliberately increasing delay in part of the circuit for achieving complete blocking, error signals due to dv/dt noises can be blocked with the minimum delay time.Type: ApplicationFiled: July 29, 2010Publication date: February 24, 2011Applicant: FUJI ELECTRIC SYSTEMS CO., LTD.Inventors: Kenichi Nishijima, Kouhei Yamada
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Publication number: 20110042816Abstract: A semiconductor apparatus includes an aluminum electrode film formed on a semiconductor chip; and a nickel plated layer formed on the aluminum electrode film, wherein a concentration of sodium and potassium present in the nickel plated layer and at an interface between the nickel plated layer and the aluminum electrode film is 3.20×1014 atoms/cm2 or less.Type: ApplicationFiled: August 18, 2010Publication date: February 24, 2011Applicants: FUJI ELECTRIC SYSTEMS CO., LTD., C. UYEMURA & CO., LTD.Inventors: Hitoshi Fujiwara, Takayasu Horasawa, Kenichi Kazama
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Patent number: 7894212Abstract: A switching power supply device includes a first series circuit of first and second switching elements connected in parallel with a DC power supply. An isolation transformer has primary and secondary windings and first and second auxiliary windings, a first layer including the primary windings between a second layer of the two auxiliary windings, and a third layer of the secondary windings. A capacitor in series with the primary windings defines a second series circuit in parallel with the second switching element. A rectifying and smoothing circuit includes a rectifying diode and a smoothing capacitor, connected to the secondary windings. First and second control circuits turn on and off the first and second switching elements based on voltages generated in the two auxiliary windings, to obtain a DC output from the rectifying and smoothing circuit, enabling an adequate auxiliary windings voltage and stable switching operation including stable zero-voltage turn-on.Type: GrantFiled: February 25, 2008Date of Patent: February 22, 2011Assignee: Fuji Electric Systems Co., Ltd.Inventor: Yukihiro Nishikawa
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Patent number: 7891139Abstract: In controlling, with recognition of their installation positions, the opening/closing driving of plural doors that are driven by respective linear motors, each door is driven closed by switching the door opening/closing drive torque to high torque if the drive speed of the door has become less than or equal to a prescribed speed. In doing so, operation instruction computing sections set high torque application periods for respective doors so that the periods of high-torque closure driving of respective doors or predetermined door groups do not overlap with each other, and issue instructions to drive the doors closed with high torque only during the high torque application periods.Type: GrantFiled: March 6, 2007Date of Patent: February 22, 2011Assignee: Fuji Electric Systems Co., Ltd.Inventor: Takayuki Nagakura
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Publication number: 20110037166Abstract: The object of the present invention is to efficiently dissipate heat from the upper and lower main surfaces of a semiconductor device carrying a semiconductor element. A semiconductor device (1) is provided with an insulating substrate (10A), an insulating substrate (10B) provided so as to face the insulating substrate (10A), and a semiconductor element (20) disposed between the insulating substrate (10A) and the insulating substrate (10B) and having a collector electrode and an emitter electrode provided on the side opposite to that of the collector electrode. The collector electrode is electrically connected to a metal foil (10ac) provided on the insulating substrate (10A), and the emitter electrode is electrically connected to the metal foil (10bc) provided on the insulating substrate (10B). As a result, heat generated by the semiconductor element (20) is efficiently dissipated from the upper and lower main surfaces of the semiconductor device (1).Type: ApplicationFiled: April 8, 2009Publication date: February 17, 2011Applicant: FUJI ELECTRIC SYSTEMS CO., LTD.Inventors: Yoshinari Ikeda, Shin Soyano, Akira Morozumi, Kenji Suzuki, Yoshikazu Takahashi