Abstract: An internal combustion engine igniter semiconductor device is disclosed which is low cost yet secures energy withstand and reverse surge withstand capability. An IGBT includes a clamping diode between a collector electrode and a gate electrode. The IGBT has two n-type buffer layers of differing impurity concentrations between a p+ substrate and an n-type base layer of the IGBT, wherein the total thickness of the two-layer buffer layer is 50 ?m or less, and the overall impurity amount is 20×1013 cm?2 or less.

Abstract: A semiconductor apparatus includes, below a high-voltage wiring, a p? diffusion layer in contact with an n drain buffer layer and a p+ diffusion layer in contact with a p? diffusion layer for reducing the electric field strength in an insulator film, which the high-voltage wiring crosses over. Reducing electric field strength in the insulator film prevents lowering of breakdown voltage of a high-voltage NMOSFET, break down of an interlayer insulator film, and impairment of isolation breakdown voltage of a device isolation trench. The semiconductor apparatus according to the invention facilitates bridging a high-voltage wiring from a high-voltage NMOSFET and such a level-shifting device to a high-voltage floating region crossing over a device isolation trench without impairing the breakdown voltage of the high-voltage NMOSFET, without breaking down the interlayer insulator film and without impairing the isolation breakdown voltage of the device isolation trench.

Abstract: A feedback circuit by which an output of a memory device for storing level-shifted data can be fed back to the input side includes inverters, resistors, and transistors. The resistance value of combined resistance for pulling up or down first and second switching devices is varied in accordance with the output of the memory device by the feedback circuit, so that malfunction caused by dv/dt noise can be dealt with out generating any through current. In this manner, it is possible to provide a level shift circuit which can deal with malfunction causing dv/dt noise regardless of an on or off state of a high-potential-side switching device, while generation of a through current can be suppressed.

Abstract: Even when a substrate for treatment is joined with a supporting substrate having an outer shape larger than that of the substrate for treatment, with a photothermal conversion layer and an adhesive layer interposed, and the surface of the substrate for treatment on the side opposite this joined surface is treated, the occurrence of a defective external appearance on the treatment surface of the substrate for treatment is prevented. An adhesive layer 4 is formed on one surface of a substrate for treatment 3, a photothermal conversion layer 2 is formed on one surface of a supporting substrate 1 having a surface with an outer shape larger than that of the surface of the substrate for treatment, and the substrate for treatment 3 is bonded onto the surface of the photothermal conversion layer 2 with the adhesive layer 4 interposed, to obtain a layered member.

Abstract: An integrated control circuit for controlling a switching power supply, a switching power supply incorporating the same, and a method of controlling the switching power supply, where the control IC includes a current comparator that detects current flowing through a switching device, a flip-flop circuit that controls the ON-period of the switching device, an averaging circuit that converts the peak load current value to a time-average, a comparator that detects an overloaded state from the load current, a delay circuit that sets a time from detecting the overcurrent state to stopping the switching operation, a latch circuit that stops the switching operation for a period of time, a first reference voltage supply used in the current comparator, which has a higher voltage value than a second reference voltage supply used in the comparator.

Abstract: A soft-stop overvoltage protection circuit, into which a soft-stop overvoltage detection voltage proportional to a direct current output voltage is input, reduces the output of a multiplier in accordance with the soft-stop overvoltage detection voltage when the soft-stop overvoltage detection voltage exceeds a first threshold value. An overvoltage protection circuit, a second threshold value higher than the first threshold value being set, compulsorily turns off a switching element by outputting an overvoltage detection signal when the soft-stop overvoltage detection voltage exceeds the second threshold value. The soft-stop overvoltage protection circuit compulsorily increases the output of a voltage error amplifier circuit on the output voltage decreasing. When the output of the voltage error amplifier circuit increases suddenly, and the output voltage rises excessively, the soft-stop overvoltage protection circuit decreases the output of the multiplier, thus curbing the rise of the output voltage.

Abstract: A semiconductor substrate and a method of its manufacture has a semiconductor substrate having a carbon concentration in a range of 6.0×1015 to 2.0×1017 atoms/cm3, both inclusively. One principal surface of the substrate is irradiated with protons and then heat-treated to thereby form a broad buffer structure, namely a region in a first semiconductor layer where a net impurity doping concentration is locally maximized. Due to the broad buffer structure, lifetime values are substantially equalized in a region extending from an interface between the first semiconductor layer and a second semiconductor layer formed on the first semiconductor layer to the region where the net impurity doping concentration is locally maximized. In addition, the local minimum of lifetime values of the first semiconductor layer becomes high.

Abstract: A semiconductor device for switching power supply control limits the startup current supplied from a high-voltage input terminal, and prevents heat generation and combustion in case of an anomaly. A high-voltage input terminal is connected to the main winding of a transformer, and is supplied with a startup voltage upon input of a power supply to the switching power supply device. A power supply terminal is connected to a capacitor, and outputs a startup current to charge the capacitor after input of the power supply input. A startup circuit is connected between the high-voltage input terminal and the power supply terminal, and charges the capacitor while increasing the startup current with magnitude proportional to the voltage value of the power supply terminal, and after startup, turns off the startup current and supplies the power supply voltage only from the auxiliary winding of the transformer.

Abstract: A composite integrated semiconductor device. In one embodiment, an input surge/noise absorbing circuit absorbs surge from an input signal, an attenuating circuit attenuates the input signal, and an electrical signal converting circuit converts the input signal to an output signal. The input surge/noise absorbing circuit, the attenuating circuit, and the electrical signal converting circuit together form a unit, and a plurality of these units are arranged in parallel in one semiconductor substrate to form the composite integrated semiconductor device, resulting in a reduction in the number of discrete components mounted on a printed circuit board.

Abstract: A method of manufacturing a semiconductor device is disclosed, wherein a plating layer is formed on a first surface side of a semiconductor substrate stably and at a low cost, while preventing the plating liquid from being contaminated and avoiding deposition of uneven plating layer on a second surface side. An electrode is formed on the first surface of the semiconductor substrate, and another electrode is formed on the second surface. A curing resin is applied on the electrode on the second surface and a film is stuck on the curing resin, and the curing resin is then cured. After that, a plating process is conducted on the first surface. The film and the curing resin are then peeled off.

Abstract: A micro-transformer manufacturing method is provided, which can improve throughput, prevent a crack from entering an insulating film between coils, and manufacture the micro-transformer without using a mask material having a high selection ratio. An insulating film is deposited on the whole face of a semiconductor substrate having an impurity-diffused region. This insulating film is partially removed to form a first opening and a second opening. A primary coil is formed such that a center pad contacts the impurity-diffused region through the first opening. A thin insulating film is deposited on the primary coil. An insulator material having a secondary coil formed thereon is adhered onto the insulating film on the primary coil by adhesive tape. The insulator material is sized to not cover both a pad, connected with the center pad of the primary coil through the impurity-diffused region, and an outer-end pad of the primary coil.

Abstract: A semiconductor device is discloses that includes an n-type semiconductor substrate; an alternating conductivity type layer on semiconductor substrate, the alternating conductivity type layer including n-type drift regions and p-type partition regions arranged alternately; p-type channel regions on the alternating conductivity type layer; and trenches formed from the surfaces of the p-type channel regions down to respective n-type drift regions. The bottom of each trench is over the pn-junction between the p-type partition region and the n-type drift region. The semiconductor device facilitates preventing the on-resistance from increasing, obtaining a higher breakdown voltage, and reducing the variations caused in the characteristics thereof.

Abstract: A manufacturing method is provided for manufacturing a semiconductor apparatus including a main semiconductor device and a subsidiary semiconductor device, which facilitates preventing characteristics variations from causing and reducing the manufacturing costs.

Abstract: Cutting work is performed on an n-semiconductor substrate (1) with an inverted trapezoid-shaped dicing blade to form grooves to be a second side walls (7). Bottom portions of the grooves are contacted with a p-diffusion layer (4) which is formed on a first principal plane (2) (front face) of the n-semiconductor substrate (1), so that the p-diffusion layer (4) is not cut. Then in the second side walls (7), a p-isolation layer (9) connected to a p-collector layer (8) and the p-diffusion layer (4) is formed. Since the p-diffusion layer (4) is not cut, a glass support substrate for supporting a wafer, and expensive adhesive, are not required, and therefore the p-isolation layer (4) can be formed at low cost.

Abstract: A multiplier multiplies a current signal of an Iy generator and a voltage signal from a Vx generator corresponding to a divided voltage value of an output voltage of a full-wave rectifier. The result of the multiplication is output as a current reference signal to the non-inversion input terminal of a current error amplifier. A current peak waveform generator circuit generates an envelope waveform of peak values of an inductor current. An Iz generator, when the envelope waveform exceeds a first threshold value smaller than a third threshold value set in an overcurrent protection circuit, curbs the inductor current by adjusting the size of a current signal output to the multiplier, and reducing the current reference signal.

Abstract: An error voltage Verr, as amplified by an amplifier, and an input voltage Vin, are multiplied together by a multiplier to generate a first threshold value signal Vth1, which is in phase with and similar in waveform to the input voltage Vin, and proportional in amplitude to the error voltage Verr. A second threshold value signal Vth2 is generated from the first threshold value signal Vth1 by a series circuit of a diode and a resistor. The power factor is increased by on/off-control of a switching element via a drive circuit, so that a current detection signal Vi, which is detected by a resistor and corresponds to an input current, falls between the two threshold value signals Vth1 and Vth2. Since the off time is not fixed, the noise spectrum is spread and increase of the switching frequency is suppressed. Noise reduction thus can be attained.

Abstract: A super-junction semiconductor substrate is configured in such a manner that an n-type semiconductor layer of a parallel pn structure is opposed to a boundary region between an active area and a peripheral breakdown-resistant structure area. A high-concentration region is formed at the center between p-type semiconductor layers that are located on both sides of the above n-type semiconductor layer. A region where a source electrode is in contact with a channel layer is formed over the n-type semiconductor layer. A portion where the high-concentration region is in contact with the channel layer functions as a diode. The breakdown voltage of the diode is set lower than that of the device.

Abstract: A strip-shape flexible substrate is transported over a long horizontal distance, with its width extending in the vertical direction, the position of the substrate in the vertical direction is maintained with high precision, and the films are deposited onto its surface. When depositing the thin films to manufacture a thin film laminated body, at least one pair of gripping rollers arranged in at least one space between film deposition chambers, and which grasps an upper-side edge portion of the substrate with its width oriented in the vertical direction, are installed such that the rotation direction of the gripping rollers is diagonally upward, at an angle relative to the direction of transport of the substrate, and by changing the force with which the gripping rollers grasp the substrate, a force lifts the substrate, and the height of the substrate can be controlled.

Abstract: A method of producing a device includes embedding trenches with an epitaxial layer having high crystallinity while a mask oxide film remains unremoved. An n-type semiconductor is formed on the surface of a silicon substrate, and a mask oxide film and a mask nitride film are formed on the surface of the n-type semiconductor. The mask laminated film is opened by photolithography and etching, and trenches are formed in the silicon substrate. The width of the remaining mask laminated film is narrowed and portions of the n-type semiconductor close to the opening ends of the trenches are exposed. The trenches are embedded with a p-type semiconductor and the surface of the mask laminated film is prevented from being covered with the p-type semiconductor. The p-type semiconductor is grown from the second exposed portions of the n-type semiconductor. V-shaped grooves are prevented from forming on the surface of the p-type semiconductor.

Abstract: A thin semiconductor wafer, on which a top surface structure and a bottom surface structure that form a semiconductor chip are formed, is affixed to a supporting substrate by a double-sided adhesive tape. Then, on the thin semiconductor wafer, a trench to become a scribing line is formed by wet anisotropic etching with a crystal face exposed so as to form a side wall of the trench. On the side wall of the trench with the crystal face thus exposed, an isolation layer for holding a reverse breakdown voltage is formed by ion implantation and low temperature annealing or laser annealing so as to be extended to the top surface side while being in contact with a p collector region as a bottom surface diffused layer. Then, laser dicing is carried out to neatly dice a collector electrode, formed on the p collector region, together with the p collector region, without presenting any excessive portions and any insufficient portions under the isolation layer.