Abstract: A method for growing at least one III/V nano-ridge on a silicon substrate in an epitaxial growth chamber. The method comprises: patterning an area on a silicon substrate thereby forming a trench on the silicon substrate; growing the III/V nano-ridge by initiating growth of the III/V nano-ridge in the trench, thereby forming and filling layer of the nano-ridge inside the trench, and by continuing growth out of the trench on top of the filling layer, thereby forming a top part of the nano-ridge, wherein at least one surfactant is added in the chamber when the nano-ridge is growing out of the trench.

Abstract: The present disclosure provides an HBT that includes (i) a semiconductor support layer; at least four wall structures side-by-side on the support layer; (iii) a semiconductor collector-material ridge structure disposed on the support layer between two adjacent wall structures of the at least four wall structures; (iv) a semiconductor base-material layer, wherein a first part of the base-material layer is disposed on a first region of the ridge structure and a second part of the base-material layer is disposed across the wall structures, wherein the base-material layer is supported by the wall structures; (v) a semiconductor emitter-material layer disposed on the first part of the base-material layer; (vi) a base contact layer disposed on the second part of the base-material layer; an emitter contact layer disposed on the emitter-material layer; and (viii) a collector contact layer disposed on a second region of the ridge structure.

Abstract: A passive photonics reservoir computing system comprises an optical waveguide based structure comprising a plurality of discrete nodes and a plurality of passive waveguide interconnections between the nodes for propagating the at least one photonic signal between the nodes, in which each discrete node is adapted for passively relaying the at least one photonic wave over the passive waveguide interconnections connected thereto, wherein the optical waveguide based structure comprises at least one multimode Y-junction configured for connecting three waveguides using a taper section wherein the taper section is not perfectly adiabatic. A training scheme uses a passive photonics computing system.

Abstract: A circuit is provided. The circuit includes a sampling circuit connectable to a multibit memory array and that samples a voltage across a sampling capacitor, a capacitance network including a plurality of capacitors and switching elements such that the capacitance network has a capacitance that depends on the configuration of the switching elements, and a buffering circuit configured to charge the capacitance of the capacitance network based on the voltage across the sampling capacitor. The circuit is configured to operate the capacitance network in a first state and a second state, wherein the capacitance in the states depends on an input value to the circuit. The circuit is also configured to charge the capacitance network in the first state and to allow the charge to redistribute within the capacitance network when it changes from the first to the second state. A system and method including such circuits are also provided.

Abstract: A photo-sensitive device comprises: an active layer configured to generate charges in response to incident light; a charge transport layer arranged below the active layer, wherein the charge transport layer comprises a first portion and a second portion being laterally displaced in relation to the first portion; a gate separated by a dielectric material from the charge transport layer, wherein said gate is arranged below the first portion and configured to control a potential thereof; and a transfer gate, which is separated by a dielectric material from a transfer portion of the charge transport layer between the first portion and the second portion, wherein the transfer gate is configured to control transfer of accumulated charges in the first portion to the second portion for read-out of detected light.

Abstract: A method for forming a III-V construction over a group IV substrate comprises providing an assembly comprising the group IV substrate and a dielectric thereon. The dielectric layer comprises a trench exposing the group IV substrate. The method further comprises initiating growth of a first III-V structure in the trench, continuing growth out of the trench on top of the bottom part, growing epitaxially a sacrificial second III-V structure on the top part of the first III-V structure, and growing epitaxially a third III-V structure on the sacrificial second III-V structure. The third III-V structure comprises a top III-V layer. The method further comprises physically disconnecting a first part of the top layer from a second part thereof, and contacting the sacrificial second III-V structure with the liquid etching medium.

Abstract: An orthogonal frequency-division multiplexing (OFDM) based radar signal comprising Q sub-carriers adapted to push an IQ-imbalance component out of a subset of L contiguous range bins of range profiles derived out of the received radar signal and wherein L is at most Q/2, is disclosed.

Abstract: A method for processing a semiconductor device with two closely space gates comprises forming a template structure, wherein the template structure includes at least one sub-structure having a dimension less than the CD. The method further comprises forming a gate layer on and around the template structure. Then, the method comprises removing the part of the gate layer formed on the template structure, and patterning the remaining gate layer into a gate structure including the two gates. Further, the method comprises selectively removing the template structure, wherein the spacing between the two gates is formed by the removed sub-structure.

Abstract: A device for buffering a reference signal comprises a regulator circuit configured to generate at least two replicas of the reference signal as regulated output signals. The device further comprises a receiving circuit configured to receive the regulated output signals in a switchable manner. In this context, the regulated output signals are configured to have different performance characteristics.

Abstract: An optical device including a waveguide grating is disclosed. The optical device may be used as an optical cavity for a laser device, for instance, of an integrated laser device for light detection and ranging (Lidar) applications. In one aspect, the optical device includes a waveguide grating for guiding light, a heating layer provided beneath or above the waveguide grating, and two or more contacts for passing a current through the heating layer, to generate heat in the heating layer. The heating layer is thermally coupled to the waveguide grating and is optically decoupled from the waveguide grating.

Abstract: The inventive concept relates to a device for detecting particles in air, said device comprising a receiver for receiving a flow of air comprising particles, a sample carrier, and a particle capturing arrangement. The particle capturing arrangement is configured to separate the particles from the flow of air for and to collect a set of particles on a surface of the sample carrier. The device further comprises a light source configured to illuminate the particles on the sample carrier, such that an interference pattern is formed by interference between light being scattered by the particles and non-scattered light from the light source. The device further comprises an image sensor configured to detect the interference pattern. The device further comprises a cleaner configured for cleaning the surface of the sample carrier for enabling re-use of the surface for collection of a subsequent set of particles.

Abstract: A digitally controlled variable gain amplifier (VGA) for generating amplification output levels is disclosed. In one aspect, the digitally controlled VGA includes a positive amplification stage including at least two positive amplifiers, and a corresponding negative amplification stage coupled to the positive amplification stage. The negative amplification stage includes at least two negative amplifiers. The positive amplification stage and the corresponding negative amplification stage are digitally controlled by one or more digital codes. The corresponding negative amplification stage is coupled in parallel with the positive amplification stage and is equally weighted as the positive amplification stage, and both the positive amplification stage and the corresponding negative amplification stage selectively contribute to the generation of the amplification output levels for the digitally controlled VGA.

Abstract: Porous solid materials are provided. The porous solid materials include a plurality of interconnected wires forming an ordered network. The porous solid materials may have a predetermined volumetric surface area ranging between 2 m2/cm3 and 90 m2/cm3, a predetermined porosity ranging between 3% and 90% and an electrical conductivity higher than 100 S/cm. The porous solid materials may have a predetermined volumetric surface area ranging between 3 m2/cm3 and 72 m2/cm3, a predetermined porosity ranging between 80% and 95% and an electrical conductivity higher than 100 S/cm. The porous solid materials (100) may have a predetermined volumetric surface area ranging between 3 m2/cm3 and 85 m2/cm3, a predetermined porosity ranging between 65% and 90% and an electrical conductivity higher than 2000 S/cm. Methods for the fabrication of such porous solid materials and devices including such porous solid material are also disclosed.

Abstract: The disclosed technology relates to the field of memory devices including memory arrays, and more particularly, to magnetic memory devices. In one aspect, the disclosed technology provides a method of fabricating a memory device, and the memory device. The method comprises: processing a plurality of selector devices in a semiconductor layer of a first substrate, processing an interconnect layer on a front-side of the semiconductor layer, the interconnect layer comprising an interconnect structure electrically connected to the plurality of selector devices, processing a plurality of memory elements in an oxide layer of the first substrate arranged on a back-side of the semiconductor layer, each memory element being electrically connected to one of the selector devices, and processing one or more vias through the semiconductor layer to electrically connect the memory elements to the interconnect structure.

Abstract: The present disclosure relates to secure broker-mediated data analysis and prediction. One example embodiment includes a method. The method includes receiving, by a managing computing device, a plurality of datasets from client computing devices. The method also includes computing, by the managing computing device, a shared representation based on a shared function having one or more shared parameters. Further, the method includes transmitting, by the managing computing device, the shared representation and other data to the client computing devices. In addition, the method includes, based on the shared representation and the other data, the client computing devices update partial representations and individual functions with one or more individual parameters. Still further, the method includes determining, by the client computing devices, feedback values to provide to the managing computing device.

Abstract: A device for detecting particles in air; said device comprising: a flow channel configured to allow a flow of air comprising particles through the flow channel; a light source configured to illuminate the particles, such that an interference pattern is formed by interference between light being scattered by the particles and non-scattered light from the light source; an image sensor configured to detect incident light, detect the interference pattern, and to acquire a time-sequence of image frames, each image frame comprising a plurality of pixels, each pixel representing a detected intensity of light; and a frame processor configured to filter information in the time-sequence of image frames, wherein said filtering comprises: identifying pixels of interest in the time-sequence of image frames, said pixels of interest picturing an interference pattern potentially representing a particle in the flow of air, and outputting said identified pixels of interest for performing digital holographic reconstruction

Abstract: A method for processing a forksheet device includes providing a substrate and forming a trench in the substrate, extending along a first direction, in the substrate. The formation of the trench includes forming a grating structure on the substrate that includes a pair of maskings, arranged at a distance from each other, and etching the trench into the substrate in a region between the pair of maskings. The method also includes filling the trench with a filling material and partially recessing the substrate to form a fin structure. This fin structure includes the filled trench, a first section of the substrate at a first side of the filled trench and a second section of the substrate at a second side of the filled trench, and forming a gate structure on and around the fin structure. The method additionally includes forming a gate structure on and around the fin structure.

Abstract: A device for analysis of cells comprises: an active sensor area (104) presenting a surface for cell growth; a microelectrode array (102) comprising a plurality of pixels (110) in the active sensor area (104), wherein each pixel (110) comprises at least one electrode (120) at the surface, wherein each pixel (110) is configured to control the configuration of the pixel circuitry and set a measurement modality of the pixel; recording circuitry having a plurality of recording channels (130), wherein each pixel (110) is connected to a recording channel (130), wherein each recording channel (130) comprises a reconfigurable component (131), which is selectively controlled between being set to a first mode, in which the reconfigurable component (131) is configured to amplify a received pixel signal, and being set to a second mode, in which the reconfigurable component (131) is configured to selectively pass a frequency band of the received pixel signal.

Abstract: A method is provided for fabricating an avalanche photodiode (APD) device, in particular, a separate absorption charge multiplication (SACM) APD device. The method includes forming a first contact region and a second contact region in a semiconductor layer. Further, the method includes forming a first mask layer above at least a first contact region of the semiconductor layer adjacent to the first contact region, and forming a second mask layer above and laterally overlapping the first mask layer. Thereby, a mask window is defined by the first mask layer and the second mask layer, and the first mask layer and/or the second mask layer are formed above a second contact region of the semiconductor layer adjacent to the second contact region.

Abstract: An avalanche photodiode (APD) device, in particular, a lateral separate absorption charge multiplication (SACM) APD device, and a method for its fabrication is provided. The APD device comprises a first contact region and a second contact region formed in a semiconductor layer. Further, the APD device comprises an absorption region formed on the semiconductor layer, wherein the absorption region is at least partly formed on a first region of the semiconductor layer, wherein the first region is arranged between the first contact region and the second contact region. The APD device further includes a charge region formed in the semiconductor layer between the first region and the second contact region, and an amplification region formed in the semiconductor layer between the charge region and the second contact region. At least the absorption region is curved on the semiconductor layer.