Abstract: A semiconductor device includes a layer stack with a plurality of first semiconductor layers of a first doping type and a plurality of second semiconductor layers of a second doping type complementary to the first doping type. A first semiconductor region of a first semiconductor device adjoins the first semiconductor layers. Each second semiconductor region of the first semiconductor device adjoins at least one of the second semiconductor layers, and is spaced apart from the first semiconductor region. A third semiconductor layer adjoins the layer stack and each first semiconductor region and each second semiconductor region. The third semiconductor layer includes a first region arranged between the first semiconductor region and the second semiconductor region in a first direction. A third semiconductor region of the first or the second doping type extends from a first surface of the third semiconductor layer into the first region.

Abstract: A method of forming a power semiconductor device includes: arranging a control electrode at least partially on or inside a semiconductor body; forming elevated source regions in the semiconductor body by: implanting first conductivity type dopants into the semiconductor body; forming a recess mask layer covering at least areas of intended source regions; and removing portions of the semiconductor body uncovered by the recess mask layer to form the elevated source regions and recessed body regions at least partially between the source regions. A dielectric layer is formed on the semiconductor body. A contact hole mask layer is formed on the dielectric layer. Portions of the dielectric layer uncovered by the contact hole mask layer are removed to form a contact hole which is filled at least partially with a conductive material to establish an electrical contact with at least a portion of the elevated source and recessed body regions.

Abstract: A transistor arrangement includes: a layer stack with first and second semiconductor layers of complementary first and second doping types; a first source region of a first transistor device adjoining the first semiconductor layers; a first drain region of the first transistor device adjoining the second semiconductor layers and spaced apart from the first source region; gate regions of the first transistor device, each gate region adjoining at least one second semiconductor layer, being arranged between the first source region and the first drain region, and being spaced apart from the first source region and the first drain region; a third semiconductor layer adjoining the layer stack and each of the first source region, first drain region, and each gate region; and active regions of a second transistor device integrated in the third semiconductor layer in a second region spaced apart from a first region of the third semiconductor layer.

Abstract: A method includes providing a semiconductor substrate having a first side and a second side opposite to the first side, forming at least one radio frequency device at the first side; thinning the semiconductor substrate from the second side; and processing the second side of the thinned semiconductor substrate to reduce leakage currents or to improve a radio frequency linearity of the at least one radio frequency device.

Abstract: An electronic circuit is disclosed. The electronic circuit includes: a first transistor device integrated in an inner region of a first semiconductor body; and a first drive circuit integrated in a first drive circuit region of the semiconductor body. The first drive circuit is configured to be connected to a level shifter and to drive a second transistor device. The first drive circuit region is located in an edge region surrounding the inner region of the semiconductor body.

Abstract: A transistor arrangement and a method are disclosed. The transistor arrangement includes: a plurality of first semiconductor regions of a first doping type and a plurality of second semiconductor regions of a second doping type, the first semiconductor regions and the second semiconductor regions being arranged alternatingly in a vertical direction of a semiconductor body; a source region adjoining the plurality of first semiconductor regions; a drain region adjoining the plurality of second semiconductor regions and arranged spaced apart from the source region in a first lateral direction; and a plurality of gate regions each of which adjoins at least one of the plurality of second semiconductor regions and is arranged between the source region and the drain region. At least one of the first and semiconductor regions, but less than each of the first and second semiconductor regions has a doping dose that varies in the first lateral direction.

Abstract: A power semiconductor device includes an active region surrounded by an inactive termination region each formed by part of a semiconductor body. The active region conducts load current between first and second load terminals. At least one power cell has trenches extending into the semiconductor body adjacent to each other along a first lateral direction and having a stripe configuration that extends along a second lateral direction into the active region. The trenches spatially confine a plurality of mesas each having at least one first type mesa electrically connected to the first load terminal and configured to conduct at least a part of the load current, and at least one second type mesa configured to not conduct the load current. A decoupling structure separates at least one of the second type mesas into a first section in the active region and a second section in the termination region.

Abstract: A tunable Fabry-Perot (FP) filter element includes a first FP filter stack arranged at a movable first carrier element, and a second FP filter stack arranged in an opposing configuration to the first FP filter stack at a second carrier element, wherein, upon an actuation, the first carrier element with the first FP filter stack is vertically movable with respect to the second carrier element with the second FP filter stack, for adjusting the distance between the first and second opposing FP filter stack and wherein the movable first carrier element is formed as an SON structure (SON=silicon-on-nothing) in an SON substrate, wherein the SON structure is movable suspended by means of a mechanical spring element to the SON substrate.

Abstract: A method of manufacturing a semiconductor device includes: forming a trench in a first side of a semiconductor layer, the semiconductor layer including a drift zone of a first conductivity; forming a drain region of the first conductivity type in the first side of the semiconductor layer and laterally adjoining the drift zone; forming a body region of a second conductivity type opposite the first conductivity type and laterally adjoining the drift zone at a side of the drift zone opposite the drain region; and forming source regions of the first conductivity type and body contact regions of the second conductivity type in a sidewall of the trench and arranged in an alternating manner along a length of the trench, using a dopant diffusion process which includes diffusing dopants of both conductivity types from oppositely-doped dopant source layers which are in contact with different regions of the sidewall.

Abstract: A method includes: forming trenches extending from a surface along a vertical direction into a semiconductor body, facing trench sidewalls of two adjacent trenches laterally confining a mesa region of the semiconductor body along a first lateral direction; forming a body region in the mesa region, a surface of the body region in the mesa region at least partially forming the semiconductor body surface; forming a first insulation layer on the semiconductor body surface; subjecting the semiconductor body region to a tilted source implantation using at least one contact hole in the first insulation layer at least partially as a mask for forming a semiconductor source region in the mesa region. The tilted source implantation is tilted from the vertical direction by an angle of at least 10°. The semiconductor source region extends for no more than 80% of a width of the mesa region along the first lateral direction.

Abstract: A power semiconductor switch includes a cross-trench structure associated with at least one IGBT cell. The cross-trench structure merge at least one control trench, at least one dummy trench and at least one further trench of at least one IGBT cell to each other. The cross-trench structure overlaps at least partially along a vertical direction with trenches of the at least one IGBT-cell.

Abstract: A method includes partly removing a supporting layer arranged between a first semiconductor layer and a second semiconductor layer using an etching process to form at least one undercut between the first semiconductor layer and the second semiconductor layer, at least partly filling the at least one undercut with a first material having a higher thermal conductivity than the supporting layer, and forming a sensor device in or on the second semiconductor layer. Semiconductor arrangements and devices produced by the method are also described.

Abstract: A method for forming a superjunction transistor device includes: forming a plurality of semiconductor layers one on top of the other; implanting dopant atoms of a first doping type into each semiconductor layer to form first implanted regions in each semiconductor layer; implanting dopant atoms of a second doping type into each semiconductor layer to form second implanted regions in each semiconductor layer. Each of implanting the dopant atoms of the first and second doping types into each semiconductor layer includes forming a respective implantation mask on a respective surface of each semiconductor layer, and at least one of forming the first implanted regions and the second implanted regions in at least one of the semiconductor layers includes a tilted implantation process which uses an implantation vector that is tilted by a tilt angle relative to a normal of the respective horizontal surface of the respective semiconductor layer.

Abstract: A micro-electro-mechanical sensor comprises a first substrate comprising an element movable with respect to the first substrate and a second substrate comprising a first contact pad and a second contact pad. The first substrate is bonded to the second substrate such that a movement of the element changes a coupling between the first contact pad and the second contact pad.

Abstract: A power semiconductor device has a semiconductor body coupled to first and second load terminal structures, the semiconductor body configured to conduct a load current during a conducting state of the device and having a drift region. The power semiconductor device includes a plurality of cells, each cell having: a first mesa in a first cell portion, the first mesa including: a first port region, and a first channel region, the first mesa exhibiting a total extension of less than 100 nm in a lateral direction, and a second mesa in a second cell portion including: a second port region, and a second channel region. A trench structure includes a control electrode structure configured to control the load current by inversion or accumulation. A guidance zone of the second conductivity type is below the second channel region and is displaced from the first and the second channel regions.

Abstract: A method includes: forming first and second trenches in a semiconductor body; forming a first material layer on the semiconductor body in the first and second trenches such that a first residual trench remains in the first trench and a second residual trench remains in the second trench; removing the first material from the second trench; and forming a second material layer on the first material layer in the first residual trench and on the semiconductor body in the second trench. The first material layer includes dopants of a first doping type and the second material layer includes dopants of a second doping type. The method further includes diffusing dopants from the first material layer in the first trench into the semiconductor body to form a first doped region, and from the second material layer in the second trench into the semiconductor body to form a second doped region.

Abstract: A power semiconductor device has a semiconductor body coupled to first and second load terminal structures, the semiconductor body configured to conduct a load current during a conducting state of the device and having a drift region. The power semiconductor device includes a plurality of cells, each cell having: a first mesa in a first cell portion, the first mesa including: a first port region, and a first channel region, the first mesa exhibiting a total extension of less than 100 nm in a lateral direction, and a second mesa in a second cell portion including: a second port region, and a second channel region. A trench structure includes a control electrode structure configured to control the load current by inversion or accumulation. A guidance zone of the second conductivity type is below the second channel region and is displaced from the first and the second channel regions.

Abstract: A semiconductor device may include a stress decoupling structure to at least partially decouple a first region of the semiconductor device and a second region of the semiconductor device. The stress decoupling structure may include a set of trenches that are substantially perpendicular to a main surface of the semiconductor device. The first region may include a micro-electro-mechanical (MEMS) structure. The semiconductor device may include a sealing element to at least partially seal openings of the stress decoupling structure.

Abstract: A method produces a micromechanical sensor element having a first electrode and a second electrode, wherein electrode wall surfaces of the first and the second electrodes are situated opposite one another in a first direction and form a capacitance, wherein one of the first electrode or the second electrode is movable in a second direction, in response to a variable to be detected, and a second one of the first electrode and the second electrode is fixed. The method includes producing a cavity in a semiconductor substrate, the cavity being closed by a doped semiconductor layer; producing the first and the second electrodes in the semiconductor layer, including modifying the electrode wall surface of the first electrode in order to have a smaller extent in the second direction than the electrode wall surface of the second electrode.

Abstract: A micromechanical sensor includes a first and a second capacitive sensor element each having a first and a second electrode, wherein electrode wall surfaces of the first electrode and the second electrode are situated opposite one another in a first direction and form a capacitance, wherein the first electrodes are movable in a second direction, which is different than the first direction, in response to a variable to be detected, and the second electrodes are stationary. The electrode wall surface of the first electrode of the first sensor element has a smaller extent in the second direction than the opposite electrode wall surface of the second electrode of the first sensor element. The electrode wall surface of the second electrode of the second sensor element has a smaller extent in the second direction than the opposite electrode wall surface of the first electrode of the second sensor element.