Abstract: A semiconductor device includes a silicon substrate layer with a decoupling region. The decoupling region of the silicon substrate layer comprises an array of lamellas laterally spaced apart from each other by cavities. Each lamella of the array of lamellas comprises at least 20% silicon dioxide.

Abstract: A semiconductor device includes a semiconductor body having first and second opposing surfaces, a first isolation layer on the first surface of the semiconductor body, and an electrostatic discharge protection structure. The electrostatic discharge protection structure includes a diode structure on the first isolation layer, a first terminal and a second terminal. The diode structure includes a polysilicon layer having first regions and at least one second region of opposite conductivity type alternatingly arranged along a first lateral direction between the first terminal and the second terminal. The diode structure extends from an electrostatic discharge protection part into an edge termination part along a second lateral direction. A first breakdown voltage associated with the diode structure in the electrostatic discharge protection part is smaller than a second breakdown voltage associated with the diode structure in the edge termination part.

Abstract: A method for processing a carrier may include: forming a plurality of structure elements at least one of over and in a carrier, wherein at least two adjacent structure elements of the plurality of structure elements have a first distance between each other; depositing a first layer over the plurality of structure elements having a thickness which equals the first distance between the at least two adjacent structure elements; forming at least one additional layer over the first layer, wherein the at least one additional layer covers an exposed surface of the first layer; removing a portion of the at least one additional layer to expose the first layer partially; and partially removing the first layer, wherein at least one sidewall of the at least two adjacent structure elements is partially exposed.

Abstract: A method for manufacturing a bipolar junction transistor is provided. A layer stack is provided that comprises a semiconductor substrate having a trench isolation; an isolation layer arranged on the semiconductor substrate, wherein the first isolation layer comprises a recess forming an emitter window; lateral spacers arranged on sidewalls of the emitter window; a base layer arranged in the emitter window on the semiconductor substrate; and an emitter layer arranged on the isolation layer, the lateral spacers and the base layer. A sacrificial layer is provided on the emitter layer thereby overfilling a recess formed by the emitter layer due to the emitter window. The sacrificial layer is selectively removed up to the emitter layer while maintaining a part of the sacrificial layer filling the recess of the emitter layer. The emitter layer is selectively removed up to the isolation layer while maintaining the filled recess of the emitter layer.

Abstract: Embodiments provide a MEMS (Micro Electro Mechanical System) pressure sensor comprising a semiconductor substrate, wherein the semiconductor substrate comprises a stress decoupling structure adapted to stress decouple a first portion of the semiconductor substrate from a second portion of the semiconductor substrate, wherein the first portion of the semiconductor substrate comprises a first buried empty space, wherein the second portion of the semiconductor substrate comprises a second buried empty space, and wherein the semiconductor substrate comprises a pressure channel fluidically connecting the first buried empty space and the second buried empty space.

Abstract: A method for manufacturing a semiconductor device includes providing a semiconductor substrate having a first side. A trench having a bottom is formed. The trench separates a first mesa region from a second mesa region formed in the semiconductor substrate. The trench is filled with an insulating material, and the second mesa region is removed relative to the insulating material filled in the trench to form a recess in the semiconductor substrate. In a common process, a first silicide layer is formed on and in contact with a top region of the first mesa region at the first side of the semiconductor substrate and a second silicide layer is formed on and in contact with the bottom of the recess.

Abstract: According to an embodiment, a method of forming a MEMS transducer includes forming a transducer frame in a layer of monocrystalline silicon, where forming the transducer frame includes forming a support portion adjacent a cavity and forming a first set of comb-fingers extending from the support portion. The method of forming a MEMS transducer further includes forming a spring support from an anchor to the support portion and forming a second set of comb-fingers in the layer of monocrystalline silicon. The second set of comb-fingers is interdigitated with the first set of comb-fingers.

Abstract: According to various embodiments, an electronic device may include a carrier including at least a first region and a second region being laterally adjacent to each other; an electrically insulating structure arranged in the first region of the carrier, wherein the second region of the carrier is free of the electrically insulating structure; a first electronic component arranged in the first region of the carrier over the electrically insulating structure; a second electronic component arranged in the second region of the carrier; wherein the electrically insulating structure includes one or more hollow chambers, wherein the sidewalls of the one or more hollow chambers are covered with an electrically insulating material.

Abstract: According to various embodiments, an optoelectronic component may be provided, the optoelectronic component including: an electrode structure disposed at least one of over and in a carrier; and a grating structure disposed over the electrode structure, the grating structure including at least a first region and a second region, wherein the first region of the grating structure includes amorphous silicon; and wherein the second region of the grating structure includes a material having a refractive index different from the refractive index of the amorphous silicon.

Abstract: The present disclosure relates to an integrated semiconductor device, comprising a semiconductor substrate; a cavity formed into the semiconductor substrate; a sensor portion of the semiconductor substrate deflectably suspended in the cavity at one side of the cavity via a suspension portion of the semiconductor substrate interconnecting the semiconductor substrate and the sensor portion thereof, wherein an extension of the suspension portion along the side of the cavity is smaller than an extension of said side of the cavity.

Abstract: A semiconductor device and a method of manufacturing the same is provided. The semiconductor device including a transistor cell in a semiconductor substrate having a first main surface. The transistor cell includes a gate electrode in a gate trench in the first main surface adjacent to a body region. A longitudinal axis of the gate trench extends in a first direction parallel to the first main surface. A source region, a body region and a drain region are disposed along the first direction. A source contact comprises a first source contact portion and a second source contact portion. The second source contact portion is disposed at a second main surface of the semiconductor substrate. The first source contact portion includes a source conductive material in direct contact with the source region and a portion of the semiconductor substrate arranged between the source conductive material and the second source contact portion.

Abstract: A semiconductor device includes a buried doped region at a first distance to a main surface of a semiconductor body. A contact structure extends from the main surface to the doped region. The contact structure includes a contact layer formed from a metal-semiconductor alloy that directly adjoins the doped region. The contact structure further includes a fill structure formed from a metal or a conductive metal compound. An insulator structure surrounds the contact structure in cross-sections parallel to the main surface.

Abstract: A semiconductor device is provided including a transistor cell in a semiconductor substrate having a first main surface. The transistor cell includes a gate electrode in a gate trench in the first main surface adjacent to a body region. A longitudinal axis of the gate trench extends in a first direction parallel to the first main surface. A source region, a body region and a drain region are disposed along the first direction. A source contact comprises a first source contact portion and a second source contact portion. The second source contact portion is disposed at a second main surface of the semiconductor substrate. The first source contact portion includes a source conductive material in direct contact with the source region and a portion of the semiconductor substrate arranged between the source conductive material and the second source contact portion.

Abstract: A circuit includes first and second semiconductor switches each having a load path and control terminal and their load paths connected in series. At least one of the first and second switches includes a first semiconductor device having a load path and a control terminal, the control terminal coupled to the control terminal of the switch. A plurality of second semiconductor devices each have a load path between a first load terminal and a second load terminal and a control terminal. The second semiconductor devices have their load paths connected in series and connected in series to the load path of the first semiconductor device. Each of the second semiconductor devices has its control terminal connected to the load terminal of one of the other second semiconductor devices. One of the second semiconductor devices has its control terminal connected to one of the load terminals of the first semiconductor device.

Abstract: Methods for manufacturing a bipolar junction transistor are provided. A method includes providing a semiconductor substrate having a trench isolation, where a pad resulting from a manufacturing of the trench isolation is arranged on the semiconductor substrate, providing an isolation layer on the semiconductor substrate and the pad such that the pad is covered by the isolation layer, removing the isolation layer up to the pad, and selectively removing the pad to obtain an emitter window.

Abstract: A method for forming a semiconductor device includes providing a semiconductor substrate having an upper side and comprising, in a vertical cross-section substantially orthogonal to the upper side, a plurality of semiconductor mesas of a first monocrystalline semiconductor material which are spaced apart from each other by sacrificial layers selectively etchable with respect to the first monocrystalline semiconductor material and arranged in trenches extending from the upper side into the semiconductor substrate, forming on the semiconductor mesas a support structure mechanically connecting the semiconductor mesas, at least partly replacing the sacrificial layers while the semiconductor mesas remain mechanically connected via the support structure, and at least partly removing the support structure.

Abstract: In accordance with an embodiment of the present invention, a semiconductor device includes a semiconductor chip having a first side and an opposite second side, and a chip contact pad disposed on the first side of the semiconductor chip. A dielectric liner is disposed over the semiconductor chip. The dielectric liner includes a plurality of openings over the chip contact pad. A interconnect contacts the semiconductor chip through the plurality of openings at the chip contact pad.

Abstract: Embodiments relate to sensors and more particularly to structures for and methods of forming sensors that are easier to manufacture as integrated components and provide improved deflection of a sensor membrane, lamella or other movable element. In embodiments, a sensor comprises a support structure for a lamella, membrane or other movable element. The support structure comprises a plurality of support elements that hold or carry the movable element. The support elements can comprise individual cylindrical points or feet-like elements with straight or concave sidewalls, rather than a conventional interconnected frame, that enable improved motion of the movable element, easier removal of a sacrificial layer between the movable element and substrate during manufacture and a more favorable deflection ratio, among other benefits.

Abstract: A semiconductor device comprises a semiconductor body having a first surface and a second surface opposite to the first surface. The semiconductor device further includes a first isolation layer on the first surface of the semiconductor body and a first electrostatic discharge protection structure on the first isolation layer. The first electrostatic discharge protection structure has a first terminal and a second terminal. A second isolation layer is provided on the electrostatic discharge protection structure. A gate contact area on the second isolation layer is electrically coupled to the first terminal of the first electrostatic discharge protection structure. An electric contact structure is arranged in an overlap area between the gate contact area and the semiconductor body. The electric contact structure is electrically coupled to the second terminal of the first electrostatic discharge protection structure and electrically isolated from the gate contact area.

Abstract: According to various embodiments, a carrier may include: a hollow chamber spaced apart from a surface of the carrier; and at least one support structure within the hollow chamber connecting a first region of the carrier disposed over the hollow chamber with a second region of the carrier disposed below the hollow chamber, wherein at least a part of a surface of the at least one support structure is spaced apart from an inner surface of the hollow chamber, and wherein the at least one support structure includes an electrically insulating material.