Abstract: The described techniques are directed to inductive torque sensors that implement independent target coil and pickup coil systems. By utilizing the various principles of inductive angle sensors, and as a result of the specific physical arrangement of target coils, the inductive torque sensor may independently obtain a rotational position (i.e., mechanical angle) of the rotatable input shaft via one pickup coil system, and a rotational position (i.e., mechanical angle) of the rotatable output shaft via another pickup coil system. Combiner circuitry is also provided to calculate the torsion angle using the signals induced in each of two separate pickup coil systems. By using different k-fold symmetry periodicities in the target coils with respect to the coil configurations, the inductive torque sensor advantageously reduces or eliminates mutual coupling between the different target coil systems and provide robustness to stray or external electromagnetic fields.

Abstract: A method of manufacturing a module is disclosed. In one example, the method comprises providing at least one solder body with a base portion and an elevated edge extending along at least part of a circumference of the base portion. At least one carrier, on which at least one electronic component is mounted, is placed in the at least one solder body so that the at least one carrier is positioned on the base portion and is spatially confined by the elevated edge.

Abstract: A clamping circuit for protection against ESD events is described. In accordance with one exemplary embodiment, the circuit comprises the following: a first transistor having a control terminal and a load current path connected between a first contact and a second contact; an amplifier circuit having an amplifier input and an amplifier output connected to the control terminal of the transistor; and a trigger circuit, which is connected between the first contact and the second contact, and comprises a second transistor. The trigger circuit is configured to generate a voltage swing at the amplifier input as a reaction to a discharge current at the first contact by virtue of the fact that at least part of the discharge current drives a control terminal of the second transistor via an intrinsic capacitance of the second transistor.

Abstract: A semiconductor module arrangement includes a housing, a first semiconductor substrate arranged inside the housing, a second semiconductor substrate arranged inside the housing, a first plurality of controllable semiconductor elements, and a second plurality of controllable semiconductor elements. During operation of the semiconductor module arrangement, each controllable semiconductor element of the first plurality of controllable semiconductor elements generates switching losses and conduction losses, the switching losses being greater than the conduction losses. Further during operation of the semiconductor module arrangement, each controllable semiconductor element of the second plurality of controllable semiconductor elements generates switching losses and conduction losses, the conduction losses being greater than the switching losses.

Abstract: A semiconductor arrangement includes a controllable semiconductor element having an active region, and bonding wires arranged in parallel to each other in a first horizontal direction. The active region has a first length in the first horizontal direction and a first width in a second horizontal direction perpendicular to the first horizontal direction. Each bonding wire is electrically and mechanically coupled to the controllable semiconductor element by a first number of bond connections arranged above the active region. A first bond connection of each bonding wire is arranged at a first distance from a first edge of the active region. A second bond connection of each bonding wire is arranged at a second distance from a second edge of the active region opposite the first edge. The first and second distances are both less than the first length divided by twice the first number of bond connections.

Abstract: An object sensor test system includes a sensor and a test bench. The sensor includes a receiver configured to receive a simulated optical signal and a processing chain that includes a plurality of processing components configured to process at least one measurement signal generated in response to the simulated optical signal to generate processed test data. The sensor also includes a test interface configured to receive a control signal, and selectively extract processed test data at a selected output of the processing chain based on the control signal. The test bench is configured to transmit the control signal to the test interface, receive the processed test data from the sensor, compare the received processed test data with expected data to generate a comparison result, and determine that a segment of the processing chain is operating normally or abnormally based on the comparison result.

Abstract: A method includes producing a semiconductor wafer. The semiconductor wafer includes a plurality of microelectromechanical system (MEMS) semiconductor chips, wherein the MEMS semiconductor chips have MEMS structures arranged at a first main surface of the semiconductor wafer, a first semiconductor material layer arranged at the first main surface, and a second semiconductor material layer arranged under the first semiconductor material layer, wherein a doping of the first semiconductor material layer is greater than a doping of the second semiconductor material layer. The method further includes removing the first semiconductor material layer in a region between adjacent MEMS semiconductor chips. The method further includes applying a stealth dicing process from the first main surface of the semiconductor wafer and between the adjacent MEMS semiconductor chips.

Abstract: In accordance with an embodiment, a circuit includes: a trimmable reference current generator having a temperature dependent current output node, the trimmable reference current generator including: a proportional to absolute temperature (PTAT) current generation circuit; a first programmable current scaling circuit coupled to the PTAT current generation circuit and including a first output coupled to the temperature dependent current output node; a constant current generation circuit; a second programmable current scaling circuit coupled to the constant current generation circuit and including a first output coupled to the temperature dependent current output node; and a reference interface circuit having an input coupled to the temperature dependent current output node and an output configured to be coupled to a reference current input of a memory sense amplifier.

Abstract: An electrical circuit for providing an output signal based on a first input signal and a second input signal has: a mixer which is configured to receive and mix the first and second input signals in order to generate a mixer output signal and to switch on or off based on the first input signal, wherein a DC signal component of the mixer output signal depends on whether the mixer is switched on or off; and a downstream circuit which is configured to switch on or off based on the DC signal component of the mixer output signal and to provide the output signal based on the mixer output signal.

Abstract: A calibration circuit, including: a signal generator circuit configured to generate a modulated analog input signal, which is based on a digital input word that is modulated; an Analog-to-Digital Converter (ADC) configured to convert an analog reference signal to a digital calibration word, wherein the analog reference signal is a low-pass-filtered version of the analog input signal generated by the signal generator circuit; and a feedback circuit configured to output the digital input word by adjusting the digital calibration word depending on a digital feedback signal, which is based on a modulated version of the analog reference signal, wherein the signal generator circuit, the ADC, and the feedback circuit are provided on a same chip.

Abstract: An apparatus for correcting an input signal is configured for receiving the input signal, the received input signal comprising a series of input values. The apparatus is configured for matching a series of template values to the series of input values by warping the series of template values and the series of input values relatively to each other so as to assign one or more template values to one or more input values, wherein the series of template values represents an approximation of a noise signal that is expected to be comprised in the input signal. The apparatus is configured for obtaining a series of corrected input values based on a mismatch between the input values and their respective assigned template values. The apparatus is configured for providing a corrected signal based on the series of corrected input values.

Abstract: A regulated charge pump includes a comparator having a first input coupled to an output of the regulated charge pump, a second input configured for receiving a reference voltage, and an output for generating an output voltage representing a difference between a charging current of the regulated charge pump and a load current of a load coupled to the output of the regulated charge pump; a first converter having an input coupled to the output of the comparator, and an output connected to a control bus configured to indicate an adjustment of the charging current in response to the comparator output; and a driving stage having a first input coupled to the control bus, and an output for providing the charging current, wherein the output of the driving stage comprises the output of the regulated charge pump.

Abstract: A baseplate for a semiconductor module comprises at least one elevation. The at least one elevation is formed integrally with the baseplate. The baseplate has a uniform first thickness or a thickness which decreases continuously from the edge regions toward the center and which is increased locally up to a maximum second thickness in the region of each of the at least one elevation.

Abstract: A touch sensor includes a touch structure; a signal generator configured to generate an excitation signal; a transmitter configured to receive the excitation signal and transmit an ultrasonic transmit wave towards the touch structure based on the excitation signal; a receiver configured to receive an ultrasonic reflected wave produced by a reflection of the ultrasonic transmit wave at the touch structure, wherein the transmitter and the receiver are coupled by a capacitive path, the receiver is configured to be influenced by the excitation signal whereby the excitation signal induces a capacitive cross-talk on the capacitive path, and the receiver is configured to generate a measurement signal representative of the capacitive cross-talk; and a measurement circuit coupled to the receiver and configured to perform a comparison of the measurement signal with a threshold to determine whether a no-touch event or a touch event has occurred at the touch interface.

Abstract: A triple-membrane MEMS device includes a first membrane, a second membrane and a third membrane spaced apart from one another, wherein the second membrane is between the first membrane and the third membrane, a sealed low pressure chamber between the first membrane and the third membrane, a first stator and a second stator in the sealed low pressure chamber, and a signal processing circuit configured to read-out output signals of the triple-membrane MEMS device.

Abstract: A circuitry is provided. The circuitry may include a power stage including a first transistor and a second transistor, an encapsulation including encapsulation material encapsulating the power stage, wherein the first transistor and the second transistor are arranged in an L-shape with respect to each other along their long axes, and a passive electronic component arranged on or embedded within the encapsulation at least partially, in top view, within a rectangular area defined by the L-shape configuration and further next to the first transistor and next to the second transistor.

Abstract: A non-volatile memory has an array of non-volatile memory cells, first reference word lines and second reference word lines, and sense amplifiers. The sense amplifiers read system data, that has been written to supplemental non-volatile memory cells of the first reference word lines, using comparison of the supplemental non-volatile memory cells of the first reference word lines to supplemental non-volatile memory cells of the second reference word lines. Status of erasure of the non-volatile memory cells of the array is determined based on reading the system data.

Abstract: A power semiconductor module arrangement includes a power electronics substrate comprising a first DC voltage pad, a second DC voltage pad, a first load pad, and a second load pad, first and second transistor dies mounted on the first load pad, third and fourth transistor dies mounted the first DC voltage pad, the first and second transistor dies collectively form a first switch, the third and fourth transistor dies collectively form a second switch, the first and second DC voltage pads are arranged such that a DC supply impedance for a first commutation loop that flows through the first and third transistor dies matches a DC supply impedance for a second commutation loop that flows through the second and fourth transistor dies, and an impedance of a first load connection to the third transistor die is greater than an impedance of a second load connection to the fourth transistor die.

Abstract: A circuit for controlling a motor that includes control circuitry configured to determine whether a commutation event has occurred for a first sector of a plurality of sectors of a cycle for the motor based on a first selected phase current signal and a second selected phase current signal. In response to a determination that the commutation event has occurred for the first sector, the control circuitry is configured to determine that the motor is operating in a second sector of the plurality of sectors of the cycle for the motor. The control circuitry is further configured to determine a second angle of stator voltage vector for the motor based on the determination that the motor is operating in the second sector and generate the control signal based on the second angle of stator voltage vector for the motor.

Abstract: An overvoltage protection device includes first and second semiconductor devices arranged in an anti-serial configuration with a conductive link connected between the first and second semiconductor devices at a central node of the overvoltage protection device, a first terminal connection to a terminal of the first semiconductor device that is opposite from the central node, a second terminal connection to a terminal of the second semiconductor device that is opposite from the central node. A total capacitance of elements in a first transmission path that is between the first terminal connection and the central node substantially matches a total capacitance of elements in a second transmission path that is between the second terminal connection and the central node. The total capacitance of elements in the second transmission path includes a self-capacitance of the conductive link.