Abstract: A process for precisely and efficiently manufacturing a semiconductor wafer is provided, which can prevent contamination by metals inside silicon crystals and remove the factors that degrade the GOI produced during the wafer manufacturing steps. A sliced and chamfered semiconductor wafer is subjected to lapping. The lapped semiconductor wafer is then etched, and thus the working strains produced by lapping is removed. The two sides of the etched semiconductor wafer are then primary polished with a dual-surface polishing machine. The primary polished semiconductor wafer is etched with an aqueous solution of 1% NaOH solution. The weak alkali etched semiconductor wafer is then mirror processed by a finish polishing. The finish polished semiconductor wafer is washed with an SC-1 solution.

Abstract: A method for efficiently fabricating semiconductor wafers of good planarization without utilizing chemical solutions of high etching rate is disclosed. The method slices a single-crystal ingot into slices of wafers. The edge of each wafer is chamfered. A lapping step is carried out to planarize the chamfered wafer. Both side surfaces of the wafer are then polished. Next, the wafer surface is mirror polished. Finally, the wafer is cleaned.

Abstract: A method of fabricating a semiconductor wafers, which can prevent metal contamination when alkali etching is used. A semiconductor ingot is cut into wafers. The peripheral portion of the sliced wafers is chamfered. The chamfered wafers are then planarized by lapping. The planarized wafers are alkali etched. The alkali etched wafers are subjected to acid washing by using diluted mixed acid solution. The surface of the acid-washed wafers are then polished. The polished wafers are washed again.

Abstract: This invention provides a method and apparatus for fabricating semiconductor single crystals. By using the method of this invention, the temperature gradient of the single crystal being lifted can be easily controlled. The as-grown defect density can be reduced, and it is possible to manufacture high quality semiconductor single crystals with high oxidation-film breakdown strength. A shield cylinder is used for surrounding the semiconductor single crystal 7 being lifted, the shield cylinder is made to be of the telescopic type and consists of a first shield duct 4, a second shield duct 5, a third shield duct 6. A wire 8 wrapping around a wind-up reel 10 is engaged with the third shield duct 6, and the shield cylinder can be driven to extend or retract by rotating the wind-up reel 10. An ascend and descend rod 3 is connected with the first duct 4, and the shield cylinder can be driven to move upward or downward by lifting or lowering the ascend and descend rod 3.

Abstract: A MOS capacitor in which an insulating layer of thermal oxide film is disposed between the electrode 2 and the silicon wafer 1 is formed. While a light beam of an energy larger than 1.1 eV is irradiated on the electrode 2 and its periphery, electrons inject from the electrode 2 side (voltage is applied from the silicon wafer 1 side). The injected electrons are activated by the light irradiation. For both p-type or n-type semiconductor, the dielectric breakdown electric field strength can be precisely measured according to the degree of processing defects. The evaluation method is particularly effective for the n-type semiconductor wafer, which was difficult to evaluate by the prior art.

Abstract: A peeling jig is provided for peeling a bonded wafer having voids formed in bonding surfaces so as to rebond, which does not injure the bonding surfaces or cause the adherence of particles thereto. The peeling jig includes a wedge portion 1a for inserting into the bonding surfaces, and a flat portion provided at the both sides of the base of the wedge portion. The apex angle of the wedge portion, when the chamfered angles at the bonding sides of the supporting substrate and active wafer of the bonded wafer to be separated are respectively .alpha. and .beta., is .theta. and .theta.>.alpha.+.beta.. When the wedge portion is inserted into the bonding surfaces, the right and left inclined surfaces of the wedge portion are in contact with the peripheries of the chamfered portions, and then chamfered portions are flared.

Abstract: A method of polishing semiconductor wafers is provided. The method will not impair the original (pre-polishing) contour of semiconductor wafers, and semiconductor wafers can be polished so as to have high flatness. In the method according to this invention, a silicon rubber sheet 2 is fixed on a base 4, and an abrasive cloth 5 is secured on the silicon rubber sheet 2. A template 1 of thickness close to that of a semiconductor wafer 10 is secured on a backing pad 32. The semiconductor wafer 10 is restrained by the template 1 and is impelled in to contact with the abrasive cloth 5 to polish effectively.

Abstract: A low-cost and high productivity charging material is provided for use in the recharge or additional charge fabrication of single-crystal semiconductor by means of the CZ method. Common polysilicon rods utilized in recharge or additional charge fabrication have their end portions formed into ring grooves. A joint element is made of silicon. When the end portions of the rods contact, the joint element engages the grooves to connect the rods together along their longitudinal direction. The rods can have arbitrary length, whereas the total weight, including the joint element, must be adjusted by the length to be greater than those of the melted polysilicon and the suspending portions.

Abstract: The present invention provides a carrying device for semiconductor wafers. By using a simply constructed stage, the semiconductor wafers can be precisely positioned and rotating semiconductor wafers can be reliably supported and, only one kind of wafer stage needs to be provided for semiconductor wafers of different diameters, allowing more flexibility. The carrying device for loading a semiconductor wafer into a wafer carrier or taking the semiconductor wafer from the wafer carrier includes a carrier station for receiving wafer carrier, carrying arms for carrying semiconductor wafer, and a wafer stage for receiving the wafer. The wafer stage has a supporting shaft and four supporting arms. The supporting shaft is horizontally rotatable and is elevatable. Each supporting arm is upwardly curved.

Abstract: A method for precisely detecting the optimal temperature of the melt in a furnace center for necking step without using a radiation thermometer and two-color thermometer is disclosed. The invention observes a meniscus ring portion at the interface of a seed in a crucible and the melt surface by TV camera. Double rings of high lightness are examined through the image taken by the camera, and in the same time, the variation of temperature can be detected by the number of peaks in each scanning line in a picture of the TV screen.

Abstract: The present invention provides a process for fabricating a semiconductor wafer, including surface-grinding both sides of the sliced wafer, and cleaning the surface-ground wafer with an alkaline solution to remove the sharp protruded part. The frictional resistance between the surface-ground wafer and a polishing cloth can be reduced, thus extending a life of a template and the polishing cloth.

Abstract: The present invention proposes a method for cutting semiconductor ingots into sliced wafers by use of wire saws, so that the cut-out surface shape of wafers can be easily controlled by utilizing a wire-saw cutting device.The workpiece holding plate 21 is disposed in such a way that it can move along the longitudinal axis Y of the semiconductor ingot 3. The semiconductor ingot 3 is moved downward to facilitate the cutting operation by wire saw. Accordingly, the displacement along the longitudinal axis Y is made to change in response to the variation along the location of the semiconductor ingot 3.

Abstract: This invention provides a method for pulling a single crystal silicon whose diameter is more than 200 mm. The single crystal silicon pulled by the method of this invention has a desired oxygen concentration and a uniform oxygen concentration distribution along its longitudinal axis. In the process of this invention, the single crystal silicon and the quartz crucible are driven to rotate in reverse directions, and the rotation speed of the single crystal silicon is set within the range of 8 to 16 rpm and to be more than twice the rotating speed of the crucible. The rotation speed of the crucible is set to be at its minimum value during pulling a body portion which begins from the beginning end of the single-crystal body and terminates at a location apart from the beginning end within a distance of 10% of the total length of the single-crystal body. Subsequently, the rotation speed of the crucible is gradually raised and is set to no more than a maximum value of 8 rpm.

Abstract: A method for polishing a semiconductor wafer is provided. A semiconductor wafer is detached from a polishing pad on a side of an upper polishing plate and is kept to be supported by a lower polishing plate. A contact area between the a wafer and the upper polishing plate is set to be less than a contact area between the wafer and the lower polishing plate. As a result, the wafer is definitely detached from the polishing pad on the side of the upper polishing plate and is to be kept supported by the lower polishing plate when the upper polishing plate is lifted.

Abstract: This invention provides a melt receiver for a semiconductor single-crystal manufacturing device, which is capable of protecting the main chamber from being damaged by the outflow of the melt or dropping of the debris of the broken crucibles and therefore preventing steam explosion. The melt receiver 1 is consisted of an adiabatic member 3 made of carbon fibers; a cover 2 made of high strength C/C material which shelters the surface of the adiabatic member 3; and a bottom plate 4. A groove 2a is formed on the upper surface of the cover 2. The groove 2a has a size capable of accommodating all of the melt stored in the quartz crucible 7. The melt flown out or articles dropped down due to damage of the crucible are received by the melt receiver 1, and the melt flown out can not reach the bottom of the main chamber 9. The melt receiver can also be consisted of a melt absorption layer made of adiabatic material, and a melt isolation layer made of graphite or high strength C/C material.

Abstract: A semiconductor single crystal lift device which comprises a crucible for melting materials for forming semiconductor single crystals and a radiation screen disposed at an upper portion of the crucible and formed of a reversed-cone-shaped adiabatic tube surrounding a lift zone, the apparatus being adopted for lifting up the semiconductor single crystal from a melt in the crucible, in which the radiation screen is divided into more than three adiabatic members, at least part of the adiabatic members being configured in a detachable fashion so that an adiabatic nature of the radiation screen can be partly altered.

Abstract: The object of the present invention affords a method of feeding dopant and a dopant composition used therein for easily preparing single crystals having a desired doping concentration during semiconductor substrate fabrication.In accordance with the present invention, a water solution containing oxides of the dopant is first added to the liquid containing colloidal silica. The colloidal silica can adsorb the oxides of the dopant to form a dopant composition. Around rod-shaped polysilicon, that is polysilicon rod, the dopant composition is discontinuously coated on the periphery of the polysilicon rods spaced at constant intervals and then dried. When the polysilicon rods are melted in an apparatus for manufacturing single crystals by a heater, dopant is protected by the glassed silica without evaporation. Accordingly, the dopant can be provided at a predetermined concentration to sustain the grown single crystals having a doping concentration as required.

Abstract: In the wafer-bonding method of fabricating an SOI (silicon-on-insulator) substrate, even if there exists thickness variation in the silicon layer, devices fabricated onto the silicon layer, in accordance with the present invention, have a decreased threshold voltage variation. According to the present invention, after bonding two wafers, the thickness of the thinned silicon layer atop the SOI substrate is measured to precisely determine the local thickness distribution. However, the fabricated devices' threshold voltage depends upon the doping concentration as well as the thickness of the silicon layer. Shielding masks of photoresist are thereafter formed selectively on a portion of the silicon that are thicker. Then, through the masks as shielding, impurities are implanted into the silicon layer to adjust the doping concentration therein. Accordingly, the doping concentration is varied corresponding to the thickness, with the result that the threshold voltage variation nearly approaches zero.

Abstract: The present invention provides a process for fabricating an SOI substrate with no peripheral scratches and with enhanced fabrication efficiency. The present process includes bonding a semiconductor wafer of an active substrate 1 and a semiconductor base wafer 2 to form a bonded wafer 4; surface-grinding the active substrate 1; spin etching the surface-ground active substrate 1; and PACE processing the etched active substrate 1 to form the active substrate into a thin film and simultaneously, to remove the non-bonded peripheral portion of the bonded wafer 4.

Abstract: The objects of the present invention are to remove the dust in a closed container, to keep the pressure in the closed container within a predetermined range, and to shorten the maintenance time of a vacuum pump system.The present invention provides a centrifugal dust collector 2 on main pipes which connects a furnace body 1, a mechanical press 9 and a dry pump 10, and a metal mesh dust collector 15 on a bifurcated pipe in a single-crystal semiconductor pulling apparatus. When the vacuum pump process begins, the metal mesh dust collector 15 collects amorphous silicon generated in the furnace 1. As the pressure in the furnace is reduced, the centrifugal dust collector 2 collects the dust particles instead. Since the gas flow rate increases as the vacuum state become higher, the critical diameter of collectable particles decreases, thereby improving the dust collection efficiency.