Patents Assigned to Kovio, Inc.
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Patent number: 8296943Abstract: The present invention relates to surveillance and/or identification devices having capacitors connected in parallel or in series, and methods of making and using such devices. Devices with capacitors connected in parallel, where one capacitor is fabricated with a relatively thick capacitor dielectric and another is fabricated with a relatively thin capacitor dielectric achieve both a high-precision capacitance and a low breakdown voltage for relatively easy surveillance tag deactivation. Devices with capacitors connected in series result in increased lateral dimensions of a small capacitor. This makes the capacitor easier to fabricate using techniques that may have relatively limited resolution capabilities.Type: GrantFiled: May 15, 2009Date of Patent: October 30, 2012Assignee: Kovio, Inc.Inventors: Patrick Smith, Criswell Choi, James Montague Cleeves, Vivek Subramanian, Arvind Kamath, Steven Molesa
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Patent number: 8264359Abstract: The present invention relates to methods of making capacitors for use in surveillance/identification tags or devices, and methods of using such surveillance/identification devices. The capacitors manufactured according to the methods of the present invention and used in the surveillance/identification devices described herein comprise printed conductive and dielectric layers. The methods and devices of the present invention improve the manufacturing tolerances associated with conventional metal-plastic-metal capacitor, as well as the deactivation reliability of the capacitor used in a surveillance/identification tag or device.Type: GrantFiled: October 10, 2008Date of Patent: September 11, 2012Assignee: Kovio, Inc.Inventors: Vivek Subramanian, Patrick Smith, Vikram Pavate, Arvind Kamath, Criswell Choi, Aditi Chandra, James Montague Cleeves
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Patent number: 8264027Abstract: A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of the first semiconductor island; a tunneling dielectric layer on at least part of the second semiconductor island; a floating gate on at least part of the gate dielectric layer and the tunneling dielectric layer; and a metal layer in electrical contact with the control gate and the source and drain terminals. In one advantageous embodiment, the nonvolatile memory cell may be manufactured using an “all-printed” process technology.Type: GrantFiled: March 12, 2010Date of Patent: September 11, 2012Assignee: Kovio, Inc.Inventors: Arvind Kamath, Patrick Smith, James Montague Cleeves
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Patent number: 8242227Abstract: Doped polysilanes, inks containing the same, and methods for their preparation and use are disclosed. The doped polysilane generally has the formula H-[AaHb(DRx)m]q-[(AcHdR1e)n]p—H, where each instance of A is independently Si or Ge, and D is B, P, As or Sb. In preferred embodiments, R is H, -AfHf+1R2f, alkyl, aryl or substituted aryl, and R1 is independently H, halogen, aryl or substituted aryl. In one aspect, the method of making a doped poly(aryl)silane generally includes the steps of combining a doped silane of the formula AaHb+2(DRx)m (optionally further including a silane of the formula AcHd+2R1e) with a catalyst of the formula R4wR5yMXz (or an immobilized derivative thereof) to form a doped poly(aryl)silane, then removing the metal M. In another aspect, the method of making a doped polysilane includes the steps of halogenating a doped polyarylsilane, and reducing the doped halopolysilane with a metal hydride to form the doped polysilane.Type: GrantFiled: April 25, 2011Date of Patent: August 14, 2012Assignee: Kovio, Inc.Inventors: Wenzhuo Guo, Vladimir K. Dioumaev, Joerg Rockenberger
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Patent number: 8236916Abstract: Polysilanes, inks containing the same, and methods for their preparation are disclosed. The polysilane generally has the formula H-[(AHR)n(c-AmHpm-2)q]—H, where each instance of A is independently Si or Ge; R is H, -AaHa+1Ra, halogen, aryl or substituted aryl; (n+a)?10 if q=0, q?3 if n=0, and (n+q)?6 if both n and q?0; p is 1 or 2; and m is from 3 to 12. In one aspect, the method generally includes the steps of combining a silane compound of the formula AHaR14-a, the formula AkHgR1?h and/or the formula c-AmHpmR1rm with a catalyst of the formula R4xR5yMXz (or an immobilized derivative thereof) to form a poly(aryl)silane; then washing the poly(aryl)silane with an aqueous washing composition and contacting the poly(aryl)silane with an adsorbent to remove the metal M. In another aspect, the method includes the steps of halogenating a polyarylsilane to form a halopolysilane; and reducing the halopolysilane with a metal hydride to form the polysilane.Type: GrantFiled: December 23, 2008Date of Patent: August 7, 2012Assignee: Kovio, Inc.Inventors: Wenzhuo Guo, Vladimir K. Dioumaev, Joerg Rockenberger, Brent Ridley
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Patent number: 8227320Abstract: The present invention relates to methods of making capacitors for use in surveillance/identification tags or devices, and methods of using such surveillance/identification devices. The capacitors manufactured according to the methods of the present invention and used in the surveillance/identification devices described herein comprise printed conductive and dielectric layers. The methods and devices of the present invention improve the manufacturing tolerances associated with conventional metal-plastic-metal capacitor, as well as the deactivation reliability of the capacitor used in a surveillance/identification tag or device.Type: GrantFiled: October 10, 2008Date of Patent: July 24, 2012Assignee: Kovio, Inc.Inventors: Vivek Subramanian, Patrick Smith, Vikram Pavate, Arvind Kamath, Criswell Choi, Aditi Chandra, James Montague Cleeves
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Patent number: 8211396Abstract: Heterocyclosilane compounds and methods for making the same. Such compounds (and/or ink compositions containing the same) are useful for printing or spin coating a doped silane film onto a substrate that can easily be converted into a doped amorphous silicon film (that may also be hydrogenated to some extent) or doped polycrystalline semiconductor film suitable for electronic devices. Thus, the present invention advantageously provides commercial qualities and quantities of doped semiconductor films from a “doped liquid silicon” composition.Type: GrantFiled: September 24, 2004Date of Patent: July 3, 2012Assignee: Kovio, Inc.Inventors: Wenzhuo Guo, Fabio Zürcher, Joerg Rockenberger, Klaus Kunze, Vladimir K. Dioumaev, Brent Ridley, James Montague Cleeves
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Patent number: 8191018Abstract: Methods and software for correcting printable circuit layouts. The methods generally including steps of identifying shapes in an input circuit layout, applying a plurality of correction rules to the shapes, and producing an output printed circuit layout in accordance with the identified shapes and the correction rules. The input circuit layout generally comprises a bitmapped image or other description of at least one printable layer of at least one electronic component, device, or die. Embodiments of the present invention further allow for more precise control of spreading and effective coverage of features (e.g., source/drain terminal regions, gates, capacitors, diodes, interconnects, etc.) on a substrate by a printed ink composition including electronic materials.Type: GrantFiled: July 17, 2008Date of Patent: May 29, 2012Assignee: Kovio, Inc.Inventors: Steven Molesa, Erik Scher, Patrick Smith, Michael Kocsis
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Patent number: 8164423Abstract: A RF MOS- or nonlinear device-based surveillance and/or identification tag, and methods for its manufacture and use. The tag generally includes (a) an inductor, (b) a first capacitor plate coupled to the inductor, (c) a dielectric film on the first capacitor plate, (d) a semiconductor component on the dielectric film, and (e) a conductor that provides electrical communication between the semiconductor component and the inductor. The method of manufacture generally includes (1) depositing a semiconductor material (or precursor) on a dielectric film; (2) forming a semiconductor component from the semiconductor material/precursor; (3) forming a conductive structure at least partly on the semiconductor component; and (4) etching the electrically functional substrate to form (i) an inductor and/or (ii) a second capacitor plate.Type: GrantFiled: April 15, 2008Date of Patent: April 24, 2012Assignee: Kovio, Inc.Inventors: J. Devin MacKenzie, James Montague Cleeves, Vik Pavate, Christopher Gudeman, Fabio Zurcher, Max Davis, Dan Good, Joerg Rockenberger
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Patent number: 8158518Abstract: Methods of forming contacts (and optionally, local interconnects) using an ink comprising a silicide-forming metal, electrical devices such as diodes and/or transistors including such contacts and (optional) local interconnects, and methods for forming such devices are disclosed. The method of forming contacts includes depositing an ink of a silicide-forming metal onto an exposed silicon surface, drying the ink to form a silicide-forming metal precursor, and heating the silicide-forming metal precursor and the silicon surface to form a metal silicide contact. Optionally, the metal precursor ink may be selectively deposited onto a dielectric layer adjacent to the exposed silicon surface to form a metal-containing interconnect. Furthermore, one or more bulk conductive metal(s) may be deposited on remaining metal precursor ink and/or the dielectric layer. Electrical devices, such as diodes and transistors may be made using such printed contact and/or local interconnects.Type: GrantFiled: July 17, 2008Date of Patent: April 17, 2012Assignee: Kovio, Inc.Inventors: Aditi Chandra, Arvind Kamath, James Montague Cleeves, Joerg Rockenberger, Mao Takashima, Erik Scher
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Patent number: 8138921Abstract: A method for reliable deactivation of a security (EAS) tag, and an apparatus for accomplishing the same. The method generally includes placing a security tag a first distance from a deactivation apparatus; determining whether a deactivation confirmation signal has occurred; and when it is determined that the deactivation confirmation signal did not occur, placing the security tag closer to the deactivation apparatus.Type: GrantFiled: August 8, 2008Date of Patent: March 20, 2012Assignee: Kovio, Inc.Inventors: James Montague Cleeves, Vivek Subramanian
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Patent number: 8124040Abstract: A method of making hydrogenated Group IVA compounds having reduced metal-based impurities, compositions and inks including such Group IVA compounds, and methods for forming a semiconductor thin film. Thin semiconducting films prepared according to the present invention generally exhibit improved conductivity, film morphology and/or carrier mobility relative to an otherwise identical structure made by an identical process, but without the washing step. In addition, the properties of the present thin film are generally more predictable than those of films produced from similarly prepared (cyclo)silanes that have not been washed according to the present invention.Type: GrantFiled: August 17, 2010Date of Patent: February 28, 2012Assignee: Kovio, Inc.Inventors: Klaus Kunze, Wenzhuo Guo, Fabio Zurcher, Mao Takashima, Laila Francisco, Joerg Rockenberger, Brent Ridley
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Patent number: 8099707Abstract: Semiconductor devices and/or structures, and methods for fabricating the same are disclosed. Embodiments of the present invention allow for production of customized products, while also minimizing production steps, avoiding some or all photolithography steps, and reducing overall production costs. Using selective deposition and patterning methods such as printing, to form metal and/or dielectric layer(s) on substrates where one or more device circuit components are pre-made in a factory, but which require further processing to obtain an electrically functional circuit, results in the ability for a user/consumer to make custom, specific and/or unique electrically functional circuits without incurring the cost and complexity of a full fabrication to form and pattern all of the layers.Type: GrantFiled: March 17, 2009Date of Patent: January 17, 2012Assignee: Kovio, Inc.Inventor: Jiang Li
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Patent number: 8092867Abstract: Compositions and methods for controlled polymerization and/or oligomerization of hydrosilanes compounds including those of the general formulae SinH2n and SinH2n+2 as well as alkyl- and arylsilanes, to produce soluble silicon polymers as a precursor to silicon films having low carbon content.Type: GrantFiled: October 4, 2007Date of Patent: January 10, 2012Assignee: Kovio, Inc.Inventors: Dmitry Karshtedt, Joerg Rockenberger, Fabio Zürcher, Brent Ridley, Erik Scher
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Patent number: 8085068Abstract: Frequency divider circuits and architectures, and methods of implementing and using the same, are disclosed. In one embodiment, the frequency divider circuit includes a dynamic section that receives an input signal and outputs an intermediate signal that has a frequency lower than that of the input signal; and a static section that receives the intermediate signal and outputs a signal having a frequency that is lower than that of the intermediate signal. Stages in the dynamic and/or static section can be implemented using thin film transistors (TFTs). Embodiments of the present invention advantageously provide an approach that takes overcomes problems associated with the leakage and speed characteristics of TFTs.Type: GrantFiled: August 7, 2009Date of Patent: December 27, 2011Assignee: Kovio, Inc.Inventor: Vivek Subramanian
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Patent number: 8066805Abstract: Printable metal formulations, methods of making the formulations, and methods of coating or printing thin films from metal ink precursors are disclosed. The metal formulation generally includes one or more Group 4, 5, 6, 7, 8, 9, 10, 11, or 12 metal salts or metal complexes, one or more solvents adapted to facilitate coating and/or printing of the formulation, and one or more optional additives that form (only) gaseous or volatile byproducts upon reduction of the metal salt or metal complex to an elemental metal and/or alloy thereof. The formulation may be made by combining the metal salt(s) or metal complex(es) and the solvent(s), and dissolving the metal salt(s) or metal complex(es) in the solvent(s) to form the formulation. Thin films may be made by coating or printing the metal formulation on a substrate; removing the solvents to form a metal-containing precursor film; and reducing the metal-containing precursor film.Type: GrantFiled: May 30, 2008Date of Patent: November 29, 2011Assignee: Kovio, Inc.Inventors: Fabio Zürcher, Aditi Chandra, Wenzhuo Guo, Erik Scher, Mao Takashima, Joerg Rockenberger
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Patent number: 8059478Abstract: Methods of testing and sorting integrated circuits in clusters are disclosed. Each cluster has power and data terminals connected to common power and data busses providing a common power supply. Each integrated circuit has a first non-volatile memory storing an activation code and a second programmable non-volatile memory that is capable of storing the activation code. If an integrated circuit passes testing, the activation code stored in the first non-volatile memory is written into the second non-volatile memory. An integrated circuit is independently functional upon separation from the cluster if the codes in the first and second non-volatile memories match. Upon separation, integrated circuits are queried to determine which respond. Each integrated circuit includes logic adapted to determine whether the codes in the first and second non-volatile memories match. If the codes do not match, the logic permanently disables the integrated circuit upon separation from the cluster.Type: GrantFiled: December 4, 2008Date of Patent: November 15, 2011Assignee: Kovio, Inc.Inventor: Roger G. Stewart
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Patent number: 8057865Abstract: Polysilanes, inks containing the same, and methods for their preparation are disclosed. The polysilane generally has the formula H—[(AHR)n(c—AmHpm?2)q]—H, where each instance of A is independently Si or Ge; R is H, —AaHa+1Ra, Halogen, aryl or substituted aryl; (n+a)?10 if q=0, q?3 if n=0, and (n+q)?6 if both n and q?0; p is 1 or 2; and m is from 3 to 12. In one aspect, the method generally includes the steps of combining a silane compound of the formula AHaR14?a, the formula AkHgR1?h and/or the formula c—AmHpmR1rm with a catalyst of the formula R4xR5yMXz (or an immobilized derivative thereof) to form a poly(aryl)silane; then washing the poly(aryl)silane with an aqueous washing composition and contacting the poly(aryl)silane with an adsorbent to remove the metal M. In another aspect, the method includes the steps of halogenating a polyarylsilane to form a halopolysilane; and reducing the halopolysilane with a metal hydride to form the polysilane.Type: GrantFiled: August 14, 2007Date of Patent: November 15, 2011Assignee: Kovio, Inc.Inventors: Wenzhuo Guo, Vladimir K. Dioumaev, Joerg Rockenberger, Brent Ridley
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Patent number: 7981482Abstract: Methods for forming doped silane and/or semiconductor thin films, doped liquid phase silane compositions useful in such methods, and doped semiconductor thin films and structures. The composition is generally liquid at ambient temperatures and includes a Group IVA atom source and a dopant source. By irradiating a doped liquid silane during at least part of its deposition, a thin, substantially uniform doped oligomerized/polymerized silane film may be formed on a substrate. Such irradiation is believed to convert the doped silane film into a relatively high-molecular weight species with relatively high viscosity and relatively low volatility, typically by cross-linking, isomerization, oligomerization and/or polymerization. A film formed by the irradiation of doped liquid silanes can later be converted (generally by heating and annealing/recrystallization) into a doped, hydrogenated, amorphous silicon film or a doped, at least partially polycrystalline silicon film suitable for electronic devices.Type: GrantFiled: June 19, 2006Date of Patent: July 19, 2011Assignee: Kovio, Inc.Inventors: Fabio Zürcher, Wenzhuo Guo, Joerg Rockenberger, Vladimir K. Dioumaev, Brent Ridley, Klaus Kunze, James Montague Cleeves
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Patent number: 7977240Abstract: Metal ink compositions, methods of forming such compositions, and methods of forming conductive layers are disclosed. The ink composition includes a bulk metal, a transition metal source, and an organic solvent. The transition metal source may be a transition metal capable of forming a silicide, in an amount providing from 0.01 to 50 at. % of the transition metal relative to the bulk metal. Conductive structures may be made using such ink compositions by forming a silicon-containing layer on a substrate, printing a metal ink composition on the silicon-containing layer, and curing the composition. The metal inks of the present invention have high conductivity and form low resistivity contacts with silicon, and reduce the number of inks and printing steps needed to fabricate integrated circuits.Type: GrantFiled: February 13, 2009Date of Patent: July 12, 2011Assignee: Kovio, Inc.Inventors: Joerg Rockenberger, Yu Chen, Fabio Zürcher, Scott Haubrich