Abstract: A matrix addressable display includes a delay locked loop formed from a delay chain formed from several variable delay blocks and a comparator. The delay locked loop receives a horizontal sync portion of an image signal and propagates the horizontal sync through the chain of delay blocks. The output of the last delay block drives the comparator that also receives an undelayed horizontal sync component. The comparator compares the undelayed horizontal sync to the delayed horizontal sync component and produces an error signal corresponding to the phase difference. The error signal is input to each of the delay blocks. In response to the error signal, the delay of the respective delay blocks increases or decreases to reduce the phase difference between the undelayed horizontal sync component and the delayed sync component. In addition to driving the delay chain, the horizontal sync component also walks a "1" through a row driver to sequentially activate rows of the array.

Abstract: Laser-assisted chemical vapor deposition is used to form spacers at desired locations in a field emission display. The spacers can be designed with different shapes to provide increased strength and also to be formed differently depending on the their location on the display.

Abstract: A process is provided for strengthening a backplate of a field emission display. In one embodiment, the process comprises, disposing a plurality of attachments on a surface of the backplate, disposing a strengthening member along the surface of the backplate, and attaching the strengthening member to the attachments. In another embodiment, a field emission display is provided having a backplate comprising, a plurality of attachments on a surface of the backplate, and a strengthening member disposed along the surface of the backplate, wherein the strengthening member is connected to the attachments.

Abstract: Photoetchable glass is used to form spacer elements for large area field emission displays. Frit dots are placed onto a substrate. A sheet of photo etchable glass is exposed to UV light using a mask such that the UV light exposes the etchable areas and does not expose the areas which will form the spacers. The etchable glass is then heat treated to crystallize the UV exposed areas and to tailor the coefficient of thermal expansion. Next the glass is adhered to the frit coated substrate and the UV exposed areas etched away leaving spacers adhered to frit dots.

Abstract: An anode of a flat panel display besides having a glass substrate, a patterned black grille on the substrate, a conductive layer covering the grille and the substrate, and a phosphor layer covering, also has one or more additional transparent layers that reduce the reflectance of the flat panel display from 14% down to 1%-4%. These additional layers are placed between the black matrix grille and the substrate, and between the conductive layer and phosphor layer. The two additional layers are selected and designed to reduce the reflectance that occurs at these respective interfaces.

Abstract: The lower surface of a photolithographic mask contains recesses sized and adapted to receive upwardly-projecting features so that, when the mask is placed in position over the to-be-exposed and etched surface, the lower surface of the mask is in direct contact with or very closely adjacent (e.g., not more than about 5 or 6 microns above) the top of the resist layer. In the disclosed practice, the mask is quartz, the lower surface of the mask is pressed into contact with the resist before the resist is exposed, and the device being formed is a field emission device.

Abstract: A serial to parallel conversion circuit uses a dynamic shift register in a phase locked loop for an index to access a parallel holding register. The composite input signal includes serial data to be sampled and a synchronizing signal at an integer factor of the sampling serial data rate. The phase locked loop generates a control signal for sampling the serial data at a multiple of the synchronizing frequency by incorporating a delay between a variable frequency oscillator output and a phase comparator input. The delay element in one embodiment includes a shift register with a walking-one pattern that overflows to the phase comparator. The walking-one pattern is used to identify which position of the holding register should store the next sample of the input signal. The shift register is self-initialized by a logic combination of all shift register outputs. Power dissipation by the serial to parallel conversion circuit is minimal because only one 7-transistor shift register cell draws current at a time.

Abstract: A substrate is placed on a charging surface, to which a first voltage is applied. Etch-resistant dry particles are placed in a cup in a nozzle to which a second voltage, less than the first voltage, is applied. A carrier gas is directed through the nozzle, which projects the dry particles out of the nozzle toward the substrate. The particles pick up a charge from the potential applied to the nozzle and are electrostatically attracted to the substrate. The particles adhere to the substrate, where they form an etch mask. The substrate is etched and the particles are removed. Emitter tips for a field emission display may be formed in the substrate.

Abstract: A field emission display includes a discrete storage capacitor coupled between a column line and a reference potential. The display also includes a discharge circuit coupled between a transmission line tap and the storage capacitor. The discharge circuit receives an image signal from the transmission line and transfers charge from the transmission line to the storage capacitor. In one embodiment, the discharge circuit includes a pair of opposed zener diodes. In response to a brief negative-going input pulse on the transmission line, the capacitor is discharged through the diodes. Then, the diodes recover and capacitor and column line are isolated from the tap. A selected line of an extraction grid is then activated to extract electrons from an emitter set coupled to the column line. The voltage differential between the extraction grid and the emitter set extracts electrons from the emitter set that are replaced by the capacitor.

Abstract: According to two aspects of the invention, a FED and a process for making a FED are provided which effectuate more accurate and efficient sealing between a faceplate and a backplate assembly, with more accurate and efficient sealing between the faceplate and cathode member. The FED is made according to a process including: aligning the faceplate and the cathode member; disposing an adhesive between the faceplate and the cathode member; pressing the faceplate and the cathode member together; disposing a frit seal between the faceplate and the backplate assembly; and heating the frit seal to a temperature sufficient to cause the frit to seal.

Abstract: A cold cathode structure, useful for field emission displays, is disclosed. A thin resistive silicon film is disposed on a glass substrate; conductive emitter tips are disposed on top thereof. An alloy of amorphous silicon and amorphous carbon is used for the emitter tips. The proportion of the carbon in the alloy increases, gradually or abruptly, from the base to the top of the emitter tips.The carbon gradient is implemented during the process step, in which an n-type silicon layer is formed from which the emitter tips are made in subsequent masking and etching steps. The amount of carbon makes the emitter tips harder and gives lower work function at greater stability. Moreover, the carbon gradient allows for additional sharpening of the emitter tips.

Abstract: A transmission line includes a high permeability conductor. The high permeability conductor increases the inductance-per-length of the transmission line to reduce the propagation velocity along the line. The high permeability conductor supplements a high dielectric constant insulator and high permeability core that increase the capacitance-per-length and inductance-per-length, respectively. In one embodiment, the transmission line is a microstrip line that is used in a matrix addressable display. In another embodiment, the transmission line is a coaxial line where the central conductor includes a center layer of nonmagnetic material and an outer layer of high permeability material. The high permeability conductor can be formed from a single layer of high permeability material or may be formed from a central layer of high conductivity material coated with an outer layer of a high permeability conductor.

Abstract: The present invention provides an FED with a getter material deposited and activated on the substrates of the faceplate and the baseplate of the FED. In one embodiment of the invention, a large FED includes a faceplate, a baseplate, and an unactivated non-evaporable getter material. The faceplate has a transparent substrate with an inner surface, and a cathodoluminescent material disposed on a portion of the inner surface. The baseplate has a base substrate with a first surface and an emitter array formed on the first surface. The baseplate and the faceplate are coupled together to form a sealed vacuum space in which the inner surface and the first surface are juxtaposed to one another in a spaced-apart relationship across a vacuum gap. The unactivated non-evaporating getter material is deposited directly on the inner surface and/or the first surface.

Abstract: A flat-panel field emission display comprises a luminescent faceplate, a rigid backplate, and an interposed or sandwiched emitter or cathode plate. A dielectric connector ridge is screen-printed over the faceplate's rear surface. Upper and lower level conductors are then screen printed over the faceplate. The lower-level conductors are applied directly on the faceplate rear surface. The upper-level conductors are applied atop the connector ridge. A plurality of bond wire interconnections extend between individual screen-printed conductors of the upper and lower levels. The bond wire interconnections create inter-level electrical interconnections between said individual screen-printed conductors. The cathode plate is positioned over the connector ridge. The cathode plate has a plurality of die bond pads facing the faceplate rear surface and aligned with the upper-level conductors.

Abstract: An improved method of high density plasma etching for etching substrates such as semiconductor wafers is provided. The method includes controlling the ratio of ions to neutrals in a high density plasma using an ion filter located in the flow path of the plasma. The ion filter is adapted to interrupt and deflect ions in the plasma while allowing neutrals to pass through to the substrate unaffected. This helps to prevent notching because a more favorable ion/neutral ratio is present at the substrate. At the same time etch selectivity is high, particularly for etching polysilicon to oxide, because current density can remain high.

Abstract: A process for manufacturing a conductive and light-absorbing baseplate for use in a field emission display is disclosed. A surface of the baseplate is coated with a praseodymium oxide- and manganese oxide-containing layer having a resistivity that does not exceed 1.times.10.sup.5 .OMEGA.-cm. The coating may be placed on the baseplate by radiofrequency sputtering, laser ablation, plasma deposition or the like. Suitable praseodymium sources include praseodymium acetate, praseodymium oxalate and Pr(THd).sub.3, while suitable manganese sources include MnO.sub.2 and MnCO.sub.3.

Abstract: According to one aspect of the invention, a field emission display is provided comprising: an anode; a phosphor screen located on the anode; a cathode; an evacuated space between the anode and the cathode; an emitter located on the cathode opposite the phosphor; wherein the emitter comprises an electropositive element both in a body of the emitter and on a surface of the emitter. According to another aspect of the invention a process for manufacturing an FED is provided comprising the steps of: forming an emitter comprising an electropositive element in the body of the tip; positioning the emitter in opposing relation to a phosphor display screen; creating an evacuated space between the emitter tip and the phosphor display screen; and causing the electropositive element to migrate to the an emission surface of the emitter.

Abstract: A field emission display device includes a baseplate having a set of field-induced electron emitters for each pixel in a display. Each set includes a plurality of emitters each carried by a supporting substrate and disposed within a respective aperture in an insulating layer deposited on the surface of the substrate. A conductive layer is deposited on the insulating layer peripherally about the apertures. A plurality of emitter conductors are each operatively coupled to the emitters of one of the sets of emitters. A conductive voltage applied to the conductive layer and a source voltage applied to one of the emitter conductors causes the emitters coupled to the emitter conductor to each emit an electron emission. The display device also includes a faceplate having a transparent viewing layer positioned in a parallel spaced-apart relationship with the baseplate. An anode is deposited on a planar surface of the viewing layer opposite the sets of emitters.

Abstract: A process is provided for forming a conductive line between a conductor and a spacer formed on a substrate of a field emission display. In one embodiment, the process performs the steps of disposing a screen between the substrate and a distributing member, the screen having an opening which permits the extrusion a conductive material, and moving the distributing member relative to the screen to extrude the conductive material through the opening and form a conductive line connecting the conductor and the spacer, wherein the snap off distance is varied according as the distributing member moves along the substrate.

Abstract: High resolution color displays for field emission displays are formed by applying a grille to a screen layer, the grille having a set of holes formed therein exposing areas of the screen layer. A layer of photoresist is applied to the grille and the exposed areas of the screen layer, whereby a plurality of photoresist-covered screen layer areas are defined. One set of the plurality of photoresist-covered screen layer areas is fixed, whereby a fixed set and an unfixed set are defined. The photoresist is removed from the unfixed set and a light emitting substance is deposited on the exposed screen layer area. The fixed set of photoresist is plasma etched.