Patents Assigned to Nantero, Inc.
  • Publication number: 20170246561
    Abstract: The present disclosure provides methods for removing defects nanotube application solutions and providing low defect, highly uniform nanotube fabrics. In one aspect, a degassing process is performed on a suspension of nanotubes to remove air bubbles present in the solution. In another aspect, a continuous flow centrifugation (CFC) process is used to remove small scale defects from the solution. In another aspect, a depth filter is used to remove large scale defects from the solution. According to the present disclosure, these three methods can be used alone or combined to realize a low defect nanotube application solutions and fabrics.
    Type: Application
    Filed: May 15, 2017
    Publication date: August 31, 2017
    Applicant: Nantero, Inc.
    Inventors: J. THOMAS KOCAB, Thomas Bengtson, Sanjin Hosic, Rahul Sen, Billy Smith, David A. Roberts, Peter Sites
  • Patent number: 9715927
    Abstract: Methods for reading and programming one or more resistive change elements within a 1-R resistive change element array are disclosed. These methods include using measurement and storage elements to measure the electrical response of one or more selected cells within an array and then comparing that stored electrical response to the electrical response of a reference element within the array to determine the resistive state of the one or more selected cells. These methods also include programming methods wherein selectable current limiting elements are used to permit or inhibit programming currents from flowing through selected and unselected cells, respectively. These methods further include programming methods that use specific biasing of array lines to provide sufficient programming currents through only selected cells.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: July 25, 2017
    Assignee: Nantero, Inc.
    Inventors: Claude L. Bertin, Lee Cleveland
  • Patent number: 9666272
    Abstract: Methods for dynamically programming and dynamically reading one or more resistive change elements within a resistive change element array are disclosed. These methods include first pre-charging all of the array lines within a resistive change element array simultaneously and then grounding certain array lines while allowing other array lines to float in order to direct discharge currents through only selected cells. In this way, resistive change elements within resistive change element arrays made up of 1-R cells—that is, cells without in situ selection circuitry—can be reliably and rapidly accessed and programmed.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: May 30, 2017
    Assignee: Nantero Inc.
    Inventor: Darlene Viviani
  • Patent number: 9650732
    Abstract: The present disclosure provides methods for removing defects nanotube application solutions and providing low defect, highly uniform nanotube fabrics. In one aspect, a degassing process is performed on a suspension of nanotubes to remove air bubbles present in the solution. In another aspect, a continuous flow centrifugation (CFC) process is used to remove small scale defects from the solution. In another aspect, a depth filter is used to remove large scale defects from the solution. According to the present disclosure, these three methods can be used alone or combined to realize a low defect nanotube application solutions and fabrics.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: May 16, 2017
    Assignee: Nantero Inc.
    Inventors: J. Thomas Kocab, Thomas R. Bengtson, Sanjin Hosic, Rahul Sen, Billy Smith, David A. Roberts, Peter Sites
  • Patent number: 9634251
    Abstract: The present disclosure provides a nanotube solution being treated with a molecular additive, a nanotube film having enhanced adhesion property due to the treatment of the molecular additive, and methods for forming the nanotube solution and the nanotube film. The nanotube solution includes a liquid medium, nanotubes in the liquid medium, and a molecular additive in the liquid medium, wherein the molecular additive includes molecules that provide source elements for forming a group IV oxide within the nanotube solution. The molecular additive can introduce silicon (Si) and/or germanium (Ge) in the liquid medium, such that nominal silicon and/or germanium concentrations of the nanotube solution ranges from about 5 ppm to about 60 ppm.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: April 25, 2017
    Assignee: Nantero Inc.
    Inventors: David A. Roberts, Rahul Sen, Peter Sites, J. Thomas Kocab, Billy Smith, Feng Gu
  • Patent number: 9617151
    Abstract: A method for controlling density, porosity and/or gap size within a nanotube fabric layer is disclosed. In one aspect, this can be accomplished by controlling the degree of rafting in a nanotube fabric. In one aspect, the method includes adjusting the concentration of individual nanotube elements dispersed in a nanotube application solution. A high concentration of individual nanotube elements will tend to promote rafting in a nanotube fabric layer formed using such a nanotube application solution, whereas a lower concentration will tend to discourage rafting. In another aspect, the method includes adjusting the concentration of ionic particles dispersed in a nanotube application solution. A low concentration of ionic particles will tend to promote rafting in a nanotube fabric layer formed using such a nanotube application solution, whereas a higher concentration will tend to discourage rafting. In other aspects, both concentration parameters are adjusted.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: April 11, 2017
    Assignee: Nantero Inc.
    Inventors: Rahul Sen, J. Thomas Kocab, Feng Gu
  • Patent number: 9601498
    Abstract: A two terminal memory device includes first and second conductive terminals and a nanotube article. The article has at least one nanotube, and overlaps at least a portion of each of the first and second terminals. The device also includes stimulus circuitry in electrical communication with at least one of the first and second terminals. The circuit is capable of applying first and second electrical stimuli to at least one of the first and second terminal(s) to change the relative resistance of the device between the first and second terminals between a relatively high resistance and a relatively low resistance. The relatively high resistance between the first and second terminals corresponds to a first state of the device, and the relatively low resistance between the first and second terminals corresponds to a second state of the device.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: March 21, 2017
    Assignee: Nantero Inc.
    Inventors: Claude L. Bertin, Mitchell Meinhold, Steven L. Konsek, Thomas Rueckes, Max Strasburg, Frank Guo, X. M. Henry Huang, Ramesh Sivarajan
  • Patent number: 9574290
    Abstract: A method for arranging nanotube elements within nanotube fabric layers and films is disclosed. A directional force is applied over a nanotube fabric layer to render the fabric layer into an ordered network of nanotube elements. That is, a network of nanotube elements drawn together along their sidewalls and substantially oriented in a uniform direction. In some embodiments this directional force is applied by rolling a cylindrical element over the fabric layer. In other embodiments this directional force is applied by passing a rubbing material over the surface of a nanotube fabric layer. In other embodiments this directional force is applied by running a polishing material over the nanotube fabric layer for a predetermined time. Exemplary rolling, rubbing, and polishing apparatuses are also disclosed.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: February 21, 2017
    Assignee: Nantero Inc.
    Inventors: David A. Roberts, Hao-Yu Lin, Thomas R. Bengtson, Thomas Rueckes, Karl Robinson, H. Montgomery Manning, Rahul Sen, Michel Pires Monteiro
  • Patent number: 9502675
    Abstract: Methods for passivating a nanotube fabric layer within a nanotube switching device to prevent or otherwise limit the encroachment of an adjacent material layer are disclosed. In some embodiments, a sacrificial material is implanted within a porous nanotube fabric layer to fill in the voids within the porous nanotube fabric layer while one or more other material layers are applied adjacent to the nanotube fabric layer. Once the other material layers are in place, the sacrificial material is removed. In other embodiments, a non-sacrificial filler material (selected and deposited in such a way as to not impair the switching function of the nanotube fabric layer) is used to form a barrier layer within a nanotube fabric layer. In other embodiments, individual nanotube elements are combined with and nanoscopic particles to limit the porosity of a nanotube fabric layer.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: November 22, 2016
    Assignee: Nantero Inc.
    Inventors: Thomas Rueckes, H. Montgomery Manning, Rahul Sen, Jr.
  • Patent number: 9422651
    Abstract: A method for arranging nanotube elements within nanotube fabric layers and films is disclosed. A directional force is applied over a nanotube fabric layer to render the fabric layer into an ordered network of nanotube elements. That is, a network of nanotube elements drawn together along their sidewalls and substantially oriented in a uniform direction. In some embodiments this directional force is applied by rolling a cylindrical element over the fabric layer. In other embodiments this directional force is applied by passing a rubbing material over the surface of a nanotube fabric layer. In other embodiments this directional force is applied by running a polishing material over the nanotube fabric layer for a predetermined time. Exemplary rolling, rubbing, and polishing apparatuses are also disclosed.
    Type: Grant
    Filed: March 30, 2011
    Date of Patent: August 23, 2016
    Assignee: Nantero Inc.
    Inventors: David A. Roberts, Hao-Yu Lin, Thomas R. Bengtson, Thomas Rueckes, Karl Robinson, H. Montgomery Manning, Rahul Sen, Michel Monteiro
  • Patent number: 9412447
    Abstract: A high-speed memory circuit architecture for arrays of resistive change elements is disclosed. An array of resistive change elements is organized into rows and columns, with each column serviced by a word line and each row serviced by two bit lines. Each row of resistive change elements includes a pair of reference elements and a sense amplifier. The reference elements are resistive components with electrical resistance values between the resistance corresponding to a SET condition and the resistance corresponding to a RESET condition within the resistive change elements being used in the array. A high speed READ operation is performed by discharging one of a row's bit lines through a resistive change element selected by a word line and simultaneously discharging the other of the row's bit lines through of the reference elements and comparing the rate of discharge on the two lines using the row's sense amplifier. Storage state data are transmitted to an output data bus as high speed synchronized data pulses.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: August 9, 2016
    Assignee: Nantero Inc.
    Inventors: Claude L. Bertin, Glen Rosendale
  • Patent number: 9406349
    Abstract: Under one aspect, a covered nanotube switch includes: (a) a nanotube element including an unaligned plurality of nanotubes, the nanotube element having a top surface, a bottom surface, and side surfaces; (b) first and second terminals in contact with the nanotube element, wherein the first terminal is disposed on and substantially covers the entire top surface of the nanotube element, and wherein the second terminal contacts at least a portion of the bottom surface of the nanotube element; and (c) control circuitry capable of applying electrical stimulus to the first and second terminals. The nanotube element can switch between a plurality of electronic states in response to a corresponding plurality of electrical stimuli applied by the control circuitry to the first and second terminals. For each different electronic state, the nanotube element provides an electrical pathway of different resistance between the first and second terminals.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: August 2, 2016
    Assignee: Nantero Inc.
    Inventors: Claude L. Bertin, X. M. Henry Huang, Thomas Rueckes, Ramesh Sivarajan
  • Patent number: 9390790
    Abstract: The present disclosure is directed toward carbon based diodes, carbon based resistive change memory elements, resistive change memory having resistive change memory elements and carbon based diodes, methods of making carbon based diodes, methods of making resistive change memory elements having carbon based diodes, and methods of making resistive change memory having resistive change memory elements having carbons based diodes. The carbon based diodes can be any suitable type of diode that can be formed using carbon allotropes, such as semiconducting single wall carbon nanotubes (s-SWCNT), semiconducting Buckminsterfullerenes (such as C60 Buckyballs), or semiconducting graphitic layers (layered graphene). The carbon based diodes can be pn junction diodes, Schottky diodes, other any other type of diode formed using a carbon allotrope. The carbon based diodes can be placed at any level of integration in a three dimensional (3D) electronic device such as integrated with components or wiring layers.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: July 12, 2016
    Assignee: Nantero Inc.
    Inventors: Claude L. Bertin, C. Rinn Cleavelin, Thomas Rueckes, X. M. Henry Huang, H. Montgomery Manning
  • Patent number: 9362390
    Abstract: Inverter circuits and NAND circuits comprising nanotube based FETs and methods of making the same are described. Such circuits can be fabricating using field effect transistors comprising a source, a drain, a channel region, and a gate, wherein the first channel region includes a fabric of semiconducting nanotubes of a given conductivity type. Such FETs can be arranged to provide inverter circuits in either two-dimension or three-dimensional (stacked) layouts. Design equations based upon consideration of the electrical characteristics of the nanotubes are described which permit optimization of circuit design layout based upon constants that are indicative of the current carrying capacity of the nanotube fabrics of different FETs.
    Type: Grant
    Filed: February 22, 2011
    Date of Patent: June 7, 2016
    Assignee: Nantero, Inc.
    Inventor: Claude L. Bertin
  • Patent number: 9337423
    Abstract: An improved switching material for forming a composite article over a substrate is disclosed. A first volume of nanotubes is combined with a second volume of nanoscopic particles in a predefined ration relative to the first volume of nanotubes to form a mixture. This mixture can then be deposited over a substrate as a relatively thick composite article via a spin coating process. The composite article may possess improved switching properties over that of a nanotube-only switching article. A method for forming substantially uniform nanoscopic particles of carbon, which contains one or more allotropes of carbon, is also disclosed.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: May 10, 2016
    Assignee: Nantero Inc.
    Inventors: Eliodor G. Ghenciu, Thomas Rueckes, Thierry Yao, J. Thomas Kocab
  • Patent number: 9299430
    Abstract: Methods for reading and programming one or more resistive change elements within a 1-R resistive change element array are disclosed. These methods include using measurement and storage elements to measure the electrical response of one or more selected cells within an array and then comparing that stored electrical response to the electrical response of a reference element within the array to determine the resistive state of the one or more selected cells. These methods also include programming methods wherein selectable current limiting elements are used to permit or inhibit programming currents from flowing through selected and unselected cells, respectively. These methods further include programming methods that use specific biasing of array lines to provide sufficient programming currents through only selected cells.
    Type: Grant
    Filed: January 22, 2015
    Date of Patent: March 29, 2016
    Assignee: Nantero Inc.
    Inventors: Claude L. Bertin, Lee Cleveland
  • Patent number: 9287356
    Abstract: A non-volatile nanotube switch and memory arrays constructed from these switches are disclosed. A non-volatile nanotube switch includes a conductive terminal and a nanoscopic element stack having a plurality of nanoscopic elements arranged in direct electrical contact, a first comprising a nanotube fabric and a second comprising a carbon material, a portion of the nanoscopic element stack in electrical contact with the conductive terminal. Control circuitry is provided in electrical communication with and for applying electrical stimulus to the conductive terminal and to at least a portion of the nanoscopic element stack. At least one of the nanoscopic elements is capable of switching among a plurality of electronic states in response to a corresponding electrical stimuli applied by the control circuitry to the conductive terminal and the portion of the nanoscopic element stack. For each electronic state, the nanoscopic element stack provides an electrical pathway of corresponding resistance.
    Type: Grant
    Filed: January 20, 2009
    Date of Patent: March 15, 2016
    Assignee: Nantero Inc.
    Inventors: Claude L. Bertin, Eliodor G. Ghenciu, Thomas Rueckes, H. Montgomery Manning
  • Patent number: 9281185
    Abstract: Methods for passivating a nanotube fabric layer within a nanotube switching device to prevent or otherwise limit the encroachment of an adjacent material layer are disclosed. In some embodiments, a sacrificial material is implanted within a porous nanotube fabric layer to fill in the voids within the porous nanotube fabric layer while one or more other material layers are applied adjacent to the nanotube fabric layer. Once the other material layers are in place, the sacrificial material is removed. In other embodiments, a non-sacrificial filler material (selected and deposited in such a way as to not impair the switching function of the nanotube fabric layer) is used to form a barrier layer within a nanotube fabric layer. In other embodiments, individual nanotube elements are combined with and nanoscopic particles to limit the porosity of a nanotube fabric layer.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: March 8, 2016
    Assignee: Nantero Inc.
    Inventors: Thomas Rueckes, H. Montgomery Manning, Rahul Sen
  • Patent number: 9263126
    Abstract: Methods for dynamically programming and dynamically reading one or more resistive change elements within a resistive change element array are disclosed. These methods include first pre-charging all of the array lines within a resistive change element array simultaneously and then grounding certain array lines while allowing other array lines to float in order to direct discharge currents through only selected cells. In this way, resistive change elements within resistive change element arrays made up of 1-R cells—that is, cells without in situ selection circuitry—can be reliably and rapidly accessed and programed.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: February 16, 2016
    Assignee: Nantero Inc.
    Inventor: Darlene Viviani
  • Patent number: 9196615
    Abstract: Under one aspect, a nanotube diode includes: a cathode formed of a semiconductor material; and an anode formed of nanotubes. The cathode and anode are in fixed and direct physical contact, and are constructed and arranged such that sufficient electrical stimulus applied to the cathode and the anode creates a conductive pathway between the cathode and the anode. In some embodiments, the anode includes a non-woven nanotube fabric having a plurality of unaligned nanotubes. The non-woven nanotube fabric may have a thickness, e.g., of 0.5 to 20 nm. Or, the non-woven nanotube fabric may include a block of nanotubes. The nanotubes may include metallic nanotubes and semiconducting nanotubes, and the cathode may include an n-type semiconductor material. A Schottky barrier can form between the n-type semiconductor material and the metallic nanotubes and/or a PN junction can form between the n-type semiconductor material and the semiconducting nanotubes.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: November 24, 2015
    Assignee: Nantero Inc.
    Inventors: Claude L. Bertin, Thomas Rueckes, X. M. Henry Huang, Ramesh Sivarajan, Eliodor G. Ghenciu, Steven L. Konsek, Mitchell Meinhold