Abstract: A semiconductor device that includes an array of imaging cells is provided. Each imaging cell of the array of imaging cells includes an imaging region and first and second charge storage regions. Further, each imaging cell includes first and second quantum dot-in-quantum well (QD-in-QW) structures. The first QD-in-QW structure absorbs an incident electromagnetic radiation having a wavelength within a predetermined first wavelength band and generates a hole photocurrent. The second QD-in-QW structure absorbs an incident electromagnetic radiation having a wavelength within a predetermined second wavelength band and generates an electron photocurrent. Each imaging cell further includes p-type and n-type modulation doped QW structures that defines first and second buried QW channels. The first and second buried QW channels provide for lateral transfer of the hole and electron photocurrents for charge accumulation in the first and second charge storage regions, respectively.

Abstract: A semiconductor device includes an n-type ohmic contact layer, cathode and anode electrodes, p-type and n-type modulation doped quantum well (QW) structures, and first and second ion implant regions. The anode electrode is formed on the first ion implant region that contacts the p-type modulation doped QW structure and the cathode electrode is formed by patterning the first and second ion implant regions and the n-type ohmic contact layer. The semiconductor device is configured to operate as at least one of a diode laser and a diode detector. As the diode laser, the semiconductor device emits photons. As the diode detector, the semiconductor device receives an input optical light and generates a photocurrent.

Abstract: A WDM transmitter and/or receiver optoelectronic integrated circuit includes a plurality of microresonators and corresponding waveguides and couplers that are integrally formed on a substrate. For the WDM transmitter, the microresonators and waveguides are configured to generate a plurality of optical signals at different wavelengths. Each coupler includes a resonant cavity waveguide that is configured to transmit one optical signal from one waveguide to the output waveguide such that the plurality of optical signals are multiplexed on the output waveguide. For the WDM receiver, an input waveguide is configured to provide for propagation of a plurality of optical signals at different wavelengths. Each coupler includes a resonant cavity waveguide that is configured to transmit at least one optical signal from the input waveguide to one waveguide.

Abstract: A semiconductor device is provided that includes an array of imaging cells realized from a plurality of layers formed on a substrate, wherein the plurality of layers includes at least one modulation doped quantum well structure spaced from at least one quantum dot structure. Each respective imaging cell includes an imaging region spaced from a corresponding charge storage region. The at least one quantum dot structure of the imaging region generates photocurrent arising from absorption of incident electromagnetic radiation. The at least one modulation doped quantum well structure defines a buried channel for lateral transfer of the photocurrent for charge accumulation in the charge storage region and output therefrom. The at least one modulation doped quantum well structure and the at least one quantum dot structure of each imaging cell can be disposed within a resonant cavity that receives the incident electromagnetic radiation or below a structured metal film having a periodic array of holes.

Abstract: A method of forming an integrated circuit employs a plurality of layers formed on a substrate including i) bottom n-type ohmic contact layer, ii) p-type modulation doped quantum well structure (MDQWS) with a p-type charge sheet formed above the bottom n-type ohmic contact layer, iii) n-type MDQWS offset vertically above the p-type MDQWS, and iv) etch stop layer formed above the p-type MDQWS. P-type ions are implanted to define source/drain ion-implanted contact regions of a p-channel HFET which encompass the p-type MDQWS. An etch operation removes layers above the etch stop layer of iv) for the source/drain ion-implanted contact regions using an etchant that automatically stops at the etch stop layer of iv). Another etch operation removes remaining portions of the etch stop layer of iv) to form mesas that define an interface to the source/drain ion-implanted contact regions of the p-channel HFET. Source/Drain electrodes are on such mesas.

Abstract: A split electrode vertical cavity optical device includes an n-type ohmic contact layer, first through fifth ion implant regions, cathode and anode electrodes, first and second injector terminals, and p and n type modulation doped quantum well structures. The cathode electrode and the first and second ion implant regions are formed on the n-type ohmic contact layer. The third ion implant region is formed on the first ion implant region and contacts the p-type modulation doped QW structure. The fourth ion implant region encompasses the n-type modulation doped QW structure. The first and second injector terminals are formed on the third and fourth ion implant regions, respectively. The fifth ion implant region is formed above the n-type modulation doped QW structure and the anode electrode is formed above the fifth ion implant region.

Abstract: A semiconductor device includes an n-type ohmic contact layer, cathode and anode electrodes, p-type and n-type modulation doped quantum well (QW) structures, and first and second ion implant regions. The anode electrode is formed on the first ion implant region that contacts the p-type modulation doped QW structure and the cathode electrode is formed by patterning the first and second ion implant regions and the n-type ohmic contact layer. The semiconductor device is configured to operate as at least one of a diode laser and a diode detector. As the diode laser, the semiconductor device emits photons. As the diode detector, the semiconductor device receives an input optical light and generates a photocurrent.

Abstract: A WDM transmitter and/or receiver optoelectronic integrated circuit includes a plurality of microresonators and corresponding waveguides and couplers that are integrally formed on a substrate. For the WDM transmitter, the microresonators and waveguides are configured to generate a plurality of optical signals at different wavelengths. Each coupler includes a resonant cavity waveguide that is configured to transmit one optical signal from one waveguide to the output waveguide such that the plurality of optical signals are multiplexed on the output waveguide. For the WDM receiver, an input waveguide is configured to provide for propagation of a plurality of optical signals at different wavelengths. Each coupler includes a resonant cavity waveguide that is configured to transmit at least one optical signal from the input waveguide to one waveguide.

Abstract: A WDM transmitter and/or receiver optoelectronic integrated circuit includes a plurality of microresonators and corresponding waveguides and couplers that are integrally formed on a substrate. For the WDM transmitter, the microresonators and waveguides are configured to generate a plurality of optical signals at different wavelengths. Each coupler includes a resonant cavity waveguide that is configured to transmit one optical signal from one waveguide to the output waveguide such that the plurality of optical signals are multiplexed on the output waveguide. For the WDM receiver, an input waveguide is configured to provide for propagation of a plurality of optical signals at different wavelengths. Each coupler includes a resonant cavity waveguide that is configured to transmit at least one optical signal from the input waveguide to one waveguide.

Abstract: A Dual-wavelength hybrid (DWH) device includes an n-type ohmic contact layer, cathode and anode terminal electrodes, first and second injector terminal electrodes, p-type and n-type modulation doped QW structures, and first through sixth ion implant regions. The first injector terminal electrode is formed on the third ion implant region that contacts the p-type modulation doped QW structure and the second injector terminal electrode is formed on the fourth ion implant region that contacts the n-type modulation doped QW structure. The DWH device operates in at least one of a vertical cavity mode and a whispering gallery mode. In the vertical cavity mode, the DWH device converts an in-plane optical mode signal to a vertical optical mode signal, whereas in the whispering gallery mode the DWH device converts a vertical optical mode signal to an in-plane optical mode signal.

Abstract: A semiconductor device that includes an optical resonator spaced from a waveguide structure to provide for evanescent-wave optical coupling therebetween. The optical resonator includes a closed loop waveguide defined by an epitaxial layer structure that includes at least one quantum well. The semiconductor device also includes circuitry configured to supply an electrical signal that flows within the epitaxial layer structure of the closed loop waveguide. The electrical signal affects charge density in at least quantum well of the closed loop waveguide and controls refractive index of the closed loop waveguide. In one embodiment, the electrical signal is a DC current signal that flows within a vertical thyristor structure of the closed loop waveguide to control refractive index of the closed loop waveguide such that resonance frequency of the closed loop waveguide corresponds to a characteristic wavelength of light.

Abstract: A semiconductor device that includes an optical resonator spaced from a waveguide structure to provide for evanescent-wave optical coupling therebetween. The optical resonator includes a closed loop waveguide defined by a vertical thyristor structure. In one embodiment, the vertical thyristor structure is formed by an epitaxial layer structure including complementary (both an n-type and a p-type) modulation doped quantum well interfaces formed between an N+ region and a P+ region.

Abstract: A semiconductor device employs an epitaxial layer arrangement including a first ohmic contact layer and first modulation doped quantum well structure disposed above the first ohmic contact layer. The first ohmic contact layer has a first doping type, and the first modulation doped quantum well structure has a modulation doped layer of a second doping type. At least one isolation ion implant region is provided that extends through the first ohmic contact layer. The at least one isolation ion implant region can include oxygen ions. The at least one isolation ion implant region can define a region that is substantially free of charge carriers in order to reduce a characteristic capacitance of the device. A variety of high performance transistor devices (e.g., HFET and BICFETs) and optoelectronic devices can employ this device structure. Other aspects of wavelength-tunable microresonantors and related semiconductor fabrication methodologies are also described and claimed.

Abstract: A semiconductor device is provided that includes an array of imaging cells realized from a plurality of layers formed on a substrate, wherein the plurality of layers includes at least one modulation doped quantum well structure spaced from at least one quantum dot structure. Each respective imaging cell includes an imaging region spaced from a corresponding charge storage region. The at least one quantum dot structure of the imaging region generates photocurrent arising from absorption of incident electromagnetic radiation. The at least one modulation doped quantum well structure defines a buried channel for lateral transfer of the photocurrent for charge accumulation in the charge storage region and output therefrom. The at least one modulation doped quantum well structure and the at least one quantum dot structure of each imaging cell can be disposed within a resonant cavity that receives the incident electromagnetic radiation or below a structured metal film having a periodic array of holes.

Abstract: An optical flip-flop circuit that includes an optical thyristor configured to receive a digital optical signal input and produce a digital signal output based on the ON/OFF state of the digital optical signal input. The optical flip-flop circuit further includes control circuitry operably coupled to the terminals of the optical thyristor. The control circuitry is configured to control switching operation of the optical thyristor in response to the level of a digital electrical signal input.

Abstract: An optical XOR circuit that includes a thyristor and control circuitry operably coupled to terminals of the thyristor. The control circuitry is configured to control switching operation of the thyristor in response to the ON/OFF states of two digital optical signal inputs such that the thyristor produces a digital signal output that is the XOR function of the two digital optical signal inputs.

Abstract: A semiconductor device includes a series of layers formed on a substrate, including a first plurality of n-type layers, a second plurality of layers that form a p-type modulation doped quantum well structure (MDQWS), a third plurality of layers disposed between the p-type MDQWS and a fourth plurality of layers that form an n-type MDQWS, and a fifth plurality of p-type layers. The first plurality of layers includes a first etch stop layer of n-type formed on an n-type contact layer. The third plurality of layers includes a second etch stop layer formed above the p-type MDQWS and a third etch stop layer formed above and offset from the second etch stop layer. The fifth plurality of layers includes a fourth etch stop layer of p-type formed above the n-type MDQWS and a fifth etch stop layer of p-type doping formed above and offset from the fourth etch stop layer.

Abstract: An optoelectronic circuit for producing an optical clock signal that includes an optical thyristor, a waveguide structure and control circuitry. The waveguide structure is configured to split an optical pulse produced by the optical thyristor such that a first portion of such optical pulse is output as part of the optical clock signal and a second portion of such optical pulse is guided back to the optical thyristor to produce another optical pulse that is output as part of the optical clock signal. The control circuitry is operably coupled to terminals of the optical thyristor and receives first and second control signal inputs. The control circuitry is configured to selectively decrease frequency of the optical clock signal based on the first control signal input and to selectively increase frequency of the optical clock signal based on the second control signal input.

Abstract: An optical phase detector circuit is provided that is suitable for use in an optical phase lock loop. The optical phase detector includes a first optical flip-flop circuit configured to produce a first digital output based on ON/OFF state of a first digital optical input and a digital electrical control signal. A second optical flip-flop circuit is configured to produce a second digital output based on ON/OFF state of a second digital optical input and the digital electrical control signal. An AND gate is operably coupled to both the first and second optical flip-flops. The AND gate produces the digital electrical control signal for supply to the first and second optical flip-flop circuits according to an AND function of the first and second digital outputs produced by the first and second optical flip-flop circuits.

Abstract: An optical AND gate is provided that includes an optical thyristor configured to receive first and second digital optical signal inputs. The optical AND gate further includes control circuitry operably coupled to terminals of said optical thyristor. The control circuitry is configured to control switching operation of said optical thyristor in response to the ON/OFF states of the first and second digital optical signal inputs such that the optical thyristor produces a digital output signal that represents the AND function of the first and second digital optical signal inputs. In another aspect, an AND gate is provided that includes a thyristor and control circuitry operably coupled to terminals of the thyristor.