Abstract: The present invention provides a monolithic LED array precursor comprising a plurality of LED structures, an LED device comprising the monolithic LED array, and a method of manufacture thereof. In particular, the present disclosure provides a monolithic LED array having improved light emission.

Abstract: An LED backlight for use with a display panel, the backlight comprising a monolithic LED array having a surface and comprising a plurality of LEDs for emitting light from the surface of the array; a monolithic collimator array comprising a plurality of collimating channels, and being aligned so that each of the collimating channels is aligned with one or more of the plurality of LEDs, wherein the collimating channels are configured to collimate emitted light emitted from the LEDs to angles in the range of about +/?50° from a line substantially normal to the surface of the LED array; a microlens array for focusing the collimated light to infinity, the microlens array comprising a plurality of lenslets, each lenslet aligned with a collimating channel of the monolithic collimator array; and a relay lens for focusing the light from the microlens array on a display panel.

Abstract: An LED package for connection to a heat sink, the LED package comprising an LED structure having a first surface for emitting light and an opposite second surface, the LED structure comprising a light producing layer and a reflective layer, wherein the reflective layer is provided between the light producing layer and the second surface, whereby light is reflected by the reflective layer to the first surface, the first surface further comprising first and second electrical contacts. A frame overlaps the periphery of the first surface of the LED structure and has an aperture for emitting light from the first surface, the frame comprising first and second vias for connection to an external electrical circuit, the first and second vias are soldered to the first and second electrical contacts of the LED structure respectively.

Abstract: A method for the manufacture of a light-emitting diode (LED) chip, the method comprising providing a first substrate; forming an LED structure on the first substrate, wherein the LED structure has a first surface adjacent the first substrate and a second surface opposite the first substrate; applying a second substrate on the second surface of the LED structure; and selectively etching the first substrate from the LED structure to form one or more walls extending from the first surface of the LED structure.

Abstract: An LED package for connection to a heat sink, the LED package comprising an LED structure having a first surface for emitting light and an opposite second surface, the LED structure comprising a light producing layer and a reflective layer, wherein the reflective layer is provided between the light producing layer and the second surface, whereby light is reflected by the reflective layer to the first surface, the first surface further comprising first and second electrical contacts. A frame overlaps the periphery of the first surface of the LED structure and has an aperture for emitting light from the first surface, the frame comprising first and second vias for connection to an external electrical circuit, the first and second vias are soldered to the first and second electrical contacts of the LED structure respectively.

Abstract: A method for the manufacture of a light-emitting diode (LED) chip, the method comprising providing a first substrate; forming an LED structure on the first substrate, wherein the LED structure has a first surface adjacent the first substrate and a second surface opposite the first substrate; applying a second substrate on the second surface of the LED structure; and selectively etching the first substrate from the LED structure to form one or more walls extending from the first surface of the LED structure.

Abstract: In a data transmission system in which a cyclic redundancy checksum value is derived in respect of each block of data bit values to be transmitted over the system, the checksum value in respect of blocks of data bit values intended for preselected ones only of the stations of the system is preloaded with a predetermined or netkey value to be used by the preselected stations such that only those stations can correctly decode the signals intended for them.

Abstract: A phase-locked loop employing a charge pump 7 for synthesizing RF channels permits a low supply voltage to be used by using two amplifier stages 5a, 5b, between the charge pump and a VCO4. Stage 5a may be a high impedance common emitter pair of complementary transistors allowing a wide voltage swing. Stage 5b may be an operational amplifier with resistive feedback to provide gain less than unity and a low impedance output to provide feedback around a loop filter 6 to source the current from charge pump 7 entering an inverting input of stage 5a. Alternatively, stages 5a, 5b may be reversed.

Abstract: A filter circuit comprises three stages 260, 270, 280, each having a differential input and a differential output. The output of stage 260 serves as the input of stage 270 and the output of stage 270 serves as the input of stage 280 respectively. Stage 260 comprises two transistor pairs 201, 202 and 203, 204. An input signal is applied to the base electrodes of transistors 201, 204 which causes a current change in their opposite transistor 202, 203. Transistors 202, 203 have their respective base and collector electrodes connected together. The collector electrodes of transistors 202, 203 constitute the output of stage 260. Stages 270 and 280 have essentially the same structure as stage 260. The arrangement offers high frequency capabilities from a low supply voltage. In another embodiment, a cut-off frequency is varied under control of controllable current sources.

Abstract: In a transceiver for a WLAN having a two-part folding housing of electrically insulating material, one part having a shielded compartment for the radio circuitry, there is provided a two-part strip-conductor antenna conforming with the outer surface of the one part of the housing, the radio compartment shielding forming a ground plane for this antenna.

Abstract: An arrangement for synchronizing a digitally generated color subcarrier signal to the color burst signal from another video signal, such as that from a video casette recorder or from a cable television signal, in a manner that allows a line locked clock to be used without causing unacceptable disturbance to the generated subcarrier signal.

Abstract: A voltage offset compensation circuit for a high gain amplifier having a fixed input voltage offset, includes sample and hold circuitry for periodically sampling the offset voltage and gain error voltage of the amplifier, and holding the sampled voltage; storage circuitry, operable between sampling periods, to store the sampled and held voltage; and further circuitry, operable during the sampling periods, to continuously maintain the output of the high gain amplifier at a value that is gain error and voltage offset compensated. The voltage offset compensation circuit may be used in sampled-data circuits, or continuous-time amplifier circuits utilizing either single-ended, or differential, inputs and either single-ended, or differential, outputs.

Abstract: A current reference cell is used to generate stable currents using a voltage reference source such as a band gap reference voltage in order that the output current I.sub.out can be proportional to absolute temperature, making the reference cell suitable for providing the bias current of a bipolar transistor in order that dynamic changes of collector current will be proportional to corresponding changes of base emitter voltage irrespective of temperature. The invention is concerned with rapidly turning off such a current I.sub.out, and a switch such as transistor Q7 is provided which is put into saturation when the reference voltage and hence reference cell are turned off, in order that current decaying via any large capacitor such as C1 connected to the output of the reference cell is diverted through such a switch rather than through the reference cell.

Abstract: An equaliser circuit arrangement for compensating for the frequency-dependent characteristics of a transmission line such as an untwisted pair, for lines of lengths up to, say, 125 meters and at data rates up to, say, 155MBits/sec., in which signals from the transmission line are applied by way of a unity gain path and a frequency-selective path including a first wide-band amplifier of variable gain to a summing node. The signals at the summing node may be further amplified by a second wide-band variable gain amplifier using gain control signals derived for the first amplifier.

Abstract: Low profile microchip module assemblies are formed by first mounting one or more active semiconductor integrated circuit chips on a multilayer metallization and dielectric structure on a substrate of, say, silicon or alumina, by wire bonding or flip-chip solder bonding, and then inverting the substrate and mounting it on a printed circuit board by means of solder bump connections. The solder bump connections are sufficiently high for the chips to be held clear of the printed circuit board.

Abstract: A test probe structure for making connections to a bare integrated circuit device or a wafer to be tested comprises a multilayer printed circuit probe arm which carries at its tip an MCM-D type substrate having a row of microbumps on its underside to make the required connections. The probe arm is supported at a shallow angle to the surface of the device or wafer, and the MCM-D type substrate is formed with the necessary passive components to interface with the device under test. Four such probe arms may be provided, one on each side of the device under test.

Abstract: A controllable filter arrangement comprises a filter network for filtering an input signal of the filter arrangement, and a transistor, the transistor being configured as a voltage-follower having a controllable current source in its output circuit for providing a controllable DC transistor output current, an output terminal of the voltage-follower being connected to the filter network such that a cut-off frequency of the filter can be controlled by variation of the DC current supplied by the current source. The filter network may be a single-pole RC network and the output of the follower may be connected to an additional capacitor (or resistor) of the network which is coupled to the junction of the existing capacitor and resistor.

Abstract: A microstrip patch or slot radiating element is coupled to a dielectric rod antenna by way of a tapered tubular dielectric guide formed integrally with the rod. An array of radiating elements may be formed on a common substrate, and the dielectric guide/rod antennae may be arranged to direct the energy radiated from these elements to a secondary antenna element such as a lens or a dish.

Abstract: In a multichip module structure comprising a silicon, alumina or sapphire substrate carrying a plurality of layers of metallisation separated by polymer dielectric layers, with one or more inductors formed in the uppermost metallisation layer, a ferrite core for one of those inductors is located over the inductor and secured in position by flip chip solder bonding.

Abstract: A phase lock detector for a digital phase locked loop frequency synthesiser in which phase errors, represented by phase error pulses of a duration equal to the relative time displacement of synthesised and reference waveforms in the phase locked loop, are compared with a predetermined time interval representing the maximum phase error acceptable in a phase-lock condition. A favourable result of the comparison may be required to persist for a predetermined time before a phase-lock indication is given, to avoid jitter or flicker of that indication in a near-lock situation.