Abstract: A modulator for digital modulation is described to produce a modulated output from a voltage controlled oscillator in a phase locked loop during transmission of a random modulating input. The input voltage is applied to a coupling capacitor and when transmission ceases, the state of charge on the capacitor will not change because of a biasing circuit which comprises two resistors fed by a tri-state buffer which holds the input terminal of the capacitor at the average level between logic zero and logic one when no modulation is applied.

Abstract: A stable sine wave oscillator circuit comprising two pairs of cross-coupled bipolar transistors in cascode, the collector electrodes of the transistors of each pair being interconnected by way of respective capacitors. Output signals in phase quadrature may be obtained from across these two capacitors.

Abstract: A drive circuit comprises a plurality of current mirrors connected in series at their output-current end with a load resistor between two power rails. The input halves of the mirrors are driven by respective groups of series-connected input transistors, the lowest transistor in each group serving to set up the required currents in the mirrors in response to an input voltage on its base. Two potential dividers set up potentials on the control terminals of the groups of input transistors, on the one hand, and potentials on the main-terminal junctions of the mirror output transistors, on the other, such that at no time does any transistor in the circuit experience a voltage greater than its rated voltage.

Abstract: In a contents addressable memory for a fully associative cache memory in which address bit values in respect of data to be retrieved from cache are applied to the bit lines of respective columns of cells for comparison with the bit values held by the cells, a match in any one cell is arranged to forward bias a match line device in that cell, the match line devices of a row being connected in cascade, so that if a match is obtained along a row a current path is provided along the row to a respective current sensing circuit to indicate the match.

Abstract: A current sensing read arrangement for a static random access memory in which critical nodes in the sensing arrangement are equalised before read-out commences, and in which differential outputs are applied to a gating arrangement which terminates the read-out as soon as a recognisable output signal is obtained, so as to minimise power consumption.

Abstract: A logarithmic detector having a first input line linked to the base of the first transistor, a second line linked to the base of the second transistor, a third input line linked to the bases of third and fourth transistors, a fourth input line linked to the bases of fifth and sixth transistors, a first output line linked to the collectors of the third and sixth transistors a second output line linked to the collectors of the fourth and fifth transistors and emitters of the third and fifth transistors being linked through the first and second impedances respectively to connect to the first transistor, the emitters of the fourth and sixth transistors being linked through third and fourth impedances to the collector of the second transistor and the emitters of the first and second transistors being linked through 5th and 6th impedances respectively to a current source connected to earth.

Abstract: A trackerball arrangement includes a ball rotatably mounted with respect to a housing; a plurality of supports arranged to locate the ball in a predetermined operable position relative to the housing, at least one of the supports being mounted for movement away from the other supports; and being urged towards said other supports against a stop by the action of a resilient member acting upon it; whereby pressure which is applied via the ball to the supports causes movement of the supports when the applied pressure exceeds a threshold value which overcomes the force exerted by the resilient member. The movement allows lateral movement of the ball away from the other supports. The support is mounted on a spring loaded pivotable arm with an engagement part biased into contact with the surface of the ball and part of the pivotable arm is arranged to actuate an electrical switch mechanism.

Abstract: A programmable logic cell suitable for use in a programmable gate array and able to produce any logical function of two inputs, operate as a 2 to 1 multiplexor or a data latch is formed by four multiplexors, five inverters and an OR gate to provide a very fast programmable logic cell.

Abstract: A wide-band microwave modulator arrangement for an information transmission system, such as a video signal distribution system, in which signals from a microwave carrier signal source are split and directed over a first path comprising an attenuator and a second path comprising phase shift means and a balanced modulator, the output signals from the two paths being combined for transmission. Signals from the carrier signal source may also be directed over a third path including phase shift means and a second balanced modulator, amplified output signals from the first two paths being combined with output signals from this third path before transmission.

Abstract: An audio processor circuit for treating a digitally encoded incoming signal, the circuit comprising circuitry (3, 12) for sampling the encoded signal at two or more sample frequencies, circuitry (8, 13, 38, 40, 46) for calculating from the sampled values a cross-correlation function relevant to a particular time frame, the value of said function serving to control operation of an adaptive algorithm, in which the sampled signal portions are truncated (2, 5) such that only the arithmetic sign bit of each signal portion contributes to the function calculation.

Abstract: In a direct conversion receiver in which received radio frequency signals are mixed with quadrature local oscillator signals in I and Q channels, the output signals from the mixers are applied to a phase detector by way of respective frequency tracking filters to reduce the noise bandwidth and improve the sensitivity.

Abstract: In a differential amplifier having a pair of emitter follower outputs, power saving is obtained by switching the pull-down currents so that the emitter followers have to provide current to drive the load only in the on direction. The preceding stage is a cascode stage, so that the switching signals for switching the pull-down currents may be derived from the emitter circuits of the cascode stage output transistors.

Abstract: A programmable logic cell has two inputs and six outputs, each output being a different logical function of the inputs. Each output is generated by a pair of NMOS transistors, one transistor of each pair having its gate connected to one of the inputs and the other transistor of each pair having its gate connected to the inverse of the same input.

Abstract: In a speed control arrangement for an induction motor or an a.c. permanent magnet motor in which any one of a number of power frequencies may be selected for application to the motor, there is provided circuitry to control the rate of change of frequency from one selected power frequency to another to control the acceleration or deceleration of the motor.

Abstract: A family of wideband amplifier circuits using series and shunt feedback over two stages to achieve constant impedance, including single-ended, single-ended input/differential output and differential input/differential output forms.

Abstract: An amplifier comprising an emitter-coupled pair of transistors having inductive load impedances, with capacitive feedback elements tuned with the inductive loads and the capacitive input of the following stage to be resonant at the range of frequencies to be amplified. The reactive loads and feedback elements introduce less noise than with resistive components.

Abstract: A transponder tag operative in the UHF range and including a substrate of dielectric material having formed on one side a conductive surface providing a ground plane and a dipole antenna, a slot line within the ground plane forming a balanced antenna feeder and leading to the center of the dipole antenna, and the substrate having mounted on the side of the substrate opposite to the one side a transmission line feeder positioned for electromagnetic coupling with the slot line, the transmission line feeder being coupled to transceiver circuit and processing circuit mounted on the opposite side for performing a transponding function.

Abstract: A duo-binary and/or binary data slicer has a data input (10) coupled via a capacitor (C1) to a d.c. restoring circuit (A2 to Q6 and Q9 to Q13) d.c. reference level is superimposed on the data signal. A sample and hold circuit (C2, Q15 to Q22) is arranged to sample the data signal and provide a voltage related to the upper and lower peak value. A divider (R16-R19) is coupled between the d.c. reference level and the voltage related to the upper and lower peak value and provides intermediate output voltages (DU, DL, B) relating to duo-binary and/or binary level for determining the slicing levels.

Abstract: A charge pump circuit for a frequency/phase comparator in a phase locked loop oscillator arrangement, in which current sources utilizing only npn transistors provide currents of equal magnitude but of opposite sense to an input of an operational amplifier, the output of this amplifier charge-pumping a capacitor to control the frequency of oscillation of an oscillator. The use of npn transistors enables higher current levels and higher speed switching compared to circuits including pnp transistors.

Abstract: A narrow band modulation UHF/Microwave communication system comprises a transmit/receive base station having a plurality of transmitter for transmitting information at respective UHF/Microwave channel frequencies to a plurality of remote transmit/receive stations, in which the transmitters at the base station are served in common by a single master oscillator and in which a single reference frequency signal is derived from the master oscillator at the base station and transmitted to all of said remote stations where it serves to provide for frequency locking of the oscillators at said stations to produce synchronization between the frequencies at the base station and the remote stations.