Abstract: In a first embodiment of the present invention, a method for operating a device having a device reference clock, in a system including a host with a host reference clock is provided, the method comprising: beginning a link negotiation stage between the device and the host using the device reference clock; during the link negotiation stage, sampling data received from the host to determine a frequency offset of the host reference clock; applying the frequency offset to the device reference clock to create a corrected device reference clock; and completing the link negotiation stage using the corrected device reference clock. This completing may include either continuing the original link negotiation stage or restarting it.

Abstract: Embodiments of methods, apparatuses and systems for transceiver processing are disclosed. One method includes a transceiver receiving a data stream from a link partner transceiver. A link parameter of a link between the transceiver and the link partner transceiver is determined. Allocation of transceiver processing between high-latency processing and low-latency processing is based at least in part on the link parameter.

Abstract: In accordance with a first embodiment of the present invention, a method for improving synchronization of communications between a first port and a second port is provided, the method performed at the first port and comprising: inserting skip symbols into a transmission stream for transmissions from the first port to the second port, wherein the skip symbols are inserted at a first average frequency level; detecting a lack of synchronization between the first port and the second port; and inserting skip symbols into the transmission stream at a second average frequency level greater than the first average frequency level in response to the detecting.

Abstract: In a first embodiment of the present invention, a method for operating a midpoint device utilizing an Input/Output (I/O) interconnect is provided, wherein the midpoint device contains a plurality of ports, the method comprising: receiving a request to initiate a session between a device on a first port of the midpoint device and a device on a second port of the midpoint device; retrieving information regarding whether the first port supports a feature, and information regarding whether the second port supports the feature; and when the first port supports the feature and the second port does not support the feature, permitting the session to be initiated, such that communications between the first device and the second device are performed partially using the feature, independently of support of the feature on other ports.

Abstract: In a first embodiment of the present invention, a method for communicating main and auxiliary data over a transmission medium is provided, the method comprising: generating a low-frequency output pattern using a high-frequency oscillator, wherein the low-frequency output pattern contains the auxiliary data encoded in a first scheme, wherein the first scheme resembles an output pattern that would be generated by a low-frequency oscillator; sending the low-frequency output pattern through a transmitter to be transmitted over the transmission medium; generating a high-frequency signal using a high-frequency oscillator, wherein the high-frequency signal contains the main data encoded in a second scheme different than the first scheme; and sending the high-frequency signal through the transmitter to be transmitted over the transmission medium.

Abstract: In a first embodiment of the present invention, a method for performing regression testing on a simulated hardware is provided, the method comprising: scanning a defect database for fixed signatures; retrieving all tests in a failing instance database that correspond to the fixed signatures from the defect database; running one or more of the retrieved tests; determining if any of the retrieved tests failed during running; and for any retrieved test that failed during running, refiling the failed retrieved tests in the failing instance database and placing one or more generalized signatures for the failed retrieved tests in the defect database.

Abstract: In a first embodiment of the present invention, a method for configuring a plurality of input/output (I/O) interconnect switch ports is provided, the method comprising: starting a link training and status state machine (LTSSM) for each of the plurality of ports; placing each of the LTSSMs in a receiver detect state; changing all of the LTSSMs to a polling state only once receivers are detected or timeouts occur in the receiver detect states in each of the LTSSMs; changing all of the LTSSMs to a configuration state only once polling is successful or timeouts occur in the polling states in each of the LTSSMs; and completing the configuration state of each of the LTSSMs.

Abstract: In a first embodiment of the present invention, a method for caching in a processor system having virtual memory is provided, the method comprising: monitoring slow memory in the processor system to determine frequently accessed pages; for a frequently accessed page in slow memory: copy the frequently accessed page from slow memory to a location in fast memory; and update virtual address page tables to reflect the location of the frequently accessed page in fast memory.

Abstract: In a first embodiment of the present invention, a method for allowing a microprocessor to access a flash memory is provided, the method comprising: fetching code instructions and data from the flash memory via a unidirectional code bus coupled to a flash controller, which is coupled to a databus interface, which is coupled to the flash memory; executing the code instructions in a manner that is substantially similar to that as used for a read only memory (ROM) coupled to the microprocessor; and writing data to the flash memory via a bidirectional databus separate from the unidirectional code bus, wherein the bidirectional databus is coupled to the databus interface and to a scratch memory, wherein the writing comprises using write flash procedures located in the ROM, the write flash procedures comprising instructions for reading and using parameter values stored in the scratch memory and for erasing memory locations and writing data to memory locations in the flash memory.

Abstract: In a first embodiment of the present invention, a method for performing regression testing on a simulated hardware is provided, the method comprising: scanning a defect database for fixed signatures; retrieving all tests in a failing instance database that correspond to the fixed signatures from the defect database; running one or more of the retrieved tests; determining if any of the retrieved tests failed during running; and for any retrieved test that failed during running, refiling the failed retrieved tests in the failing instance database and placing one or more generalized signatures for the failed retrieved tests in the defect database.

Abstract: In a first embodiment of the present invention, a method for operating a device having a device reference clock, in a system including a host with a host reference clock is provided, the method comprising: beginning a link negotiation stage between the device and the host using the device reference clock; during the link negotiation stage, sampling data received from the host to determine a frequency offset of the host reference clock; applying the frequency offset to the device reference clock to create a corrected device reference clock; and completing the link negotiation stage using the corrected device reference clock. This completing may include either continuing the original link negotiation stage or restarting it.

Abstract: In a first embodiment of the present invention, a method for dynamically adjusting a system clock of a plurality of system clock-controlled components in a system is provided, the method comprising: detecting the receipt of a command at a non-system clock-controlled component of the system; and adjusting the system clock to a fast speed based on the detecting. This embodiment may also include: determining that the command has been completed; determining that there are no outstanding commands in the plurality of system clock-controlled components; and adjusting the system clock to a slow speed based on the determination that there are no outstanding commands in the plurality of system clock-controlled components.

Abstract: In a first embodiment of the present invention, a method for generating a random number for an instance of a hardware description language definition is provided, the method comprising: generating a unique signature for the instance; applying a message digest generation process on the unique signature to arrive at a message digest having a fixed length; and applying a random number generation process on the message digest.

Abstract: In one embodiment, a method for controlling reads in a computer input/output (I/O) interconnect is provided. A read request is received over the computer I/O interconnect from a first device, the request requesting data of a first size. Then it is determined whether fulfilling the read request would cause the total size of a completion queue to exceed a first predefined threshold. If fulfilling the read request would cause the total size of the completion queue to exceed the first predefined threshold, then the read request is temporarily restricted from being forwarded upstream.

Abstract: In a first embodiment of the present invention, a method for operating an I/O interconnect midpoint device is presented, wherein the midpoint device has a direct memory access (DMA) controller and a plurality of ports, the method comprising: generating, using the DMA controller, a DMA read request; sending, using the DMA controller, the DMA read request to a first device connected to a first of the plurality of ports; receiving data responsive to the DMA read request from the first device; generating, using the DMA controller, a DMA write request including the received data; and sending, using the DMA controller, the DMA write request to a second device connected to the second of the plurality of ports.

Abstract: Embodiments of a method and apparatus for selecting coefficients of a non-linear filter are disclosed. The non-linear filter receives a transmit signal and generates a non-linear replica signal of a transmit DAC of a transceiver. The method include applying a plurality of periodic test pattern signals to inputs of the transmit DAC, wherein the periodic test pattern signals include a stream of symbols. Receive symbols are collected at an output of a receiver ADC of the transceiver resulting from the plurality of periodic test pattern signals. A non-linear map is generated that provides a value for each of n consecutive symbols input to the transmit DAC. Coefficients of the non-linear filter are selected based on the non-linear map.

Abstract: In one embodiment, a method for controlling reads in a computer input/output (I/O) interconnect is provided. A read request is received over the computer I/O interconnect from a first device, the request requesting data of a first size. Then it is determined whether fulfilling the read request would cause the total size of a completion queue to exceed a first predefined threshold.

Abstract: In a first embodiment of the present invention, a method for operating a midpoint device utilizing an Input/Output (I/O) interconnect is provided, wherein the midpoint device contains a plurality of ports, the method comprising: receiving a request to initiate a session between a device on a first port of the midpoint device and a device on a second port of the midpoint device; retrieving information regarding whether the first port supports a feature, and information regarding whether the second port supports the feature; and when the first port supports the feature and the second port does not support the feature, permitting the session to be initiated, such that communications between the first device and the second device are performed partially using the feature, independently of support of the feature on other ports.

Abstract: An apparatus and method of controlling activation of electronic circuitry of data ports of a communication system is disclosed. One method includes a first data port detecting a lack of data for transmission to a second data port. At least one of the first data port and a second data port deactivate electronic circuitry of at least one of the first and second data ports upon detection of the lack of data. The first and second data ports maintain synchronization with each other while the electronic circuitry is deactivated by periodically exchanging synchronization test patterns. At least one of the first data port and the second data port transmit an alert to the other of the first and second data port when data for communication is detected. The other of the first data port and the second data port activate electronic circuitry upon receiving the alert. At least one of the first data port and the second data port transmit data.

Abstract: In a first embodiment of the present invention, a method for handling a Transaction Layer Packets (TLPs) from devices in a switch is provided, the method comprising: subtracting a first number of credits from a credit pool associated with a first port on which a first device is connected; determining if the amount of credits in the credit pool associated with the first port is less than a first predetermined threshold; and if the amount of credits in the credit pool associated with the first port is less than the first predetermined threshold, assigning a second number of credits from a shared credit pool to the credit pool associated with the first port.