Patents Assigned to Qlogic Corporation
  • Patent number: 9819515
    Abstract: Methods and systems for network communication are provided. A method includes maintaining a first segment of a routing data structure at a first switching module of a network adapter for routing a frame between virtual machines executed by a computing device operationally coupled to the network adapter; maintaining a second segment of the routing data structure at a second switching module for routing a frame received at a port of the network adapter to an external destination; receiving a frame from the computing device and using the first segment by the first switching module to route the frame to a destination virtual machine; and receiving a frame at a port of the network adapter and using the second segment of the routing structure by the second switching module to the route the frame to its destination without providing the frame to the computing device.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: November 14, 2017
    Assignee: QLOGIC Corporation
    Inventors: Abhijit Seal, Manoj Wadekar
  • Patent number: 9800524
    Abstract: Methods and systems for network communication are provided. One method includes, receiving a network packet at a first network interface card (NIC) operationally coupled to a computing device; identifying a second NIC as a destination for the network packet; placing the network packet by the first NIC at a host memory location, without utilizing resources of a processor of the computing device; notifying the second NIC that the network packet has been placed at the host memory location; retrieving the network packet by the second NIC from the host memory location; transmitting the network packet by the second NIC to another destination; notifying the first NIC by the second NIC that the packet has been transmitted by the second NIC; and freeing the host memory location by the first NIC.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: October 24, 2017
    Assignee: QLOGIC Corporation
    Inventor: Nir Goren
  • Patent number: 9753852
    Abstract: Methods and systems for a device coupled to a computing device are provided. As an example, one method includes receiving a request for processing an address list control block (ALCB) by an ALCB offload engine of an adapter coupled to a computing device; determining by the ALCB offload engine if the ALCB is located at a cache managed by a cache controller of the ALCB engine; forwarding the ALCB to an address computation module that determines an address of a memory location of the computing device, where the ALCB stores the address of the memory location in an address list; generating a direct memory access (DMA) request to retrieve the ALCB from an adapter memory, when the ALCB is not located at the cache; and storing the ALCB at the cache, after the ALCB is received in response to the DMA request.
    Type: Grant
    Filed: October 21, 2015
    Date of Patent: September 5, 2017
    Assignee: QLOGIC Corporation
    Inventors: Dharma R. Konda, Paul R. Magsino
  • Patent number: 9747227
    Abstract: Method and system for transmitting same data by at least two different ports of a network device coupled to a computing device or to at least two different destinations coupled to a same port of the network device is provided. The computing device sends a single command for sending the same data to the network device. The network device obtains the same data from the computing device via one direct memory access (DMA) operation; and then sends only one notification for transmitting the same data via at least two different ports or to two different destinations via the same port.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: August 29, 2017
    Assignee: QLOGIC, Corporation
    Inventor: Manisha Sameer Gambhir-Parekh
  • Patent number: 9727494
    Abstract: Methods and systems for a device interfacing with a computing system are provided. The device is configured to send an input/output status block (IOSB) and an interrupt message to the processor of a computing system interfacing upon completion of an operation. The device generates the interrupt message while the IOSB is waiting to be transmitted; and transmits the IOSB to the processor, followed by the interrupt message, using a same data path for both the IOSB and the interrupt message. Furthermore, the device is configured to detect a request from the processor of the computing system interfacing to clear an interrupt status maintained by the device at a hardware location; send a message to the processor to de-assert the interrupt status and in parallel, clear the hardware location to clear the interrupt status such that the computing system can transfer information to the device for a next operation.
    Type: Grant
    Filed: October 11, 2012
    Date of Patent: August 8, 2017
    Assignee: QLOGIC, Corporation
    Inventors: Rajendra R. Gandhi, Bradley S. Sonksen, Kuangfu David Chu, Vi Chau
  • Patent number: 9720733
    Abstract: Methods and systems for routing control blocks is provided. One method includes receiving a control block from a computing device at an adapter having a plurality of hardware engines for processing control blocks, where the control blocks are to read data, write data, obtain status for an input/output request and perform a management task; evaluating the control block by the adapter to determine that the control block is a continuation control block for data transfer using more than one control block; is a direct route control block for a specific hardware engine; or is for a management task; routing the control block to a same hardware engine when the control block is a continuation control block; and routing the control block to a master hardware engine from among the plurality of hardware engines, when the control block is for the management task.
    Type: Grant
    Filed: April 28, 2015
    Date of Patent: August 1, 2017
    Assignee: QLOGIC Corporation
    Inventors: Dharma R. Konda, Rajendra R. Gandhi, Ben K. Hui, Bruce A. Klemin
  • Patent number: 9692560
    Abstract: Methods and systems for network communication are provided. One of the methods includes receiving an out of order packet at a requestor device that is communicably connected to a responder device; storing the out of order packet at an out of order buffer location; and sending a lossy reliable connection (LRC) packet to the responder device when selective acknowledgement (SACK) is supported between the requestor device and the responder device, with information regarding an updated sequence number in a LRC extended header (LRCETH) that indicates to the responder information regarding in-order packets that have been received by the requestor device.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: June 27, 2017
    Assignee: QLOGIC Corporation
    Inventors: Yoav Galon, Rafi Shalom, Amit Radzi
  • Patent number: 9674303
    Abstract: Methods and systems for network communications are disclosed. The target device receives a request for a network connection from an initiator device, the request indicating a desire to bypass transport communication layer processing. The target device accepts the request and sends a response to the initiator device indicating an agreement to bypass the transport layer processing. The target device then receives a frame from the initiator device and processes the frame by bypassing the transport communication layer processing.
    Type: Grant
    Filed: November 19, 2014
    Date of Patent: June 6, 2017
    Assignee: QLOGIC, Corporation
    Inventors: Bruce A. Klemin, Raymond Chow, Dean Scoville
  • Patent number: 9588920
    Abstract: Methods and systems for sending and receiving information in a network are provided. The method includes configuring a port trunk as a PCI-Express function by an adapter, where the port trunk includes a plurality of network links that couple an adapter port to a port of another device; configuring the port of the other device for using the port trunk for sending and receiving information to and from the adapter port; transferring data by the adapter port on a same link for a write operation belonging to a same transaction for writing the data at a storage location; and receiving a confirmation for completing the write operation from the port of the other device after the data is written at the storage location, where the port of the other devices also uses a same link for sending information to the adapter port for the same transaction.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: March 7, 2017
    Assignee: QLOGIC, Corporation
    Inventors: Sanjaya Anand, Kathy K. Caballero
  • Patent number: 9590897
    Abstract: Methods and systems for optimizing data structures to efficiently control network data transfers are provided. For example, the method includes determining common key type sets from a plurality of network processing rules; creating one or more hash data structures using the most common key type sets; programming network processing rules that use the most common key type sets into the one or more hash data structures; programming remaining network processing rules into a content addressable memory (CAM); and using the one or more hash data structures and the CAM to find an appropriate network processing rule to process a network packet.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: March 7, 2017
    Assignee: QLOGIC Corporation
    Inventor: Robert Lee Faulk, Jr.
  • Patent number: 9590924
    Abstract: Methods and systems for a network device are provided. The network device includes a stage one arbiter for a base-port having a plurality of sub-ports for determining if there are any pending requests; blocking any other requests from a same receive queue destined for a same sub-port, same transmit queue when there are any pending requests; selecting a group of requests with a highest priority and available resources; selecting highest priority requests; selecting an oldest one of the highest priority requests; sending the selected requests to a stage two arbiter for selecting a request with a highest priority and when there are requests that have a same priority, selecting an oldest request for processing.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: March 7, 2017
    Assignee: QLOGIC, Corporation
    Inventors: Frank R. Dropps, Gary M. Papenfuss, Leo J. Slechta, Jr.
  • Patent number: 9588839
    Abstract: Methods and systems for network devices is provided. In one aspect, a network device includes a plurality of ports, where the plurality of ports are configured to operate in a first operating mode as a single port at a first speed and in a second operating mode where each of the plurality of ports operate as an independent port at a second operating speed; a shared memory device for staging information received from a network for the plurality of ports operating in the first operating mode and the second operating mode; a receive port selector that selects information from the shared memory device when the plurality of ports are operating in the second operating mode; and a shared error correction code module for decoding and performing error correction on information received via the network for the first operating mode and the second operating mode.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: March 7, 2017
    Assignee: QLOGIC Corporation
    Inventor: Raul Oteyza
  • Patent number: 9507524
    Abstract: Machine implemented method and system for in-band management is provided. The method includes generating a management command from a first adapter having a storage protocol controller; and using a transport driver at the first adapter for sending the management command to a second adapter via the port that is also used for sending any input/output requests to read and write information to and from a storage device, where the management command is in a same format as a write command block for writing information at the storage device.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: November 29, 2016
    Assignee: QLOGIC, Corporation
    Inventors: Shishir Shah, Sudhir T. Ponnachana
  • Patent number: 9483207
    Abstract: Systems and methods for caching information are provided. A method includes receiving an input/output (I/O) request for writing data at a storage device, the I/O request including a logical unit number (LUN) identifier, a logical block address (LBA) associated with storage space at the storage device and a data payload; determining a hash value using the data payload; using the hash value to determine if the data payload already has been cached by an adapter; updating a reference count at a hash data structure indicating that the cached data payload is referenced by more than one I/O request, when the data payload has been cached by the adapter; and updating the hash data structure, when the data payload does not exist at a cache managed by the adapter.
    Type: Grant
    Filed: January 9, 2015
    Date of Patent: November 1, 2016
    Assignee: QLOGIC, Corporation
    Inventors: Gaurav Srivastava, Sameer K. Kshatriya, Shashikiran Revankar
  • Patent number: 9483290
    Abstract: Methods and systems for a virtual environment are provided. A method includes receiving a packet from a first virtual machine at a virtual switch; determining if the packet is destined to a second virtual machine by comparing a destination address to a mapping data structure maintained by the virtual switch; transferring the packet to a first virtual function of a device assigned to the first virtual machine by directly mapping the first virtual function to the first virtual machine; the first virtual function initiating a direct memory access (DMA) operation to transfer the packet to the second virtual machine based on a logical memory address of the second virtual machine that is received from a second virtual function; and using the DMA operation to transfer the packet to the second virtual machine.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: November 1, 2016
    Assignee: QLOGIC, Corporation
    Inventors: Neeraj Mantri, Tanmay Pradip Shete
  • Patent number: 9477414
    Abstract: Systems and methods for improved caching with data recovery are disclosed. A write input/output (I/O) request is received from an application to write to a storage area network (SAN) LUN that is cached by a first intelligent storage adapter (ISA) using a cache LUN and mirrored by a second ISA using a mirror LUN. Write through caching is enabled, when either the first ISA or the second ISA has failed. The write I/O request is proceed by a surviving ISA from among the first ISA and the second ISA, where the surviving ISA sends the write I/O to the SAN LUN. Data is copied from a local storage device of the surviving ISA to a recovery LUN; and periodically data is also flushed from the local storage of the surviving ISA to the SAN LUN.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: October 25, 2016
    Assignee: QLOGIC, Corporation
    Inventor: Parag Gokhale
  • Patent number: 9477424
    Abstract: Methods and systems for synchronous replication of data are provided. A master intelligent storage adapter operating within a cluster having a slave intelligent storage adapter receives a plurality of write requests; generates a first input/output (I/O) request for storing the data for the plurality of write requests at a first storage device; and generates a second I/O request for a replication module executed by a computing device for synchronously storing the data at a second storage device. The computing device initiates a synchronous replication operation to replicate the data for the plurality of write requests at the second storage device.
    Type: Grant
    Filed: July 23, 2014
    Date of Patent: October 25, 2016
    Assignee: QLOGIC, Corporation
    Inventor: Anurag Verma
  • Patent number: 9465406
    Abstract: Method and system for a device having a processor module for maintaining a connection with another device are provided. The device includes a timer module having a plurality of timers, where the resolution for each timer is maintained by one or more processor modules; and a timer state module that stores an indicator value for indicating a timer state. A timer is assigned to the connection and the processor module manages the resolution of the timer. The processor module sends a request to the timer module for arming the timer and the timer module sets the timer state as active in a first storage location maintained by the timer state module; and responds to the processor module after the timer is activated. The processor module uses the information in the response for requesting a disarm operation.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: October 11, 2016
    Assignee: QLOGIC, Corporation
    Inventors: Kanoj Sarcar, Ralph B. Campbell, Daniel R. Pearson
  • Patent number: 9460017
    Abstract: Systems, methods, and storage mediums storing executable instructions are disclosed for providing efficient cache mirroring, particularly in a distributed storage environment. In particular, in an aspect, a machine-implemented method, comprises: receiving an I/O request from an application; splitting the I/O request into cache LBAs and non-cache LBAs; storing the cache LBAs in a cache LUN; preparing one or more mirror write descriptors based on the cache LBAs, wherein each mirror write descriptor includes a data location and a data length; and sending the mirroring data structure and the cache LBAs to a mirroring device to store a back-up of the cache LUN. In an aspect, sending the mirroring data structure and the cache LBAs is accomplished in a single I/O request to the mirroring device.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: October 4, 2016
    Assignee: QLOGIC, Corporation
    Inventors: Viral Mehta, Paul Moreau, Lolo Ramirez
  • Patent number: 9454305
    Abstract: Methods and systems for managing logical storage object reservation requests are provided. A controller of a storage array having a storage device for storing information on behalf of the logical storage object communicates with a first adapter via a network connection. The controller grants ownership of the logical storage object to the first adapter by the controller. A second adapter that interfaces with the first adapter is notified by the first adapter regarding the granted ownership. The second adapter is configured to send a request for reserving the logical storage object to the first adapter, where the second adapter sends the request on behalf of an application for reading, writing or both reading and writing at the storage space using the logical storage object. The first adapter receives and processes the request.
    Type: Grant
    Filed: January 27, 2014
    Date of Patent: September 27, 2016
    Assignee: QLOGIC, Corporation
    Inventors: Normin A. Emralino, Anurag Verma, Ajmer Singh