Patents Assigned to SiGe Semiconductor Inc.
  • Publication number: 20060226821
    Abstract: A dual output voltage regulator circuit is disclosed. The output voltage regulator has a first FET and a second FET. A current source responsive to the regulated output voltage provides a current drive to the gate of the first FET in a first mode of operation and to the gate of the second FET in a second mode of operation. Further, the circuit employs switches for switchably selecting between the first mode of operation and the second mode of operation.
    Type: Application
    Filed: April 7, 2005
    Publication date: October 12, 2006
    Applicant: SiGe Semiconductor Inc.
    Inventor: Edward Whittaker
  • Publication number: 20060205378
    Abstract: Within an amplifier circuit having an amplifying transistor, a boost voltage is presented at a port of the transistor. The amplifying transistor has a base, an emitter and a collector or a gate, a source, and a drain. A capacitor is provided in electrical communication with the transistor. A voltage source is provided for providing one of the collector and the source with a first voltage and for in a first mode of operation charging the first capacitor. Also within the circuit is a switch for switching between the first mode of operation and a second other mode of operation wherein the first capacitor and the voltage source cooperate to provide a voltage at one of the collector and the source in excess of the first voltage.
    Type: Application
    Filed: November 15, 2005
    Publication date: September 14, 2006
    Applicant: SiGe Semiconductor Inc.
    Inventors: Jeremy Loraine, Jeffery Wojtiuk, Philip Macphail, Stephen Kovacic
  • Patent number: 7103328
    Abstract: The purpose of the invention is to provide an accurate measurement of RF signal power transfer between a power amplifier circuit and an antenna in the presence of supply voltage variations, temperature variations and VSWR mismatch. Knowing the VSWR mismatch enables modification of a control loop for the PA and thus allows for output power adjustment in order to make the PA more efficient and robust against VSWR changes. Having an indication of power delivered to the load and the VSWR is desirable for many wireless applications especially in those applications where the PA can generate emissions that are out of band and all emissions subject to industry standards. In particular, the embodiments of the invention are applicable to wireless LANs (WLANs).
    Type: Grant
    Filed: July 24, 2003
    Date of Patent: September 5, 2006
    Assignee: SiGe Semiconductor Inc.
    Inventor: Christopher A. Zelley
  • Patent number: 7049891
    Abstract: A bias boost circuit is disclosed for use with an amplifier circuit for biasing thereof. The amplifier circuit includes at least a first transistor and a filter circuit for filtering of current pulses received from the bias boost circuit, where filtered current pulses form a variable bias current that is provided to the at least a first transistor. With this type of biasing circuit, large input signals that would normally compress the gain of the amplifier circuit are therefore amplified with less gain compression by virtue of the boost in bias current that is supplied to the at least a first transistor.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: May 23, 2006
    Assignee: SiGe Semiconductor Inc.
    Inventor: Gregory Yuen
  • Patent number: 7008864
    Abstract: This invention provides a method of depositing high-quality Si or SiGe epitaxial layers on SiGe substrates. By first depositing a thin Si seed layer on the SiGe substrate, the quality of the seed layer and of the subsequently deposited layers is greatly improved over what is obtained from depositing SiGe directly onto the SiGe substrate. Indeed, whereas the RMS surface roughness of the deposition of SiGe directly on SiGe, as measured by atomic-force microscopy (AFM), was 3–4 nm, it was more than an order of magnitude better when a thin Si seed layer was employed. This work was performed on an ultra-high-vacuum chemical vapor deposition (UHV/CVD) system; however, the same method would apply to other deposition systems such as atmospheric-pressure, low-pressure and rapid-thermal CVD.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: March 7, 2006
    Assignee: Sige Semiconductor Inc.
    Inventors: Michel Maurice Dion, Hugues Lafontaine
  • Patent number: 6995808
    Abstract: A front end tuner for receiving TV signals and the like includes a frequency conversion circuit including a mixer for beating a local signal with received signals within a predetermined band of frequencies to provide selected signals within a predetermined band of frequencies to provide selected signals within a predetermined channel band of frequencies. A signal converter circuit generates digitally encoded signal representations of the selected signals. The frequency conversion circuit and the signal converter circuit are in a form of an integrated circuit within a semiconductor substrate. In a TV receiver, on-following digital processing of the digitally encoded signals is performed in a microcomputer. In one example a channel selection code is used by the microcomputer to synthesize the local oscillator signal and in another example the signal converter circuit is a codec, responsive to codes from the microprocessor, to supply a control voltage for controlling a local oscillator.
    Type: Grant
    Filed: January 24, 2002
    Date of Patent: February 7, 2006
    Assignee: SiGe Semiconductor Inc.
    Inventors: Stephen J. Kovacic, Cormac M. O'Connell
  • Patent number: 6995580
    Abstract: A power detector for measuring the power transfer between a circuit for emitting an electrical signal and a first conductor that receives the emitted electrical signal. The emitted signal causes a magnetic field to be generated in the first conductor. A coupling detection circuit measures an electric current that arises in a second conductor that is proximate and electrically coupled to the first conductor. The measured electric current in the second conductor is used to determine the power transfer between the emitting circuit and the first conductor. The first and second conductors can be bond wires within an integrated circuit package, and the coupling detection circuit can be disposed in a semiconductor substrate within the integrated circuit package.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: February 7, 2006
    Assignee: SiGe Semiconductor Inc.
    Inventor: Phil Macphail
  • Patent number: 6947840
    Abstract: GPS signals are typically weak and thus easily interfered with by other radio transmissions in the same or adjacent frequency bands. Interference can be especially problematic when the GPS receiver is co-located with a communications device that includes a radio transmitter, such as a cellular telephone. The transmitted signal from the co-located communication device can overload (or saturate) the GPS receiver front-end designed to receive weak GPS signals. In such a situation no useful information can be extracted from the received GPS signals originating from the GPS satellites. Described herein is a novel apparatus and method that can be used to minimize the effect of co-located interference on a GPS receiver.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: September 20, 2005
    Assignee: Sige Semiconductor Inc.
    Inventor: Dennis Arthur Fielder
  • Patent number: 6917243
    Abstract: Prior art architectures of power amplifiers employ a substantial die area, and utilize multiple integrated circuit technologies with a net higher manufacturing cost and large associated packaging area. A new scheme is presented wherein several sense and control signals are used to provide fine and gross control over the key figures of merit associated with integrated semiconductor power amplifiers. How and where these sense and control signals are used is crucial to achieving the most manufacturable and most economic integrated amplifier. In accordance with a first embodiment of the invention, a Dual Feedback-Low power regulation circuit for a three-stage power amplifier integrated circuit is provided. In accordance with a second embodiment of the invention, a current source feedback circuit having low RF output signal power regulation for a three-stage power amplifier integrated circuit is provided.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: July 12, 2005
    Assignee: SiGe Semiconductor Inc.
    Inventors: Mark Doherty, John Gillis, Michael McPartlin, David Helms, Phillip Antognetti
  • Patent number: 6917248
    Abstract: VCO (voltage controlled oscillator) circuits typically exhibit a frequency dependent variation in their output signal with respect to a tuning voltage applied to a tuning port on the VCO circuit. For a fixed tuning voltage the VCO circuit forms a stable oscillator. However, the stable oscillator formed is susceptible to both internal and external noise sources. Forming a VCO circuit from components such as varactors facilitates frequency stability and decreased noise susceptibility of the VCO circuit. A VCO formed from such components advantageously uses a summed capacitance of two or more varactors to provide decreased phase noise. Using a summed capacitance of the varactors reduces changes in output signal frequency with respect to changes in tuning voltage and thereby reduces the effects of noise by reducing a slope of this dependence.
    Type: Grant
    Filed: July 18, 2002
    Date of Patent: July 12, 2005
    Assignee: SiGe Semiconductor Inc.
    Inventor: Glao M. Nguyen
  • Patent number: 6903608
    Abstract: A power amplifier circuit is disclosed having a first amplification stage and a second amplification stage. The first amplification stage is biased using a controllable current source that provides a variable bias current thereto. A control circuit is provided for controlling the variable bias current in dependence upon the supply voltage and temperature of the power amplifier circuit. The control signal varies the variable bias current in dependence upon the supply voltage varying between first and second potential, where each potential supplies sufficient potential for operation of the power amplifier circuit.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: June 7, 2005
    Assignee: SiGe Semiconductor Inc.
    Inventors: Edward J. W. Whittaker, Christopher A. Zelley
  • Patent number: 6882220
    Abstract: Prior art architectures of power amplifiers employ a substantial die area, and utilize multiple integrated circuit technologies with a net higher manufacturing cost and large associated packaging area. A new scheme is presented wherein several sense and control signals are used to provide fine and gross control over the key figures of merit associated with integrated semiconductor power amplifiers. How and where these sense and control signals are used is crucial to achieving the most manufacturable and most economic integrated amplifier. In accordance with a first embodiment of the invention, a Dual Feedback-Low power regulation circuit for a three-stage power amplifier integrated circuit is provided. In accordance with a second embodiment of the invention, a current source feedback circuit having low RF output signal power regulation for a three-stage power amplifier integrated circuit is provided.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: April 19, 2005
    Assignee: SiGe Semiconductor Inc.
    Inventors: Mark Doherty, John Gillis, Michael McPartlin, David Helms, Phillip Antognetti
  • Patent number: 6873212
    Abstract: An integrated circuit superheterodyne radio receiver includes a notch filter coupled with an amplifier for amplifying radio frequency (RF) signals to improve image signal rejection. The notch filter includes a first oscillator circuit with a tank circuit having a resonant frequency corresponding to the unwanted image frequency signal. A control circuit includes a second oscillator circuit, a master bias circuit and a slave bias circuit. The second oscillator circuit is substantially similar to the first oscillator circuit. The master bias circuit is responsive to an amplitude of oscillatory signals in the second oscillator circuit for limiting a flow operating current such that the second oscillator circuit is restrained to operate in a marginally oscillatory state. A slave bias circuit is responsive to the master bias circuit for similarly limiting a flow of current, for operating the first oscillator circuit.
    Type: Grant
    Filed: May 17, 2001
    Date of Patent: March 29, 2005
    Assignee: SIGe Semiconductor Inc.
    Inventor: John William Mitchell Rogers
  • Patent number: 6859028
    Abstract: There is a desire to provide a testing method and apparatus that can be successfully integrated into a PLL and PLL-like circuits (e.g. frequency synthesizers, delay lock loops, etc.). It is desirable that the PLL or PLL-like circuit integrated with testing apparatus does not suffer from performance degradations during nominal (mission mode) operation. Furthermore, it is desirable that the PLL and the testing apparatus share the same interface. In order to produce a PLL having integrated testing apparatus, without having the PLL suffer severe performance degradations during nominal operation nor having the combination of the PLL and testing apparatus be unnecessarily large, a modified PLL integrated with testing apparatus is provided.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: February 22, 2005
    Assignee: Sige Semiconductor Inc.
    Inventor: Michael F. Toner
  • Patent number: 6850742
    Abstract: In a frequency modulation radio receiver with direct conversion, a local oscillator signal is generated having a frequency within a preselected frequency range and the frequency is varied in response to a variable low frequency signal; the local oscillator signal is mixed with a received signal to provide a baseband signal. The variable low frequency signal is generated by a controlled oscillator in inverse relationship to a direct current component in said baseband signal. In a frequency modulation radio transceiver a broadcast function is provided by varying the low frequency signal with an information signal with the resulting local oscillator frequency being varied accordingly and amplified for broadcast. The transceiver is controlled to operate alternately in either a receive mode and a broadcast mode at substantially the same frequency.
    Type: Grant
    Filed: June 1, 2001
    Date of Patent: February 1, 2005
    Assignee: SiGe Semiconductor Inc.
    Inventor: Nader Fayyaz
  • Patent number: 6825725
    Abstract: Prior art architectures of power amplifiers employ a substantial die area, and utilize multiple integrated circuit technologies with a net higher manufacturing cost and large associated packaging area. A new scheme is presented wherein several sense and control signals are used to provide fine and gross control over the key figures of merit associated with integrated semiconductor power amplifiers. How and where these sense and control signals are used is crucial to achieving the most manufacturable and most economic integrated amplifier. In accordance with a first embodiment of the invention, a Dual Feedback-Low power regulation circuit for a three-stage power amplifier integrated circuit is provided. In accordance with a second embodiment of the invention, a current source feedback circuit having low RF output signal power regulation for a three-stage power amplifier integrated circuit is provided.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: November 30, 2004
    Assignee: SiGe Semiconductor Inc.
    Inventors: Mark Doherty, John Gillis, Michael McPartlin, David Helms, Phillip Antognetti
  • Patent number: 6822511
    Abstract: Prior art architectures of power amplifiers employ a substantial die area, and utilize multiple integrated circuit technologies with a net higher manufacturing cost and large associated packaging area. A new scheme is presented wherein several sense and control signals are used to provide fine and gross control over the key figures of merit associated with integrated semiconductor power amplifiers. How and where these sense and control signals are used is crucial to achieving the most manufacturable and most economic integrated amplifier. In accordance with a first embodiment of the invention, a Dual Feedback-Low power regulation circuit for a three-stage power amplifier integrated circuit is provided. In accordance with a second embodiment of the invention, a current source feedback circuit having low RF output signal power regulation for a three-stage power amplifier integrated circuit is provided.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: November 23, 2004
    Assignee: SiGe Semiconductor Inc.
    Inventors: Mark Doherty, John Gillis, Michael McPartlin, David Helms, Phillip Antognetti
  • Patent number: 6756604
    Abstract: A bipolar transistor is disclosed that is produced using a sacrificial mesa disposed over a layer of Si and SiGe in order to prevent a polysilicon covering layer from forming over a predetermined region of the Si and SiGe layer forming the transistor base. After an etching process, the sacrificial mesa is removed and the Si and SiGe layer is exposed, where an oppositely doped material is applied over top of the Si and SiGe layer to form an emitter. This makes it possible to realize a thin layer of Si and silicon germanium to serve as the transistor base. The transistor device formed using the sacrificial mesa results in the base layer Si and SiGe not being affected by a process of etching, as it otherwise would be using a conventional double-poly process, which results in a more repeatable bipolar transistor device yield.
    Type: Grant
    Filed: February 1, 2002
    Date of Patent: June 29, 2004
    Assignee: SiGe Semiconductor Inc.
    Inventors: Stephen J. Kovacic, Derek C. Houghton
  • Patent number: 6681103
    Abstract: With the rising popularity in wireless personal communication systems (PCS), there is a need for low-power, low-cost radio receivers. Low cost can be achieved by integrating the required functions as much as possible, thus minimizing the number of off-chip components. The present invention discloses a novel topology for integrating an image reject filter with a traditional low-noise amplifier (LNA) for use in the front-end of a superheterodyne receiver. Previous topologies employing additional filter stages after the LNA have suffered from poor performance and excessive current consumption. Advantageously, the topology of the present invention requires minimal additional circuitry to perform the filtering function, uses only minimal additional current and does not suffer from the same performance limitations as previous topologies.
    Type: Grant
    Filed: August 25, 2000
    Date of Patent: January 20, 2004
    Assignee: Sige Semiconductor Inc.
    Inventors: John William Mitchell Rogers, Calvin Plett
  • Patent number: 6681181
    Abstract: GPS signals are typically weak and thus easily interfered with by other radio transmissions in the same or adjacent frequency bands. Interference can be especially problematic when the GPS receiver is co-located with a communications device that includes a radio transmitter, such as a cellular telephone. The transmitted signal from the co-located communication device can overload (or saturate) the GPS receiver front-end designed to receive weak GPS signals. In such a situation no useful information can be extracted from the received GPS signals originating from the GPS satellites. Described herein is a novel apparatus and method that can be used to minimize the effect of co-located interference on a GPS receiver.
    Type: Grant
    Filed: May 20, 2002
    Date of Patent: January 20, 2004
    Assignee: Sige Semiconductor Inc.
    Inventor: Dennis Arthur Fielder