Abstract: An encapsulation hood is fastened onto electrically conductive zones of a support substrate using springs. Each spring has a region in contact with an electrically conductive path contained in the encapsulation hood and another region in contact with a corresponding one of the electrically conductive zones. The fastening of the part of the encapsulation hood onto the support substrate compresses the springs and further utilizes a bead of insulating glue located between the compressed springs.

Abstract: A circuit includes a memory array with SRAM cells connected in rows by word lines and in columns by bit lines. A row controller circuit simultaneously actuates, through a word line driver circuit for each row, word lines in parallel for an in-memory compute operation. A column processing circuit processes analog voltages developed on the bit lines in response to the simultaneous actuation to generate a decision output for the in-memory compute operation. A bit line precharge circuit generates a precharge voltage for application to each pair of bit lines. The precharge voltage has a first voltage level (not greater than a positive supply voltage for the SRAM cells) when the memory array is operating in a data read/write mode. The precharge voltage has a second voltage level (greater than the first voltage level) in advance of the simultaneous actuation of the word lines for the in-memory compute operation.

Abstract: The MEMS actuator is formed by a body, which surrounds a cavity and by a deformable structure, which is suspended on the cavity and is formed by a movable portion and by a plurality of deformable elements. The deformable elements are arranged consecutively to each other, connect the movable portion to the body and are each subject to a deformation. The MEMS actuator further comprises at least one plurality of actuation structures, which are supported by the deformable elements and are configured to cause a translation of the movable portion greater than the deformation of each deformable element. The actuation structures each have a respective first piezoelectric region.

Abstract: A scanning laser projector includes an optical module with a housing defined by a top surface, a bottom surface, and sidewalls extending between the top surface and bottom surface to define an interior compartment within the housing. A given one of the sidewalls has an exit window defined therein. A first light detector is positioned at an interior surface of the given one of the sidewalls about a periphery of the exit window. A second light detector positioned at the interior surface of the given one of the sidewalls about the periphery of the exit window and on a different side thereof than the first light detector.

Abstract: A circuit includes an amplifier, a bias voltage node, and a first set of switches configured, based on a first reset signal having a first value, to couple first and second input nodes to the bias voltage node and to couple first and second output nodes of the amplifier. First and second feedback branches each include a respective RC network including a plurality of capacitances. The first and second feedback branches further include a second set of switches intermediate input nodes and the capacitances, and a third set of switches intermediate input nodes and the plurality of capacitances. These switches selectively couple the capacitances to the input nodes and output nodes, based on a second reset signal having a first value. The second reset signal keeps the first value for a determined time interval exceeding a time interval in which the first reset signal has the first value.

Abstract: In an embodiment a power converter includes a first capacitor and a second capacitor coupled in series with the first capacitor, wherein the converter is configured to charge, during a first phase, the first and second capacitors by a supply voltage so that a voltage across terminals of each of the first and second capacitors is substantially equal to half the supply voltage and discharge, during a second phase, the second capacitor to a third capacitor.

Abstract: A circuit includes at least one bipolar transistor and at least one variable capacitance diode. The circuit is fabricated using a method whereby the bipolar transistor and variable capacitance diode are jointly produced on a common substrate.

Abstract: An electric device includes: a first power domain; a second power domain; a third power domain, where during power-up, the third, the second, and the first power domains are configured to be powered up sequentially, where during standby-exit, the first, the second, and the third power domains are configured to be powered up sequentially; isolation paths that provide controlled signal transmission among the first, the second, and the third power domains, where each isolation path includes an isolation circuit between an input power domain and an output power domain of the isolation path; and a control circuit in the first power domain, where for each isolation path, the control circuit is configured to generate an isolation control signal for the isolation circuit, where the isolation circuit is configured enable or disable signal transmission along the isolation path.

Abstract: A transistor includes a source region, a drain region and a body region arranged in a semiconductor layer. A gate region tops the body region. The body region includes a first doped layer and a second layer between the first doped layer and the gate region. The second layer is an epitaxial layer that is less heavily doped than the first doped layer.

Abstract: A converter system includes a reference buffer buffering a reference input to produce a DAC reference, operating from a reference feedback voltage generated by a reference divider. A tail buffer generates a tail voltage from an input voltage generated from the DAC reference by a tail divider. An R-2R type DAC utilizes an R-2R ladder to generate a DAC output from a code. This ladder has a tail resistor coupled to the tail voltage. A feedback buffer buffers the DAC output to produce a converter reference. A DC-DC converter generates a DC output from a DC input, based upon a converter feedback voltage. A feedback divider coupled between the DC output and the converter reference generates the converter feedback voltage. Control circuitry selectively taps the reference divider to produce the reference feedback voltage (performing gain trimming) and selectively taps the tail divider to produce the input voltage (performing offset trimming).

Abstract: A flash analog-to-digital converter (ADC) receives an input control signal and performs coarse tuning of a frequency of an output signal, produced between first and second nodes having an inductance coupled therebetween. The flash ADC quantizes an operating frequency range for the output signal produced between the first and second nodes as M·?f, where M is an integer from 0 to N?1, where N is a number of intervals into which a frequency range for the output signal is divided, and where ?f is a resulting frequency step produced by the quantizing. The value of M is generated based upon the input control signal and a word controlling switches of a plurality of switched capacitance circuits associated with the first and second nodes to close ones of those switches associated with the control word to coarsely tune the frequency of the output signal.

Abstract: A method for operating a sense amplifier in a one-switch one-resistance (1S1R) memory array, includes: generating a regulated full voltage and a regulated half voltage; applying the regulated full voltage and regulated half voltage to selected and unselected bit lines of the 1S1R memory array during read operations as an applied read voltage; and inducing and compensating for a sneak-path current during read operations by adjusting the applied read voltage based on the cell state of an accessed bit cell and an amplitude of the sneak-path current.

Abstract: The MEMS device is formed by a substrate and a movable structure suspended on the substrate. The movable structure has a first mass, a second mass and a first elastic group mechanically coupled between the first and the second masses. The first elastic group is compliant along a first direction. The first mass is configured to move with respect to the substrate along the first direction. The MEMS device also has a second elastic group mechanically coupled between the substrate and the movable structure and compliant along the first direction; and an anchoring control structure fixed to the substrate, capacitively coupled to the second mass and configured to exert an electrostatic force on the second mass along the first direction.

Abstract: A pixel includes a SPAD having a cathode connected to a first node and an anode coupled to a first negative voltage, and a transistor circuit coupled between a supply voltage and a third node, that turns on in response to an enable signal. A cascode transistor connected between the third node and the first node is controlled by a cascode control signal. A cathode setting capacitor is connected between the first node and ground. A readout inverter is coupled between the intermediate node and an output node and generates an output signal. Turn-on of the transistor circuit sources current from the supply voltage node to the cathode setting capacitor, setting a reverse bias voltage across the SPAD to greater than its breakdown voltage. A photon impinging upon the SPAD cause avalanche of the SPAD which, when occurring after turn off of the transistor circuit, discharges the cathode setting capacitor.

Abstract: A microelectromechanical resonator device has: a main body, with a first surface and a second surface, opposite to one another along a vertical axis, and made of a first layer and a second layer, arranged on the first layer; a cap, having a respective first surface and a respective second surface, opposite to one another along the vertical axis, and coupled to the main body by bonding elements; and a piezoelectric resonator structure formed by: a mobile element, constituted by a resonator portion of the first layer, suspended in cantilever fashion with respect to an internal cavity provided in the second layer and moreover, on the opposite side, with respect to a housing cavity provided in the cap; a region of piezoelectric material, arranged on the mobile element on the first surface of the main body; and a top electrode, arranged on the region of piezoelectric material, the mobile element constituting a bottom electrode of the piezoelectric resonator structure.

Abstract: A device such as a dosimeter for detecting ionizing radiation, for example, X-ray radiation, in hospitals or the like. The device includes scintillator material configured to produce light as a result of radiation interacting with the scintillator material, and photoelectric conversion circuitry optically coupled to the scintillator material and configured to produce electrical signals via photoelectric conversion of light produced by the scintillator material. The device includes a plurality of photoelectric converters optically coupled with the scintillator material at spatially separated locations. The plurality of photoelectric converters thus produce respective electrical signals by photoelectric conversion of light produced by the scintillator material as a result of radiation interacting with the scintillator material. Improved energy linearity is thus facilitated while providing more efficient detection over the whole energy spectrum of radiation detected.

Abstract: A data weighted averaging (DWA) data word in a standard or normal form unary code format is first converted to a thermometer control word in an alternative or spatial form unary code format. The thermometer control word is then converted from the alternative or spatial form unary code format to output a corresponding binary word.

Abstract: A memory includes memory cells arranged in rows and in columns, with at least one bit line for each column being coupled to the memory cells of the column. A read/write circuit is coupled to the bit lines and is configured to receive, for each column, a binary datum to be stored in one of the memory cells of the column. The read/write circuit includes, for each column, a latch configured to store a bit of a key, and an encryption circuit configured to encrypt the received binary datum with the bit of the key to provide encrypted binary datum. The read/write circuit controls the bit line to thereby store the encrypted binary datum.

Abstract: A device include on-board memory, an applications processor, a digital signal processor (DSP) cluster, a configurable accelerator framework (CAF), and a communication bus architecture. The communication bus communicatively couples the applications processor, the DSP cluster, and the CAF to the on-board memory. The CAF includes a reconfigurable stream switch and data volume sculpting circuitry, which has an input and an output coupled to the reconfigurable stream switch. The data volume sculpting circuitry receives a series of frames, each frame formed as a two dimensional (2D) data structure, and determines a first dimension and a second dimension of each frame of the series of frames. Based on the first and second dimensions, the data volume sculpting circuitry determines for each frame a position and a size of a region-of-interest to be extracted from the respective frame, and extracts from each frame, data in the frame that is within the region-of-interest.

Abstract: A processing system includes a reset circuit, a memory storing configuration data, and a hardware configuration circuit transmitting the configuration data to configuration data clients. The system executes a reset phase, configuration phase, and software runtime phase. First and second reset terminals are associated with first and second circuitries which are respectively associated with configuration data clients. The configuration data includes first and second mode configuration data for the first and second terminals. During the reset and configuration phase, the first circuitry activates a strong pull-down, and the second circuitry activates a weak pull-down.