Abstract: A nitride semiconductor device is disclosed. The semiconductor device is formed by a process that first deposits a silicon nitride (SiN) film on a semiconductor layer by the lower pressure chemical vapor deposition (LPCVD) technique at a temperature, then, forming an opening in the SiN film for an ohmic electrode. Preparing a photoresist on the SiN film, where the photoresist provides an opening that fully covers the opening in the SiN film, the process exposes a peripheral area around the opening of the SiN film to chlorine (Cl) plasma that may etch the semiconductor layer to form a recess therein. Metals for the ohmic electrode are filled within the recess in the semiconductor layer and the peripheral area of the SiN film. Finally, the metals are alloyed at a temperature lower than the deposition temperature of the SiN film.

Abstract: An optical semiconductor device includes a semiconductor light receiving element, a capacitor, and a carrier. The carrier has a mounting surface on which the semiconductor light receiving element and the capacitor are mounted. The optical semiconductor device includes a first conductive pattern including a first mounting area and a first bonding pad, a second conductive pattern including a second mounting area and a third mounting area, and a third conductive pattern including a second bonding pad. The first mounting area is connected to a first electrode of the semiconductor light receiving element. The second mounting area is connected to a second electrode of the semiconductor light receiving element. The third mounting area is connected to one electrode of the capacitor. The conductive patterns are separated from each other. The other electrode of the capacitor is electrically connected to the third conductive pattern via a wire.

Abstract: A semiconductor device is made by: forming an ohmic electrode including Al on a semiconductor substrate; forming a SiN film covering the ohmic electrode; forming a first photoresist on the SiN film, the first photoresist having an opening pattern overlapping the ohmic electrode; performing ultraviolet curing of the first photoresist; forming an opening in the SiN film exposed through the opening pattern and causing a surface of the ohmic electrode to be exposed inside the opening; forming a barrier metal layer on the first photoresist and on the ohmic electrode exposed through the opening; forming a second photoresist in the opening pattern; performing a heat treatment on the second photoresist and covering the barrier metal layer overlapping the opening with the second photoresist; and etching the barrier metal layer using the second photoresist.

Abstract: A high frequency package includes a package having an input terminal and an output terminal. A substrate housed in the package, has a first side, a second side facing the input terminal, and a third side facing the output terminal. The first side extends in a first direction and connects the second side and the third side, and the second side and the third side extend in a second direction intersecting the first direction. A coupling circuit on the substrate is electrically connected to the input terminal and the output terminal to input an input signal from the input terminal disposed at the second side of the substrate and output an output signal to the output terminal disposed at the third side of the substrate. A filter circuit on the substrate is electrically connected to the coupling circuit, an is configured to reduce third-order IMD (Inter Modulation Distortion) included in the output signal.

Abstract: A 2nd signal line has impedance lower than impedance of a 1st signal line. A capacitor includes a 1st extension part and a 2nd extension part, a 1st ground part and a 2nd ground part. The 1st extension part and the 2nd extension part are connected to a 2nd signal line and are on an insulation substrate to extend along a longitudinal direction of the 2nd signal line. The 1st ground part and the 2nd ground part are at least a part of a ground pattern, and are between the 1st extension part and the 2nd extension part and the 2nd signal line, and between the 1st extension part and the 2nd extension part and an end part of the insulation substrate, to be electrically coupled with the 1st extension part and the 2nd extension part.

Abstract: A semiconductor device includes at least one transistor, a plurality of input wires, and a plurality of output wires. The at least one transistor has a plurality of input pads arranged along one side of the at least one transistor and a plurality of output pads arranged along another side of the at least one transistor facing the one side. The plurality of input wires are respectively connected to the plurality of input pads. The plurality of output wires are respectively connected to the plurality of output pads and have longer wire lengths than the plurality of input wires. Adjacent input wires of the plurality of input wires are arranged parallel to each other, and adjacent output wires of the plurality of output wires are arranged non-parallel to each other.

Abstract: A coherent receiver comprising: a signal port receiving the signal light that has two polarization components at right angles each other; a polarization dependent beam splitter (PBS) that splits the signal light into two portions depending on the polarizations contained in the signal light; a beam splitter (BS) that splits the local light into two portions; a multi-mode interference (MMI) device that interferes between one of the two portions of the signal light and one of the two portions of the local light; optical components provided between the PBS and the MMI device; and wherein the PBS splitting a first wavelength range of the signal light and a second wavelength range outside the first wavelength range.

Abstract: A capacitor includes an MIM capacitor that includes a lower electrode, a dielectric film disposed on the lower electrode, and an upper electrode disposed on the dielectric film, an insulating film that is disposed on the upper electrode so as to cover the MIM capacitor, and an additional electrode that is disposed in the insulating film and above an outer periphery of the upper electrode, has an outer periphery located outside the outer periphery of the upper electrode, and is connected to the upper electrode.

Abstract: A semiconductor device includes a substrate, a first source finger, a first gate finger, a first drain finger, a second source finger, a second gate finger, a second drain finger, a first gate wiring, wherein a width of the first gate wiring in the extension direction at a first region where the first gate finger connects to the first gate wiring is smaller than a width of the first gate wiring in the extension direction at a second region located between the first source finger and the second source finger, and an end of the first region near the second gate finger in the extension direction is located closer to the second gate finger than an end of the second region near the second gate finger in the extension direction.

Abstract: A semiconductor device includes a substrate, a first source finger provided on the substrate, a first gate finger provided adjacent to the first source finger in a width direction of the first source finger, a second source finger having a width smaller than a width of the first source finger, a second gate finger provided adjacent to the second source finger in the width direction of the second source finger, a first source wiring connecting the first source finger to the second source finger, a first gate wiring sandwiching the second source finger between the first gate wiring and the second gate finger, a second gate wiring intersecting the first source wiring in a non-contact manner, and connecting the first gate wiring to the first gate finger, and a first drain finger sandwiching the first gate finger and the second gate finger between the first drain finger.

Abstract: A method for adjusting an optical source used for fabricating an optical receiver comprising a signal beam input port, a polarization beam splitter, and signal generation units, is disclosed. The optical source generates a reference beam by combining first and second beams having polarization directions orthogonal each other. The reference beam is introduced to the signal beam input port to measure a first size of an electric signal generated in one of the signal generation units. A half-wavelength plate is disposed in an optical path between the beam splitter and the one of the signal generation units. After that, the reference beam is introduced to the signal beam input port to measure a second size of an electric signal generated in the one of the generation units. At least one of the first and second beams is adjusted such that the first size and the second size become close to each other.

Abstract: A method for tuning an emission wavelength of a laser device, including: acquiring a drive condition of a wavelength tunable laser diode to make the wavelength tunable laser diode oscillate at a wavelength from a memory; driving a first thermo-cooler and a first heater based on the drive condition of the wavelength tunable laser diode; determining whether respective control values of the first thermo-cooler and the first heater are reached within a first range of target values; and driving a gain region after the control values have been reached within the first range.

Abstract: An optical module of the present disclosure includes an optical element, a first optical component that is optically coupled to the optical element, a second optical component that is optically coupled to the first optical component, a receptacle to which an optical fiber that transmits the incident light to the second optical component is connected, a terminal unit that electrically outputs an output signal of the optical element to the outside, and a package that accommodates the optical element, the first optical component, and the second optical component and is provided with the receptacle on a first surface and the terminal unit on a second surface facing the first surface, wherein the wiring extends from the first surface side to the second surface side and electrically connects the second optical component and the terminal unit.

Abstract: A semiconductor device includes a semiconductor chip in which a field effect transistor mainly containing GaN is formed on a surface of a SiC semiconductor substrate. The semiconductor device includes a metal base on which a back surface of the semiconductor chip is mounted through a conductive adhesive material containing Ag and a resin mold configured to seal the semiconductor chip. A metal having wettability lower than wettability of Au or Cu with respect to Ag is exposed in a region extending along an edge of the back surface.

Abstract: Provided is an amplifier device including a semiconductor chip, a package, a first feedback circuit, and a second feedback circuit. The package includes a metal base, an insulating side wall, an input lead, and an output lead. The input lead is connected to a gate pad group of the semiconductor chip. The output lead is connected to a drain pad group of the semiconductor chip. Each of the feedback circuits includes a dielectric substrate disposed on the metal base, a feedback resistor located on the dielectric substrate, and a capacitor connected in series to the feedback resistor. Each of the feedback circuits is connected between the gate pad group and the drain pad group. The feedback circuits are located respectively on the base on one side and the other side of the semiconductor chip in an extension direction of a first and a second end edge.

Abstract: An amplification device includes a base substrate, an amplification element, and a matching circuit board. The amplification element is mounted on the base substrate. The matching circuit board is mounted on the base substrate and includes a circuit pattern which is electrically connected to the amplification element. The matching circuit board includes a first side surface and a second side surface each extending in the longitudinal direction of the matching circuit board. A first recess is provided in the first side surface. A second recess facing the first recess is provided in the second side surface.

Abstract: A amplifier device includes an amplifier, a coupling circuit, and a filter circuit. The amplifier amplifies a high frequency signal, and outputs to signal output ports the high frequency signal. The coupling circuit is provided side-by-side with the amplifier in a first direction on a substrate, connected to the signal output ports, and configured to couple output signals and output one output signal to an output terminal. The filter circuit is provided on the substrate and connected to the coupling circuit, and configured to reduce third-order IMD included in the one output signal. The one output signal is output from a middle of the substrate in a second direction intersecting with the first direction, and the filter circuit is arranged next to an edge of the substrate in the second direction, and arranged next to an edge of the substrate on the output terminal side in the first direction.

Abstract: A semiconductor device and a process of forming the semiconductor device are disclosed. The semiconductor device type of a high electron mobility transistor (HEMT) has double SiN films on a semiconductor layer, where the first SiN film is formed by the lower pressure chemical vapor deposition (LPCVD) technique, while, the second SiN film is deposited by the plasma assisted CVD (p-CVD) technique. Moreover, the gate electrode has an arrangement of double metals, one of which contains nickel (Ni) as a Schottky metal, while the other is free from Ni and covers the former metal. A feature of the invention is that the first metal is in contact with the semiconductor layer but apart from the second SiN film.

Abstract: A semiconductor device includes a semiconductor chip in which a field effect transistor mainly containing GaN is formed on a surface of a SiC semiconductor substrate. The semiconductor device includes a metal base on which a back surface of the semiconductor chip is mounted through a conductive adhesive material containing Ag and a resin mold configured to seal the semiconductor chip. A metal having wettability lower than wettability of Au or Cu with respect to Ag is exposed in a region extending along an edge of the back surface.

Abstract: A semiconductor device includes a field plate on an insulating film covering a transistor, the field plate being electrically coupled to a gate of the transistor via the insulating film, and the transistor being located on a substrate, a silicon nitride protective film covering the insulating film and the field plate, a silicon oxide base film on the silicon nitride protective film, and a MIM capacitor on the silicon oxide base film. The MIM capacitor includes a first electrode, a dielectric film and a second electrode which are stacked in an order. The MIM capacitor is formed by performing wet etching on the silicon oxide base film on the field plate after the dielectric film is formed.