Abstract: An example device includes an analog comparator circuitry having a first input configured to couple to an input voltage and a second input configured to couple to a reference voltage, the analog comparator circuitry configured to output a digital value corresponding to a difference between the input voltage and the reference voltage and output sampler circuitry configured to: produce a plurality of samples of the difference, and count the number of samples in which the input voltage is greater than the reference voltage. The example device also includes reference adaption circuitry configured to: determine, based on the count, whether to adjust the reference voltage; responsive to a determination to adjust the reference voltage, determine, based on the count, an amount of adjustment; and responsive to a determination not to adjust the reference voltage, provide an indication of the reference voltage to processor circuitry.

Abstract: According to an aspect, a video encoder selects a block of intermediate size from a set of block sizes for intra-prediction estimation for encoding a video signal. A set of neighboring blocks with the intermediate size are tested for combining. If the set of neighboring blocks are determined to be combinable, the video encoder selects a larger block size formed by the tested neighboring blocks for encoding. On the other hand, if the set of neighboring blocks are determined to be not combinable, the video encoder selects a smaller block size from the set of tested neighboring blocks for prediction. According to another aspect of the present disclosure, the best mode for intra-prediction is determined by first intra-predicting a block with intermediate modes in a set of modes. Then the intra-predictions are performed for the neighboring modes of at least one intermediate mode.

Abstract: A semiconductor package and a method for forming a semiconductor package are disclosed. The semiconductor package includes a metallic pad and leads, a semiconductor die including a semiconductor substrate attached to the metallic pad, and a conductor including a sacrificial fuse element above the semiconductor substrate, the sacrificial fuse element being electrically coupled between one of the leads and at least one terminal of the semiconductor die, a shock-absorbing material over a profile of the sacrificial fuse element, and mold compound covering the semiconductor die, the conductor, and the shock-absorbing material, and partially covering the metallic pad and leads, with the metallic pad and the leads exposed on an outer surface of the semiconductor package. Either a glass transition temperature of the shock-absorbing material or a melting point of the shock-absorbing material is lower than a melting point of the conductor.

Abstract: In described examples, a digital-to-analog converter (DAC) includes an output, a ground, a reference voltage terminal, an input code terminal, multiple switches, multiple resistors, and a controller. The switches couple to the reference voltage terminal when activated and to the ground when deactivated. The resistors are variously coupled between corresponding ones of the switches and the output, so that activating the switches causes the DAC to output an output voltage. The controller is coupled to the input code terminal and coupled to control the switches. The controller generates an output code based on an input code in response to at least one differential nonlinearity error greater than one least significant bit voltage. The input code corresponds to a first ideal output voltage, the output code corresponds to a second, different ideal output voltage. The controller generates an output voltage by controlling the switches using the output code.

Abstract: A semiconductor device including a first dielectric layer and a second dielectric layer is formed by forming an inhibitor layer over a semiconductor material. The inhibitor layer includes at least silicon and nitrogen. The semiconductor material is heated in an oxygen-containing ambient which oxidizes the inhibitor layer and forms the first dielectric layer which includes the oxidized inhibitor layer, and oxidizes the semiconductor material to form the second dielectric layer. The second dielectric layer is thicker than, the first dielectric layer. The first dielectric layer and the second dielectric layer each include at least 90 weight percent silicon dioxide and less than 1 weight percent nitrogen. The first dielectric layer and the second dielectric layer may be used to form gate dielectric layers for a first MOS transistor and a second MOS transistor that operates at a higher voltage than the first MOS transistor.

Abstract: A method includes determining a charging port mode by receiving a data contact detect (DCD) Complete signal, reducing a voltage on a first data pin of a Universal Serial Bus (USB) connector of a portable device, and determining that a condition is true when a voltage on a second data pin of the USB connector is equal to or greater than 0.8 to 2.0 Volts (V), and is false otherwise. When the condition is true, a first signal is sent on a control circuit output indicating indicate that the PD is connected to a dedicated charging port (DCP) of Divider 0 mode. When the condition is false, a second signal is sent on the control circuit output indicating that the PD is connected to a DCP of 1.2V short mode.

Abstract: A motor control system and method for a brushed direct current (BDC) motor using a compensated and corrected ripple count. Motor control circuitry, for example implemented in digital logic such as a microcontroller, receives a coil current signal and a motor voltage signal. Discontinuities in the coil current signal, are counted to generate a ripple count. An observer function derives an angular frequency model estimate using a computational model for the motor applying motor parameters estimated in an initial estimation interval following startup of the motor. A corrected ripple count is generated based on a comparison of a commutation angle of the motor with an angular position based on the angular frequency model estimate. Compensation for cumulative error over the initial estimation interval is derived from a behavioral motor model applying the estimated motor parameters. A motor drive signal is adjusted based on the compensated corrected ripple count.

Abstract: An example apparatus includes target signal generator circuitry to generate a target signal having a first center frequency and a bandwidth. The example apparatus additionally includes companion signal generator circuitry to generate a companion signal having a second center frequency that is less than (a) the first center frequency adjusted by a first threshold and greater than (b) the first center frequency adjusted by a second threshold, the first threshold being a first multiple of the bandwidth, the second threshold being a second multiple of the bandwidth, the first multiple different than the second multiple. In some examples, the example apparatus includes adder circuitry to combine the target signal and the companion signal to form a composite signal. Additionally, the example apparatus includes transmitter circuitry to transmit the composite signal to a target device.

Abstract: A low noise amplifier for an RF sampling analog front end. The amplifier includes digital step attenuation for applying a selected attenuation to signals received at an input node, and a gain stage coupled to amplify the attenuated signal from the digital step attenuation circuit. In a differential amplifier implementation, a first input capacitor is coupled between a positive side input node and an output of the negative side digital attenuation circuit, and a second input capacitor is coupled between a negative side input node and an output of the positive side digital step attenuation circuit. In some embodiments, variable feedback circuits are coupled between each input node and an output of the corresponding gain stage, to selectively apply active termination at the input at high gain settings of the amplifier. Variable input and output resistors, and programmable noise filtering at the output, are provided in some embodiments.

Abstract: A method of operating a mesh network is disclosed. The method includes joining a network as a child of a parent node and receiving a downlink broadcast channel from the parent node. The method further includes setting the downlink broadcast channel as an uplink broadcast channel in response to the step of receiving.

Abstract: In some examples, a circuit includes a phase frequency detector (PFD) having a first input, a second input, and an output. The circuit also includes a control circuit having an input and an output, the control circuit input coupled to the output of the PFD. The circuit also includes a modulation circuit having an input and an output, the modulation circuit input coupled to the output of the control circuit. The circuit also includes an oscillator having an oscillator input and an oscillator output, the oscillator input coupled to the output of the modulation circuit and the output of the oscillator coupled to the second input of the PFD.

Abstract: A method for allocating resources for a scheduling request indicator (SRI) is disclosed. An SRI cycle period for use by user equipment (UE) within a cell is transmitted from a NodeB in a cell to UE within the cell. The NodeB transmits a specific SRI subframe offset and an index value to the particular UE within the cell. The specific SRI subframe offset and the index value enable the UE to determine a unique combination of cyclic shift, RS orthogonal cover, data orthogonal cover, and resource block number for the UE to use as a unique physical resource for an SRI in the physical uplink control channel (PUCCH).

Abstract: User equipment (UE)—initiated accesses within a cellular network are optimized to account for cell size and to reduce signaling overhead. A fixed set of preamble parameter configurations for use across a complete range of cell sizes within the cellular network is established and stored within each UE. A UE located in a given cell receives a configuration number transmitted from a nodeB serving the cell, the configuration number being indicative of a size of the cell. The UE selects a preamble parameter configuration from the fixed set of preamble parameter configurations in response to the received configuration number and then transmits a preamble from the UE to the nodeB using the preamble parameter configuration indicated by the configuration number.

Abstract: In one example, an apparatus comprises a power stage having a first power stage input, a second power stage input, and a power stage output. The apparatus also comprises a modulator circuit having a first ramp input, a second ramp input, a modulator input, a first modulator output, and a second modulator output, the first modulator output coupled to the first power stage input, and the second modulator output coupled to the second power stage input. The apparatus also comprises a multi-level ramp generator having a first ramp output and a second ramp output, the first ramp output coupled to the first ramp input, and the second ramp output coupled the second ramp input.

Abstract: In one example, an apparatus comprises: a first switch and a second switch coupled between a fuse terminal and a ground terminal, the first switch having a first switch control terminal, the second switch having a second switch control terminal; and a driver circuit having a control input, a first control output, and a second control output, the control input coupled to the fuse terminal, the first control output coupled to the first switch control terminal, and the second control output coupled to the second switch control terminal.

Abstract: A wafer probe test system having a probe card with a probe head, a rotary magnet, a magnetic sensor positioned to sense the magnetic field of the rotary magnet and a controller coupled to the probe card, where the probe head has probe needles to engage features of test sites of a wafer in a wafer plane of orthogonal first and second directions, and the rotary magnet is rotatable around an axis of a third direction to provide a magnetic field to the wafer, in which the controller includes a model of magnetic flux density in the first, second and third directions at the respective test sites of the wafer as a function of a rotational angle of the rotary magnet, a probe needle height along the third direction and a measured magnetic flux density of the magnetic sensor.

Abstract: A delta-sigma modulator includes a first integrator and a comparator. The comparator's positive input couples to the first integrator's positive output, and the comparator's negative input couples to the first integrator's negative output. A first current DAC comprises a current source device, and first and second transistors. The first transistor has a first transistor control input and first and second current terminals. The first current terminal couples to the current source device, and the second current terminal couples to the first integrator positive output. The second transistor has a second transistor control input and third and fourth current terminals. The third current terminal couples to the current source device, and the fourth current terminal couples to the first integrator negative output. A first capacitive device couples to the second transistor control input and to both the second current terminal and the first integrator positive output.

Abstract: A device includes a scan chain including a plurality of storage elements and an output buffer; a shadow shift register having a shadow shift input coupled to a scan output of one of the storage elements of the scan chain; a signature register; and a comparator having a first input, a second input, and an output. The comparator first input is to receive a value of the shadow shift register, and the comparator second input is to receive a value of the signature register. The output buffer has a control input coupled to the comparator output, and the output buffer provides a high-impedance output responsive to the value of the shadow shift register being unequal to the value of the signature register.

Abstract: An output stage of an operational amplifier includes a low voltage (LV) metal oxide semiconductor (MOS) device and a dynamic current limit circuit. An output current of the operational amplifier flows through the LV MOS device. The dynamic current limit circuit is configured to sense a drain voltage of the LV MOS device and increase a clamping voltage for the LV MOS device when the drain voltage of the LV MOS device is less than a threshold voltage.

Abstract: A microelectronic device includes a substrate a platinum-containing layer over the substrate. The platinum-containing layer includes a first segment and a second segment adjacent to the first segment, and has a first surface and a second surface opposite the first surface closer to the substrate than the first surface. A first spacing between the first segment and the second segment at the first surface is greater than a second spacing between the first segment and the second segment at the second surface. A width of the first segment along the first surface is less than twice a thickness of the first segment, and the second spacing is less than twice the thickness of the first segment.