Patents Assigned to Tokyo Electron Yamanashi Limited
  • Patent number: 5636960
    Abstract: An apparatus according to the present invention includes a cassette in which a plurality of substrates are stored, a contact guide member provided to face a side surface of the cassette, and pressing end surfaces of substrates stored in the cassette, an alignment device for moving the contact guide member to approach the cassette, and pressing the contact guide member against the end surfaces of the substrates in the cassette, thereby aligning the substrates all at one pressing time, and detectors, provided for the alignment device at positions corresponding to spaces of substrates held in the cassette, in the same or multiple number of the spaces for holding substrates, for detecting whether or not a substrate is present in each of the spaces for holding the substrates of the cassette.
    Type: Grant
    Filed: February 15, 1995
    Date of Patent: June 10, 1997
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited, TEL Engineering Limited
    Inventors: Tutomu Hiroki, Shoichi Abe, Kiyotaka Akiyama, Tsutomu Satoyoshi
  • Patent number: 5625526
    Abstract: An electrostatic chuck of this invention includes a conductive film, an insulating coat formed on a susceptor to cover the conductive film, and a feeder circuit for applying a voltage to the conductive film to cause the insulating coat to generate an electrostatic attractive force. The feeder circuit includes a connecting conductor replacing a portion of the insulating coat to be electrically connected to the conductive film, a first feeder pin extending through the susceptor from its front surface side to its rear surface side and having one end portion electrically connected to the connecting conductor, an insulating member for insulating the first feeder pin from the susceptor, a second feeder pin having one end portion pressed against the other end portion of the first feeder pin to be electrically connected to the first feeder pin, and a power supply electrically connected to the second feeder pin.
    Type: Grant
    Filed: June 1, 1994
    Date of Patent: April 29, 1997
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Masahide Watanabe, Masami Kubota, Shiro Koyama, Kenji Ishikawa, Kouichi Kazama, Mitsuaki Komino, Takanori Sakurai
  • Patent number: 5622593
    Abstract: A plasma processing apparatus comprises a first passage opened in a top of suscepter at a peripheral area thereof, a first gas supply source for supplying heat exchange gas into a small clearance between the suscepter and a wafer through the first passage, a first vacuum pump for exhausting the clearance through the first passage, a second passage opened in the top of the suscepter at a center area thereof, a second gas supply source for supplying heat exchange gas into the clearance through the second passage, a second vacuum pump for exhausting the clearance through the second passage, and a controller for controlling the first and second gas supply sources and the first and second vacuum pumps independently of the others in such a way that backpressure caused in the second passage by the second gas supply source and vacuum pump can become lower than backpressure caused in the first passage by the first gas supply source and vacuum pump.
    Type: Grant
    Filed: June 5, 1996
    Date of Patent: April 22, 1997
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Masashi Arasawa, Katsuhiko Ono, Hiroshi Nishikawa, Kazuo Tsuchiya
  • Patent number: 5611655
    Abstract: A vacuum process apparatus includes a convey chamber having a plurality of loading/unloading ports and an airtight structure kept in a vacuum when a target object is conveyed, at least one preliminary vacuum chamber connected to the convey chamber through a loading/unloading port, a plurality of vacuum process chambers connected to the convey chamber through the loading/unloading ports and each having a vacuum process mechanism, a plurality of gate valves for opening/closing the plurality of loading/unloading ports, and a multi-joint arm member, arranged in the convey chamber, for conveying the target object between the convey chamber and the vacuum process chambers, and between the convey chamber and the preliminary chamber. The convey chamber is evacuated through a bearing for a pivot shaft of the multi-joint arm member.
    Type: Grant
    Filed: January 4, 1996
    Date of Patent: March 18, 1997
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Yoshio Fukasawa, Shozo Hosoda, Tatsuya Nakagome, Takashi Tozawa, Koji Suzuki, Yasumasa Ishihara, Minoru Aoyagi, Mahito Kajihara
  • Patent number: 5604443
    Abstract: A probe test apparatus comprising a test section for testing a wafer, a cassette having an opening at one side through which the wafer is taken into and out of the cassette, grooves formed in inner faces of both sides of the cassette to hold wafers therein, and a convex member projected downward from the underside of the cassette, a stage on which the cassette is mounted keeping the wafers therein substantially horizontal, and holder members projected upward from the top of the cassette-mounted stage and having a recess into which the convex member of the cassette falls, wherein when the convex member is not fitted into the recess but contacted with the holder members, the wafers in the cassette are tilted and when it is fitted into the recess, they can be kept substantially horizontal in the cassette to thereby position the cassette relative to the test section.
    Type: Grant
    Filed: May 23, 1995
    Date of Patent: February 18, 1997
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Yoshisuke Kitamura, Munetoshi Nagasaka
  • Patent number: 5604446
    Abstract: The probe apparatus for a semiconductor wafer has a work table on which a wafer is placed. A printed wiring board having a high rigidity is situated above the work table. A flexible membrane probe card is detachably mounted on the printed wiring board. The probe card has a main region in which contact elements to be brought into contact with electrode pads of the semiconductor wafer are arranged. A rigid rectangular frame is attached to the rear surface of the probe card so as to flatten the probe card. An expandable chamber for bringing the contact elements of the main region into elastic contact with the electrode pads of the semiconductor wafer, is provided behind the main region of the probe card. A guide is arranged to surround the expandable chamber in tight contact therewith. A pushing plate having a hard base and elastic layers is arranged between the expandable chamber and the probe card. The main region is pushed out by the pushing plate in a state parallel to the wafer.
    Type: Grant
    Filed: August 9, 1995
    Date of Patent: February 18, 1997
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventor: Kunio Sano
  • Patent number: 5594357
    Abstract: A testing apparatus has a probe card having a plurality of first contact elements to be put in contact with an object to be tested, and a plurality of electrodes electrically connected with the first contact elements, a test head to be shifted between a retreat position and a test position, for performing electrical measurement of the object in the test position, a cylindrical connection unit, having a plurality of second contact elements to be put in contact with the electrodes of the probe card in the test position, for electrically connecting the probe card with the test head, the connection member being movably supported by the test head, a head plate for supporting the probe card, a driving mechanism for moving the probe card between a test position near the head plate and a wait position away from the head plate, and a movement limiting member for limiting movement of the connection member towards the test head and applying a pressing force to the connection member and the probe card via the second cont
    Type: Grant
    Filed: December 6, 1995
    Date of Patent: January 14, 1997
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventor: Hisashi Nakajima
  • Patent number: 5593540
    Abstract: The present invention provides a plasma etching system, comprising a process chamber enclosing a plasma, means for evacuating said process chamber, a chuck electrode for supporting a substrate, a shower electrode positioned to face said chuck electrode and provided with a large number of small holes, a power source for applying a plasma voltage between the chuck electrode and said shower electrode, gas supply means communicating with said small holes of the shower electrode for supplying a plasma-forming gas into the process chamber through the small holes, and means for controlling said gas supply means such that said plasma-forming gas flows through said small holes at a mass flow rate of at least 620 kg/m.sup.2 /hr.
    Type: Grant
    Filed: April 27, 1995
    Date of Patent: January 14, 1997
    Assignees: Hitachi, Ltd., Hitachi Tokyo Electronics Co., Ltd., Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Kazushi Tomita, Yoshikazu Ito, Motohiro Hirano, Akira Nozawa, Hiromitsu Matsuo, Shunichi Iimuro, Shigeki Tozawa, Yutaka Miura
  • Patent number: 5585738
    Abstract: A probe system tests the electrical characteristics of chips arranged in a matrix on a semiconductor wafer. An XYZ stage movable in the directions of three-dimensional axes is disposed under a probe card having probes to be brought into contact with the electrode pads of the chips. A wafer table rotatable within a horizontal plane is disposed on the XYZ stage. A first image pickup means for picking up the probe images is mounted on the XYZ stage. A second image pickup means for picking up a wafer image is disposed above the table. The second image pickup means is movable horizontally to and from a use position under the probe card. A target is supported and moved by a driving member mounted on the XYZ stage, for aligning the focal points and optical axes of the first and second image pickup means. The target is moved between forward and retreat positions within and outside the field of view of the first image pickup means.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: December 17, 1996
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Motohiro Kuji, Haruhiko Yoshioka, Shinji Akaike, Shigeaki Takahashi
  • Patent number: 5578164
    Abstract: An apparatus for subjecting a semiconductor wafer having an uncovered marginal portion, from which a photoresist film is removed, to an anisotropic etching. The apparatus comprises a process chamber which can be set to a vacuum. Upper and lower electrodes opposite to each other are provided in the process chamber. An etching gas is made into plasma between these electrodes. An electrostatic chuck is arranged on the lower electrode. A wafer is mounted on the electrostatic chuck. A ring made of dielectric material, movable upward and downward, is arranged between the electrodes. A central portion of the ring is formed as a hood having a recessed shape corresponding to the marginal portion of the wafer. During the etching, the hood covers the marginal portion of the wafer under a plasma sheath, so as to be out of contact with the wafer, thereby preventing the marginal portion of the wafer from being etched.
    Type: Grant
    Filed: December 23, 1994
    Date of Patent: November 26, 1996
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Yoichi Kurono, Shigeki Tozawa, Shozo Hosoda
  • Patent number: 5568054
    Abstract: A probe apparatus having a burn-in test function includes an apparatus body, a probe card, having a plurality of probes, for causing the plurality of probes to electrically contact a semiconductor wafer, a tester for measuring the electrical characteristics of the semiconductor wafer, heating and cooling mechanisms for applying a thermal stress to test target chips, as targets of the burn-in test, of the semiconductor wafer, and an electrical mechanism for applying an electrical stress to the chips.
    Type: Grant
    Filed: May 19, 1995
    Date of Patent: October 22, 1996
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Shinji Iino, Itaru Iida
  • Patent number: 5565114
    Abstract: This invention provides an end point detection method including the steps of sequentially detecting, when a process using a plasma is performed for an object to be processed, emission spectra in a specific wavelength band of an active species in the plasma by using a photodetector, calculating sum average values of emission intensities of the emission spectra, calculating the ratio or the difference between the sum average values to obtain a calculated value, and determining a point at which the calculated value exceeds a predetermined reference value as an end point of the process.
    Type: Grant
    Filed: August 23, 1994
    Date of Patent: October 15, 1996
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Susumu Saito, Chishio Koshimizu, Kazuo Eguchi
  • Patent number: 5560804
    Abstract: In plasma-etching a polysilicon layer of a semiconductor wafer where the polysilicon layer is formed on an SiO.sub.2 film, plasma of a processing gas including a halogen element containing gas and a gas containing oxygen or nitrogen is generated, and a predetermined portion of the polysilicon layer is selectively exposed in plasma, thereby etching the portion.
    Type: Grant
    Filed: January 30, 1995
    Date of Patent: October 1, 1996
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Fumihiko Higuchi, Yoshio Fukasawa
  • Patent number: 5558482
    Abstract: A vacuum-process system comprising plural vacuum-process chambers in which substrates are processed in decompressed atmosphere, a first load lock chamber communicated with each of the vacuum-process chambers and exhausted to substantially same decompressed atmosphere as in the vacuum-process chambers, a second load lock chamber communicated with the first one and exhausted to substantially same atmosphere as in the first load lock chamber, a first carrier arranged in the first load lock chamber to carry the substrate between the first and the second load lock chamber, a first buffer assembly arranged in the first load lock chamber to temporarily hold plural substrates thereon, a second buffer assembly arranged in the second load lock chamber to temporarily hold plural substrates thereon, an assembly in the second load lock chamber to position single or plural substrates relative to their passage, and a second carrier arranged in normal atmosphere to carry plural substrates into and out of the second load lock
    Type: Grant
    Filed: February 25, 1994
    Date of Patent: September 24, 1996
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Tutomu Hiroki, Shoichi Abe, Kiyotaka Akiyama
  • Patent number: 5547539
    Abstract: A plasma processing apparatus comprises a first passage opened in a top of suscepter at a peripheral area thereof, a first gas supply source for supplying heat exchange gas into a small clearance between the suscepter and a wafer through the first passage, a first vacuum pump for exhausting the clearance through the first passage, a second passage opened in the top of the suscepter at a center area thereof, a second gas supply source for supplying heat exchange gas into the clearance through the second passage, a second vacuum pump for exhausting the clearance through the second passage, and a controller for controlling the first and second gas supply sources and the first and second vacuum pumps independently of the others in such a way that backpressure caused in the second passage by the second gas supply source and vacuum pump can become lower than backpressure caused in the first passage by the first gas supply source and vacuum pump.
    Type: Grant
    Filed: December 22, 1994
    Date of Patent: August 20, 1996
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Masashi Arasawa, Katsuhiko Ono, Hiroshi Nishikawa, Kazuo Tsuchiya
  • Patent number: 5539274
    Abstract: An electron beam excited plasma system is provided with a first auxiliary electrode for initial discharge, an anode having an opening, a cathode, having an opening and located between the anode and the first auxiliary electrode, for producing an initial discharge between the first auxiliary electrode and the cathode, and for producing a plasma-generating discharge between the anode and the cathode, a second auxiliary electrode, having an opening and located between the cathode and the anode, for facilitating the generation of the discharge plasma between the cathode and the anode, a gas supply device for supplying a discharge plasma-generating gas into the region between the cathode and the anode, and magnetic field generator for generating a magnetic field and for applying this magnetic field to the region between the cathode and the anode, such that a cusp magnetic field is generated in the vicinity of the cathode.
    Type: Grant
    Filed: September 7, 1994
    Date of Patent: July 23, 1996
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Youichi Araki, Kazuya Nagaseki, Shuji Mochizuki
  • Patent number: 5525911
    Abstract: A probe card is electrically connected to a tester, electrically contacted and connected to circuits to be tested, and used to transmit test signals between the tester and the circuits. It includes a plate assembly having a printed board and an earth plate insulated from each other. Probe assemblies are supported by the plate assembly and are substantially vertically contacted at their foremost ends with pads of the circuits to be tested. Each probe assembly includes a center conductor having a sharpened tip contacted with the pad of the circuit to be tested. A holder conductor shrouds the center conductor while leaving the front end portion thereof not enclosed, and having electrical continuity with the center conductor. A dielectric shrouds the holder conductor, a peripheral conductor coaxially arranged around the holder conductor with the dielectric interposed between them, and a sheath enclosing the peripheral conductor.
    Type: Grant
    Filed: August 4, 1994
    Date of Patent: June 11, 1996
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited, Junkosha Co., Ltd.
    Inventors: Hiroshi Marumo, Satoru Yamashita, Nobuyuki Negishi, Shoichi Kanai
  • Patent number: 5521523
    Abstract: A probe card assembly thermal influenced from a wafer with which a probe makes contact during a probe test. The assembly includes a probe card unit having a great number of probes to be brought into contact with the wafer to be tested, and a holder for holding the probe card unit at a center portion thereof. The holder includes a ring member, supported by another member, for supporting the probe card unit from a low side, and a cutout stepped member and a slot hole for relaxing stress due to thermal expansion concentrated on the ring member.
    Type: Grant
    Filed: December 14, 1993
    Date of Patent: May 28, 1996
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Hidetoshi Kimura, Tetsuya Utsunomiya, Chiaki Mochizuki
  • Patent number: 5521522
    Abstract: There is provided a probe apparatus with a stage for holding a wafer on which a plurality of chips are regularly arranged such that the chips are arranged substantially in an XY plane, a large number of contactors facing the wafer held on the stage, provided to corresponding to respective pads of the chips such as to be brought into contact collectively with the pads of all the device circuits on the wafer, tester for transmitting/receiving a test signal to/from the device via the contactors, elevator device for elevating the stage in a Z-axis direction, alignment device for moving the stage in an X-axis and/or Y-axis direction, and controller for controlling the alignment device and the elevator device.
    Type: Grant
    Filed: November 12, 1993
    Date of Patent: May 28, 1996
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Yuichi Abe, Masao Yamaguchi, Munetosi Nagasaka
  • Patent number: 5514425
    Abstract: A thin film-forming method according to the present invention is characterized by comprising the steps of introducing TiCl.sub.4, hydrogen, nitrogen and NF.sub.3 into a film-forming chamber containing a semiconductor substrate (1) having a groove made in its surface, after the chamber has been evacuated to 10.sup.-4 Torr or less; and converting these gases into plasma, thereby forming a thin TiN film on only that portion of the groove which is other than the wall surfaces of the groove.
    Type: Grant
    Filed: March 6, 1995
    Date of Patent: May 7, 1996
    Assignees: Kabushiki Kaisha Toshiba, Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Hitoshi Ito, Kyoichi Suguro, Nobuo Hayasaka, Haruo Okano, Shinji Himori, Kazuya Nagaseki, Syuji Mochizuki