Patents Assigned to Tokyo Electron Yamanashi Limited
  • Patent number: 5509771
    Abstract: A vacuum processing apparatus in which LCD substrates are processed includes three process chambers. Each of the process chambers is connected to a first load lock chamber through a gate valve. A second load lock chamber is also connected to the first load lock chamber through a gate valve. The second load lock chamber is opposed to a carrier member, which is arranged in the atmosphere, through a gate valve. A carrier arm is arranged in the first load lock chamber to carry the substrates between each of the process chambers and the second load lock chamber. A buffer rack for supporting two substrates thereon and positioners for aligning the two substrates, which are supported on the buffer rack, simultaneously are arranged in the second load lock chamber.
    Type: Grant
    Filed: July 28, 1993
    Date of Patent: April 23, 1996
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventor: Tutomu Hiroki
  • Patent number: 5506512
    Abstract: A prober for a semiconductor wafer includes a main body having an interface section connected to probe needles, a test head detachably attached to the interface section, and a manipulator for moving the test head. The manipulator includes X-, Y-, Z-, .theta.X-, .theta.Y-, and .theta.Z-positioning mechanisms for positioning the test head in six directions. The Z-positioning mechanism consists of an elevator which is installed on a base and drives a slide frame. A fall preventing mechanism is provided adjacent to the elevator. The fall preventing mechanism includes a nut of a ball thread provided on the slide frame, and a shaft of the ball thread which is engaged with the nut. A brake shoe is provided at the lower end of the shaft. A brake seat is provided on the base and faces the lower surface of the brake shoe. A ball pushed by a spring is in point-contact with the center of the lower surface of the brake shoe, so that a small gap is formed between the brake shoe and the brake seat.
    Type: Grant
    Filed: November 23, 1994
    Date of Patent: April 9, 1996
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Noboru Tozawa, Hisashi Nakajima, Kazuhito Yokomori
  • Patent number: 5489853
    Abstract: A testing apparatus has a probe card having a plurality of first contact elements to be put in contact with an object to be tested, and a plurality of electrodes electrically connected with the first contact elements, a test head to be shifted between a retreat position and a test position, for performing electrical measurement of the object in the test position, a cylindrical connection unit, having a plurality of second contact elements to be put in contact with the electrodes of the probe card in the test position, for electrically connecting the probe card with the test head, the connection member being movably supported by the test head, a head plate for supporting the probe card, a driving mechanism for moving the probe card between a test position near the head plate and a wait position away from the head plate, and a movement limiting member for limiting movement of the connection member towards the test head and applying a pressing force to the connection member and the probe card via the second cont
    Type: Grant
    Filed: May 19, 1994
    Date of Patent: February 6, 1996
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventor: Hisashi Nakajima
  • Patent number: 5461327
    Abstract: A probe apparatus tests the electrical characteristics of chips formed on a semiconductor wafer by bringing probes into contact with pads of each chip. The probes, which include ones for power supply potentials, signals, and ground potential, are mounted vertically penetrating a ring block which is attached to the center of a main PCB of a probe card. A tray containing a number of fuses is mounted over the probe card by means of struts. The fuses in the tray connect wires of the main PCB, to which the supply potential of a DC power source is applied, and their corresponding probes. The fuses and the tray can be collectively removed from the probe card to be replaced with new ones.
    Type: Grant
    Filed: August 31, 1993
    Date of Patent: October 24, 1995
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Junichiro Shibata, Hiroshi Marumo, Gakuji Sasamoto
  • Patent number: 5445709
    Abstract: A parallel-plate plasma etching apparatus includes a susceptor electrode and a shower electrode which are arranged in a process chamber. A semiconductor wafer is placed on the susceptor electrode. A shower region defined by a plurality of process gas supply holes is formed in the shower electrode. The shower electrode is cooled by a cooling block and causes an effective electrode portion of the shower electrode to have a temperature gradient such that a temperature at the central portion of the effective electrode portion is lower than a temperature at the peripheral portion of the effective electrode portion. The diameter of the shower region is selected to be smaller than the diameter of the wafer by 5 to 25% such that degradation of planar uniformity of a degree of etching anisotropy on the wafer caused by the temperature gradient of the effective electrode portion is compensated for.
    Type: Grant
    Filed: November 19, 1993
    Date of Patent: August 29, 1995
    Assignees: Hitachi, Ltd., Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Masayuki Kojima, Yoshikazu Ito, Kazuhsi Tomita, Shigeki Tozawa, Shunichi Iimuro, Masashi Arasawa, Eiichi Nishimura
  • Patent number: 5423936
    Abstract: The present invention provides a plasma etching system, comprising a process chamber enclosing a plasma, means for evacuating said process chamber, a chuck electrode for supporting a substrate, a shower electrode positioned to face said chuck electrode and provided with a large number of small holes, a power source for applying a plasma voltage between the chuck electrode and said shower electrode, gas supply means communicating with said small holes of the shower electrode for supplying a plasma-forming gas into the process chamber through the small holes, and means for controlling said gas supply means such that said plasma-forming gas flows through said small holes at a mass flow rate of at least 620 kg/m.sup.2 /hr.
    Type: Grant
    Filed: October 19, 1993
    Date of Patent: June 13, 1995
    Assignees: Hitachi, Ltd., Hitachi Tokyo Electronics, Co., Ltd., Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Kazushi Tomita, Yoshikazu Ito, Motohiro Hirano, Akira Nozawa, Hiromitsu Matsuo, Shunichi Iimuro, Shigeki Tozawa, Yutaka Miura
  • Patent number: 5412329
    Abstract: A probe card used in a probing test machine which send and receive test signals into circuits through pads of a semiconductor chip, thereby examining the electrical characteristics of the circuits. The probe card comprises a supporting plate, a flexible printed circuit base including a flexible film base material supported by the supporting plate, circuits printed on the film base material being connected electrically to a tester, contactors connected electrically to the printed circuits and adapted to be brought into contact with the pads in equally corresponding relation, and a cushioning medium designed so as to back up a section in which the contactors are mounted. When the contactors are brought into contact with the pads, individually, the cushioning medium undergoes an elastic deformation, so that the contact between the contactors and the pads is improved.
    Type: Grant
    Filed: July 26, 1994
    Date of Patent: May 2, 1995
    Assignee: Tokyo Electron Yamanashi Limited
    Inventors: Shinji Iino, Tamio Kubota, Keiichi Yokota
  • Patent number: 5410259
    Abstract: A probe apparatus comprises a test head for electrically testing a chip of a semiconductor wafer, a probe card having a plurality of probe needles electrically connected to the test head, a table plate for supporting the semiconductor wafer such that the semiconductor wafer faces the probe card, a CCD camera for detecting heights at predetermined two pairs of points on the probe card and outputting signals corresponding to the heights, and three leg members for driving the table plate such that the semiconductor wafer supported by the table plate is parallel to the probe card, on the basis of distances between the two pairs of points in X- and Y-directions which are obtained from X- and Y-directional movement amounts of the table plate.
    Type: Grant
    Filed: June 1, 1993
    Date of Patent: April 25, 1995
    Assignees: Tokyo Electron Yamanashi Limited, Tokyo Electron Limited
    Inventors: Hitoshi Fujihara, Itaru Takao
  • Patent number: 5404111
    Abstract: A probe apparatus which has a probe card having a plurality of probes, a wafer holder located above or beside the probe card, for holding a wafer to be examined, a tester head electrically connected to the probes of the probe card, a tester electrically connected to the tester head, for detecting electrical characteristics of the wafer from the data output from the wafer, and a CCD camera arranged to oppose the object, for detecting the position of the wafer.
    Type: Grant
    Filed: June 17, 1993
    Date of Patent: April 4, 1995
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Shigeoki Mori, Wataru Karasawa, Hitoshi Fujihara, Masaru Suzuki, Keiichi Yokota
  • Patent number: 5399983
    Abstract: A semiconductor probe method and apparatus for avoiding collision between probe and semiconductor. A method of the present invention includes the step of setting a probe card adjacent a semiconductor wafer which is to be tested. A reading location data step then reads semiconductor wafer location data. A high speed advancing step then moves the probe card and semiconductor wafer together at a sufficiently high speed. A low speed advancing step then moves the probe card and semiconductor wafer together at a low speed. Finally, a detecting step detects when probe card needles contact the semiconductor wafer, at which point, the engaging operation is stopped and contact point data is stored in memory. A probe apparatus includes a probe card holder for supporting a probe card including probe needles. A memory element is arranged on the probe card and contains data of the position of the probe needles.
    Type: Grant
    Filed: June 22, 1994
    Date of Patent: March 21, 1995
    Assignee: Tokyo Electron Yamanashi Limited
    Inventor: Yasushi Nagasawa
  • Patent number: 5382311
    Abstract: A plasma etching apparatus for a semiconductor wafer includes a susceptor arranged in a vacuum process chamber. A groove for flowing a heat transfer gas is formed in the mounting surface of the susceptor. The groove includes an annular groove portion formed along the peripheral edge of the mounting surface, and a gas path vertically extending through the susceptor is connected to the annular groove portion. A sheet-like electrostatic chuck is airtightly adhered to the mounting surface of the susceptor to cover the groove. A plurality of through holes are formed in the electrostatic chuck, and these holes are arranged along an above the groove. The heat transfer gas is supplied between the electrostatic chuck and the semiconductor wafer through the gas path, the groove, and the through holes. The heat transfer gas contributes to transfer of cold from a liquid nitrogen source arranged under the susceptor to the wafer.
    Type: Grant
    Filed: December 17, 1993
    Date of Patent: January 17, 1995
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Kenji Ishikawa, Mitsuaki Komino, Tadashi Mitui, Teruo Iwata, Izumi Arai, Yoshifumi Tahara
  • Patent number: 5378971
    Abstract: A probe is formed of an Au--Cu alloy essentially consisting of 74 to 76 parts by weight of gold and 24 to 26 parts by weight of copper, by a process comprising the steps of heating the alloy to at least 350.degree. C. and gradually cooling the heated alloy to the room temperature in at least 5 hours.
    Type: Grant
    Filed: August 19, 1993
    Date of Patent: January 3, 1995
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventor: Satoru Yamashita
  • Patent number: 5376212
    Abstract: A reduced-pressure processing apparatus which comprises a wafer table, two processing chambers, and three load-locking chambers. The wafer table temporarily supports a workpiece. In the first processing chamber, a first process is performed on a workpiece under a reduced pressure, In the second processing chamber, a second process is performed on the workpiece under a reduced pressure. The first load-locking chamber is connected to the first processing chamber, for allowing to be pneumatically disconnected from the first processing chamber, and allowing a passage of a workpiece into and from the first processing chamber and to and from the temporary holding means. The second load-locking chamber is connected to the second processing chamber, for allowing to be pneumatically disconnected from the second processing chamber, and allowing a passage of a workpiece into and from the second processing chamber and to and from the temporary supporting means.
    Type: Grant
    Filed: February 18, 1993
    Date of Patent: December 27, 1994
    Assignee: Tokyo Electron Yamanashi Limited
    Inventor: Kazuyoshi Saiki
  • Patent number: 5374147
    Abstract: A device for transferring a LCD substrate under a reduced pressure atmosphere comprises a first stage on which the LCD substrate is mounted such that the surface of the LCD substrate is substantially horizontal, a multi-joint arm mechanism for mounting the LCD substrate on a second stage of a delivery position after moving the first stage in substantially horizontal plane, a mechanism for pushing the LCD substrate on the first and second stages, and for positioning the LCD substrate at a home position.
    Type: Grant
    Filed: September 10, 1992
    Date of Patent: December 20, 1994
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Tsutomu Hiroki, Teruo Asakawa
  • Patent number: 5368684
    Abstract: A magnetron discharge is generated by a high-frequency electric field and a magnetic field perpendicular to the electric field to generate a plasma of an etching gas, and an object to be processed having a silicon-containing layer represented by a polysilicon layer is exposed in the plasma to etch the silicon-containing layer. In this case, the etching gas mainly contains an HBr gas, a gas mixture of HBr and Cl.sub.2 gases, a gas mixture of HBr and HCl gases, or a gas obtained by adding an oxygen-containing gas such as an O.sub.2 gas to each of these gases.
    Type: Grant
    Filed: December 18, 1992
    Date of Patent: November 29, 1994
    Assignees: Tokyo Electron Limited, Tokyo Electron Yamanashi Limited
    Inventors: Yoshio Ishikawa, Hiroshi Kojima, Masahito Hiratuka
  • Patent number: 5342471
    Abstract: A plasma processing apparatus having a pair of electrodes which are installed alternately in parallel in a chamber and in which an object to be processed is placed at one electrode thereof, radiofrequency applying device for applying radiofrequency power between the pair of electrodes, cooling device for cooling the object, drying-gas introducing tube for supplying a drying gas into the chamber, and dropwise-condensation preventing member installed at a portion of the chamber so as to be in contact with the outer atmosphere. The apparatus can prevent dropwise condensation at the time of cooling and at the same time prevent the occurrence of radiofrequency leakage.
    Type: Grant
    Filed: April 20, 1992
    Date of Patent: August 30, 1994
    Assignee: Tokyo Electron Yamanashi Limited
    Inventors: Kazuo Fukasawa, Masachika Suetsugu
  • Patent number: 5325052
    Abstract: A probe apparatus comprises a vertically movable table for placing a semiconductor wafer having semiconductor devices, a heater for heating the wafer at a predetermined temperature, and a probe card located above the wafer and having support and positioning portions for probes. The probe has a vertical portion which extends downward substantially vertically, and is capable of buckling. Two positioning plates are supported by the support positioning portion through which the vertical portions of said probes are downwardly extended wherein a temperature controller heats the probes at the positioning plates at a predetermined temperature.
    Type: Grant
    Filed: September 11, 1992
    Date of Patent: June 28, 1994
    Assignee: Tokyo Electron Yamanashi Limited
    Inventor: Satoru Yamashita
  • Patent number: 5323106
    Abstract: A device for testing semiconductor devices includes a group of probes arranged to correspond to at least a row of electrode terminals which are formed on each of the semiconductor devices, a printed plate having an opening in which the semiconductor device is positioned and a conductive pattern, four guide members made of insulating material and having a face on which a plurality of grooves are formed to hole and arrange the probes at the same pitch as that of the electrode terminals, and a positioning member and an upper guide which position the guide members relative to the semiconductor device and the printed plate to electrically and detachably contact the probes with the electrode terminals and the conductive lines along the rim of the opening of the printed plate.
    Type: Grant
    Filed: May 22, 1992
    Date of Patent: June 21, 1994
    Assignee: Tokyo Electron Yamanashi Limited
    Inventor: Takeshi Saegusa
  • Patent number: 5321352
    Abstract: A probe apparatus for measuring electrical characteristics of chips arranged on a wafer comprises a probe card having probe needles and a rotary chuck for supporting the wafer. The chuck is supported on an XY stage. A stationary alignment bridge is provided with a stationary camera and a capacitance sensor. The stage is provided with a movable camera. A transparent plate on which a target is formed is attached to the chuck. The target and its peripheral portion are formed of transparent thin films. The target is used for positioning and focusing of the cameras. The thin films are used for height detection by use of the capacitance sensor.
    Type: Grant
    Filed: July 31, 1992
    Date of Patent: June 14, 1994
    Assignee: Tokyo Electron Yamanashi Limited
    Inventor: Ryuichi Takebuchi
  • Patent number: D363464
    Type: Grant
    Filed: February 26, 1993
    Date of Patent: October 24, 1995
    Assignee: Tokyo Electron Yamanashi Limited
    Inventor: Kazuo Fukasawa