Patents Assigned to Ultratech
  • Publication number: 20230302768
    Abstract: A liquid-absorbing, liquid barrier bag comprising a liquid-permeable envelope within which a super-absorbent material in powder or granular form is disposed, the absorbent material being characterized in that it greatly increases in volume upon liquid absorption. The super-absorbent material is adhered to one or more of the inner surfaces of the liquid-permeable envelope such that the desired distribution and pattern is maintained during handling, shipping and activation of the liquid-absorbing. Upon contact with liquid, such as by soaking the bag in water, the super-absorbent material releases from the inner surfaces and swells to create a three-dimensional body suitable for stacking to form a liquid-impermeable barrier wall.
    Type: Application
    Filed: March 24, 2023
    Publication date: September 28, 2023
    Applicant: Ultratech International, Inc.
    Inventors: Mark D. Shaw, Paul Sander
  • Patent number: 11600949
    Abstract: An assembly (10) includes a first connector (12), and a second connector (14) mobile in axial translation relative to the first connector, a first part (16) attached to the first connector, and a first sleeve (18) axially rotatable relative to the first part between a first plurality of positions, a first blocking device (20) blocking the first sleeve, a second part (22) attached to the second connector, and a second sleeve (24) axially rotatable relative to the second part between a second plurality of positions, a second blocking device (26) blocking the second sleeve. The first sleeve, the first part, the second sleeve, and the second part have shapes that provide a coding that allows connection only if the position of the first sleeve matches the position of the second sleeve.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: March 7, 2023
    Assignee: Ultratech
    Inventor: Ilie Razvan
  • Publication number: 20220224050
    Abstract: An assembly (10) includes a first connector (12), and a second connector (14) mobile in axial translation relative to the first connector, a first part (16) attached to the first connector, and a first sleeve (18) axially rotatable relative to the first part between a first plurality of positions, a first blocking device (20) blocking the first sleeve, a second part (22) attached to the second connector, and a second sleeve (24) axially rotatable relative to the second part between a second plurality of positions, a second blocking device (26) blocking the second sleeve. The first sleeve, the first part, the second sleeve, and the second part have shapes that provide a coding that allows connection only if the position of the first sleeve matches the position of the second sleeve.
    Type: Application
    Filed: November 22, 2021
    Publication date: July 14, 2022
    Applicant: Ultratech
    Inventor: Ilie Razvan
  • Patent number: 10618250
    Abstract: A compressible liquid retaining berm having a plurality of wall members, the wall members composed of a compressible, resilient material such that the wall members will rebound to a neutral state after being compressed.
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: April 14, 2020
    Assignee: ULTRATECH INTERNATIONAL, INC.
    Inventors: Cary Winters, Tim McGrath
  • Patent number: 10493177
    Abstract: Fragrance control is provided by articles of manufacture including various solid state fragrancing objects, methods of using such objects, and systems that employ one or more such objects. The fragrancing object can be easy to manufacture, long lasting, provide fragrance that is consistently released over time, provide an indication to the user that the object needs to be replaced, and can hold a desired ratio of fragrance. The solid state fragrancing object can be coupled to an air vent to inconspicuously provide fragrance to a user in an environment, such as the interior of a vehicle.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: December 3, 2019
    Assignees: IMPACT PRODUCTS, LLC, ULTRATECH POLYMERS, INC.
    Inventors: Dennis Knapp, Anthony N. Kerkimis, Nicholas A. Kerkimis
  • Patent number: 10468290
    Abstract: The wafer chuck apparatus has a chuck body that includes an interior and a top surface. A plurality of micro-channel regions is formed in the top surface. Each micro-channel region is defined by an array of micro-channel sections that are in pneumatic communication with each other. The micro-channel regions are pneumatically isolated from each other. One or more vacuum manifold regions are defined in the interior of the chuck body and are in pneumatic communication with corresponding micro-channel regions through respective vacuum holes. The configuration of the micro-channel regions makes the wafer chuck apparatus particularly useful in chucking wafers that have a substantial amount of warp.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: November 5, 2019
    Assignee: Ultratech, Inc.
    Inventors: Raymond Ellis, A. J. Crespin
  • Patent number: 10435856
    Abstract: A compressible liquid retaining berm having a plurality of linear wall members and right angle corner members composed of a compressible, resilient material such that the wall members and corner members will rebound to a neutral state after being compressed. A longitudinal slot is disposed in the top wall of the wall members and the corner members, with the corner member longitudinal slots communicating with a recess positioned in the corner member. A liquid impermeable liner member is disposed on the interior side of the wall members and corner members, the liner member extending across the wall members and corner members. The liner member is secured to the wall members and corner members by positioning elongated anchor members atop the liner member in alignment with the longitudinal slots, such that the weight of the anchor members results in the anchor members being received within the longitudinal slots.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: October 8, 2019
    Assignee: ULTRATECH INTERNATIONAL, INC.
    Inventors: Cary Winters, Tim McGrath
  • Patent number: 10353208
    Abstract: High-efficiency line-forming optical systems and methods that employ a serrated aperture are disclosed. The line-forming optical system includes a laser source, a beam conditioning optical system, a first aperture device, and a relay optical system that includes a second aperture device having the serrated aperture. The serrated aperture is defined by opposing serrated blades configured to reduce intensity variations in a line image formed at an image plane as compared to using an aperture having straight-edged blades.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: July 16, 2019
    Assignee: Ultratech, Inc.
    Inventor: Serguei Anikitchev
  • Patent number: 10351950
    Abstract: An improved Plasma Enhanced Atomic Layer Deposition (PEALD) system and related operating methods are disclosed. A vacuum reaction chamber includes a vacuum system that separates a first outflow from the reaction chamber, comprising unreacted first precursor, from a second outflow from the reaction chamber, comprising second precursor and any reaction by products from the reaction of the second precursor with the coating surfaces. A trap, including trap material surfaces, is provided to remove first precursor from the first outflow when the first precursor reacts with the trap material surfaces. When the second precursor includes a plasma generated material, the second precursor is not passed through the trap. An alternate second precursor source injects a suitable second precursor into the trap to complete a material deposition layer onto the trap surfaces thereby preparing the trap material surfaces to react with the first precursor on the next material deposition cycle.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: July 16, 2019
    Assignee: Ultratech, Inc.
    Inventors: Mark Sowa, Robert Kane, Michael Sershen
  • Patent number: 10316406
    Abstract: Methods of forming an ALD-inhibiting layer using a layer of SAM molecules include providing a metalized substrate having a metal M and an oxide layer of the metal M. A reduction gas that includes a metal Q is used to reduce the oxide layer of the metal M, leaving a layer of form of M+MQyOx atop the metal M. The SAM molecules are provided as a vapor and form an ALD-inhibiting SAM layer on the M+MQyOx layer. Methods of performing S-ALD using the ALD-inhibiting SAM layer are also disclosed.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: June 11, 2019
    Assignee: Ultratech, Inc.
    Inventor: Laurent Lecordier
  • Patent number: 10269662
    Abstract: A method of processing a reconstituted wafer that supports IC chips includes operably disposing the reconstituted wafer in a lithography tool that has a depth of focus and a focus plane and that defines exposure fields on the reconstituted wafer, wherein each exposure field includes at least one of the IC chips. The method also includes scanning the reconstituted wafer with a line scanner to measure a surface topography of the reconstituted wafer as defined by the IC chips. The method also includes, for each exposure field: i) adjusting a position and/or an orientation of the reconstituted wafer so that a photoresist layers of the IC chips within the given exposure field fall within the depth of focus; and ii) performing an exposure with the lithography tool to pattern the photoresist layers of the IC chips in the given exposure field.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: April 23, 2019
    Assignee: Ultratech, Inc.
    Inventors: Paul M. Bischoff, Emily M. True, Raymond Ellis, A. J. Crespin
  • Patent number: 10249491
    Abstract: Atomic Layer Deposition (ALD) is used for heteroepitaxial film growth at reaction temperatures ranging from 80-400° C. The substrate and film materials are preferably matched to take advantage of Domain Matched Epitaxy (DME). A laser annealing system is used to thermally anneal deposition layer after deposition by ALD. In preferred embodiments, a silicon substrate is overlaid with an AlN nucleation layer and laser annealed. Thereafter a GaN device layer is applied over the AlN layer by an ALD process and then laser annealed. In a further example embodiment, a transition layer is applied between the GaN device layer and the AlN nucleation layer. The transition layer comprises one or more different transition material layers each comprising a AlxGa1-xN compound wherein the composition of the transition layer is continuously varied from AlN to GaN.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: April 2, 2019
    Assignee: Ultratech, Inc.
    Inventors: Ganesh Sundaram, Andrew M. Hawryluk, Daniel Stearns
  • Patent number: 10201576
    Abstract: The present invention discloses a herbal formulation comprising therapeutic effective amount of plant extract of Woodfordia Floribunda; therapeutic effective amount of plant extract of Centella Asiatica; and an effective amount of at least one pharmaceutically acceptable excipient.
    Type: Grant
    Filed: May 20, 2013
    Date of Patent: February 12, 2019
    Assignee: Ultratech India Limited
    Inventor: Bhatia Rishi
  • Patent number: 10090153
    Abstract: Method and devices are disclosed for device manufacture of gallium nitride devices by growing a gallium nitride layer on a silicon substrate using Atomic Layer Deposition (ALD) followed by rapid thermal annealing. Gallium nitride is grown directly on silicon or on a barrier layer of aluminum nitride grown on the silicon substrate. One or both layers are thermally processed by rapid thermal annealing. Preferably the ALD process use a reaction temperature below 550° C. and preferable below 350° C. The rapid thermal annealing step raises the temperature of the coating surface to a temperature ranging from 550 to 1500° C. for less than 12 msec.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: October 2, 2018
    Assignee: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Ganesh Sundaram, Ritwik Bhatia
  • Patent number: 10083843
    Abstract: Laser annealing systems and methods with ultra-short dwell times are disclosed. The method includes locally pre-heating the wafer with a pre-heat line image and then rapidly scanning an annealing image relative to the pre-heat line image to define a scanning overlap region that has a dwell time is in the range from 10 ns to 500 ns. These ultra-short dwell times are useful for performing surface or subsurface melt annealing of product wafers because they prevent the device structures from reflowing.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: September 25, 2018
    Assignee: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Serguei Anikitchev
  • Patent number: 10032883
    Abstract: Disclosed is an improved semiconductor structure (e.g., a silicon germanium (SiGe) hetero-junction bipolar transistor) having a narrow essentially interstitial-free SIC pedestal with minimal overlap of the extrinsic base. Also, disclosed is a method of forming the transistor which uses laser annealing, as opposed to rapid thermal annealing, of the SIC pedestal to produce both a narrow SIC pedestal and an essentially interstitial-free collector. Thus, the resulting SiGe HBT transistor can be produced with narrower base and collector space-charge regions than can be achieved with conventional technology.
    Type: Grant
    Filed: August 13, 2016
    Date of Patent: July 24, 2018
    Assignee: Ultratech, Inc.
    Inventors: Oleg Gluschenkov, Rajendran Krishnasamy, Kathryn T. Schonenberg
  • Patent number: 10016843
    Abstract: Systems and methods for reducing pulsed laser beam profile non-uniformities for laser annealing are disclosed. The methods include directing an initial pulsed laser beam along an optical axis, and imparting to each light pulse a time-varying angular deflection relative to the optical axis. This forms a new laser beam wherein each light pulse is smeared out over an amount of spatial deflection ? sufficient to reduce the micro-scale intensity variations in the laser beam. The new laser beam is then used to form the line image, which has better intensity uniformity as compared using the initial laser beam to form the line image.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: July 10, 2018
    Assignee: Ultratech, Inc.
    Inventor: Yun Wang
  • Patent number: 9960036
    Abstract: Atomic Layer Deposition (ALD) is used for heteroepitaxial film growth at reaction temperatures ranging from 80-400° C. The substrate and film materials are preferably matched to take advantage of Domain Matched Epitaxy (DME). A laser annealing system is used to thermally anneal deposition layer after deposition by ALD. In preferred embodiments, a silicon substrate is overlaid with an AlN nucleation layer and laser annealed. Thereafter a GaN device layer is applied over the AlN layer by an ALD process and then laser annealed. In a further example embodiment, a transition layer is applied between the GaN device layer and the AlN nucleation layer. The transition layer comprises one or more different transition material layers each comprising a AlxGa1-xN compound wherein the composition of the transition layer is continuously varied from AlN to GaN.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: May 1, 2018
    Assignee: Ultratech, Inc.
    Inventors: Ganesh Sundaram, Andrew M. Hawryluk, Daniel Stearns
  • Patent number: 9935022
    Abstract: Systems and methods of characterizing wafer shape using coherent gradient sensing (CGS) interferometry are disclosed. The method includes measuring at least 3×106 data points on a wafer surface using a CGS system to obtain a topography map of the wafer surface. The data are collected on a wafer for pre-processing and post-processing of the wafer, and the difference calculated to obtain a measurement of the effect of the process on wafer surface shape. The process steps for processing the same wafer or subsequent wafers are controlled based on measured process-induced change in the wafer surface shape in order to improve the quality of the wafer processing.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: April 3, 2018
    Assignee: Ultratech, Inc.
    Inventor: David M. Owen
  • Patent number: 9929011
    Abstract: Method and devices are disclosed for device manufacture of gallium nitride devices by growing a gallium nitride layer on a silicon substrate using Atomic Layer Deposition (ALD) followed by rapid thermal annealing. Gallium nitride is grown directly on silicon or on a barrier layer of aluminum nitride grown on the silicon substrate. One or both layers are thermally processed by rapid thermal annealing. Preferably the ALD process use a reaction temperature below 550° C. and preferable below 350° C. The rapid thermal annealing step raises the temperature of the coating surface to a temperature ranging from 550 to 1500° C. for less than 12 msec.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: March 27, 2018
    Assignee: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Ganesh Sundaram, Ritwik Bhatia