Patents Assigned to Ultratech
  • Patent number: 9862063
    Abstract: Fabrics that have been treated to create superhydrophobic, oleophobic and/or ice-phobic performance are manufactured or assembled in specific conforming shapes so they can be positioned on or pulled over and around certain objects for the purpose of making those objects superhydrophobic, oleophobic and/or ice-phobic so they are self-cleaning, water proof, ice-resistant, oil-resistant, corrosion barriers, etc.
    Type: Grant
    Filed: January 26, 2015
    Date of Patent: January 9, 2018
    Assignee: ULTRATECH INTERNATIONAL, INC.
    Inventors: Mark D. Shaw, Paul Sander, Matt Clancy
  • Patent number: 9784570
    Abstract: Polarization-based coherent gradient-sensing systems and methods for measuring at least one surface-shape property of a specularly reflective surface are disclosed. The method includes: reflecting a first circularly polarized laser beam from a sample surface to form a second circularly polarized laser beam that contains surface-shape information; converting the second circularly polarized laser beam to a linearly polarized reflected laser beam; directing respective first and second portions of the linearly polarized reflected laser beam to first and second relay assemblies that constitute first and second interferometer arms. The first and second relay assemblies each use a pair of axially spaced-apart gratings to generate respective first and second interference patterns at respective first and second image sensors. Respective first and second signals from the first and second image sensors are processed to determine the at least one surface-shape property.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: October 10, 2017
    Assignee: Ultratech, Inc.
    Inventor: David G. Stites
  • Patent number: 9783888
    Abstract: An ALD coating method to provide a coating surface on a substrate is provided. The ALD coating method comprises: providing a deposition heading including a unit cell having a first precursor nozzle assembly and a second precursor nozzle assembly; emitting a first precursor from the first precursor nozzle assembly into chamber under atmospheric conditions in a direction substantially normal to the coating surface; emitting a second precursor from the first precursor nozzle assembly into chamber under atmospheric conditions in a direction substantially normal to the coating surface; removing moving the substrate under the deposition head such that the first precursor is directed onto a first area of the coating surface prior to the second precursor being directed onto the first area of the coating surface.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: October 10, 2017
    Assignee: Ultratech, Inc.
    Inventors: Michael J. Sershen, Ganesh M. Sundaram, Roger R. Coutu, Jill Svenja Becker, Mark J. Dalberth
  • Patent number: 9777371
    Abstract: A gas deposition system (1000) configured as a dual-chamber “tower” includes a frame (1140) for supporting two reaction chamber assemblies (3000), one vertically above the other. Each chamber assembly (3000) includes an outer wall assembly surrounding a hollow chamber (3070) sized to receive a single generation 4.5 (GEN 4.5) glass plate substrate through a load port. The substrate is disposed horizontally inside the hollow chamber (3070) and the chamber assembly (3000) includes removable and cleanable triangular shaped input (3150) and output (3250) plenums disposed external to the hollow chamber (3070) and configured to produce substantially horizontally directed laminar gas flow over a top surface of the substrate. Each chamber includes a cleanable and removable chamber liner assembly (6000) disposed inside the hollow chamber (3070) to contain precursor gases therein thereby preventing contamination of chamber outer walls (3010, 3020, 3030, 3040).
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: October 3, 2017
    Assignee: Ultratech, Inc.
    Inventors: Roger R. Coutu, Jill Svenja Becker, Ganesh M. Sundaram, Eric W. Deguns
  • Patent number: 9768016
    Abstract: Method and devices are disclosed for device manufacture of gallium nitride devices by growing a gallium nitride layer on a silicon substrate using Atomic Layer Deposition (ALD) followed by rapid thermal annealing. Gallium nitride is grown directly on silicon or on a barrier layer of aluminum nitride grown on the silicon substrate. One or both layers are thermally processed by rapid thermal annealing. Preferably the ALD process use a reaction temperature below 550° C. and preferable below 350° C. The rapid thermal annealing step raises the temperature of the coating surface to a temperature ranging from 550 to 1500° C. for less than 12 msec.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: September 19, 2017
    Assignee: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Ganesh Sundaram, Ritwik Bhatia
  • Publication number: 20170260629
    Abstract: A quartz crystal microbalance assembly includes a lid of a reactor chamber of an ALD system. A QCM crystal is disposed in a bottom section of a central cavity formed in the lid. A central portion of a front surface of the QCM crystal is exposed to an interior of the reactor chamber. A retainer arranged within the central cavity and above the QCM crystal presses the QCM crystal against a ledge in the lid to form a seal between the front surface of the QCM crystal and the ledge while also establishing electrical contact with the QCM crystal. A flange resides immediately adjacent a top surface of the lid and seals the central cavity while supporting electrical contact with the QCM crystal through the retainer. A transducer external to the reactor chamber and in electrical contact with the QCM crystal through a connector in the flange drives the QCM crystal.
    Type: Application
    Filed: February 17, 2017
    Publication date: September 14, 2017
    Applicant: Ultratech, Inc.
    Inventors: Laurent Lecordier, Michael Ruffo
  • Patent number: 9752420
    Abstract: A method of lining a metal oil well pipe in situ, by providing a pipe liner composed of a polymer tube having a fabric or mesh reinforcing layer mechanically bonded to its exterior, inserting the pipe liner into the oil well pipe by adding water or other weighting means into the pipe liner, and opening the pipe liner to allow oil to flow therethrough, thereby expanding the pipe liner composite tightly against the oil well pipe.
    Type: Grant
    Filed: January 27, 2015
    Date of Patent: September 5, 2017
    Assignee: ULTRATECH INTERNATIONAL, INC.
    Inventors: Mark D. Shaw, Matt Clancy, Laurence M. Bierce
  • Publication number: 20170241019
    Abstract: Methods of performing PE-ALD on a substrate with reduced quartz-based contamination are disclosed. The methods include inductively forming in a quartz plasma tube a hydrogen-based plasma from a feed gas that consists essentially of either hydrogen and nitrogen or hydrogen, argon and nitrogen. The nitrogen constitutes 2 vol % or less of the feed gas. The hydrogen-based plasma includes one or more reactive species. The one or more reactive species in the hydrogen-based plasma are directed to the substrate to cause the one or more reactive species to react with a initial film on the substrate. The trace amounts of nitrogen serve to reduce the amount of quartz-based contamination in the initial film as compared to using no nitrogen in the feed gas.
    Type: Application
    Filed: January 27, 2017
    Publication date: August 24, 2017
    Applicant: Ultratech, Inc.
    Inventors: Mark J. Sowa, Adam Bertuch, Ritwik Bhatia
  • Patent number: 9711361
    Abstract: High-efficiency line-forming optical systems and methods for defect annealing and dopant activation are disclosed. The system includes a CO2-based line-forming system configured to form at a wafer surface a first line image having between 2000 W and 3000 W of optical power. The line image is scanned over the wafer surface to locally raise the temperature up to a defect anneal temperature. The system can include a visible-wavelength diode-based line-forming system that forms a second line image that can scan with the first line image to locally raise the wafer surface temperature from the defect anneal temperature to a spike anneal temperature. Use of the visible wavelength for the spike annealing reduces adverse pattern effects and improves temperature uniformity and thus annealing uniformity.
    Type: Grant
    Filed: February 20, 2017
    Date of Patent: July 18, 2017
    Assignee: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Serguei Anikitchev
  • Publication number: 20170194204
    Abstract: Through via holes are prepared for metallization using ALD and PEALD processing. Each via is coated with a titanium nitride barrier layer having a thickness ranging from 20 to 200 ?. A ruthenium sealing layer is formed over the titanium nitride barrier layer wherein the sealing layer is formed without oxygen to prevent oxidation of the titanium nitride barrier layer. A ruthenium nucleation layer is formed over the sealing layer wherein the nucleation layer is formed with oxygen in order to oxidize carbon during the application of the Ru nucleation layer. The sealing layer is formed by a PEALD method using plasma excited nitrogen radicals instead of oxygen.
    Type: Application
    Filed: August 27, 2014
    Publication date: July 6, 2017
    Applicant: Ultratech, Inc.
    Inventor: Mark Sowa
  • Patent number: 9691613
    Abstract: Method and devices are disclosed for device manufacture of gallium nitride devices by growing a gallium nitride layer on a silicon substrate using Atomic Layer Deposition (ALD) followed by rapid thermal annealing. Gallium nitride is grown directly on silicon or on a barrier layer of aluminum nitride grown on the silicon substrate. One or both layers are thermally processed by rapid thermal annealing. Preferably the ALD process use a reaction temperature below 550° C. and preferable below 350° C. The rapid thermal annealing step raises the temperature of the coating surface to a temperature ranging from 550 to 1500° C. for less than 12 msec.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: June 27, 2017
    Assignee: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Ganesh Sundaram, Ritwik Bhatia
  • Publication number: 20170178980
    Abstract: Full-wafer inspection methods for a semiconductor wafer are disclosed. One method includes making a measurement of a select measurement parameter simultaneously over measurement sites of the entire surface of the semiconductor wafer at a maximum measurement-site pixel density ?max to obtain measurement data, wherein the total number of measurement-site pixels obtained at the maximum measurement-site pixel density ?max is between 104 and 108. The method also includes defining a plurality of zones of the surface of the semiconductor wafer, with each of the zones having a measurement-site pixel density ?, with at least two of the zones having a different sized measurement-site pixel and thus a different measurement-site pixel density ?. The method also includes processing the measurement data based on the plurality of zones and the corresponding measurement-site pixel densities ?.
    Type: Application
    Filed: November 30, 2016
    Publication date: June 22, 2017
    Applicant: Ultratech, Inc.
    Inventors: David M. Owen, Byoung-Ho Lee, Eric Bouche, Andrew M. Hawryluk
  • Publication number: 20170162392
    Abstract: High-efficiency line-forming optical systems and methods for defect annealing and dopant activation are disclosed. The system includes a CO2-based line-forming system configured to form at a wafer surface a first line image having between 2000 W and 3000 W of optical power. The line image is scanned over the wafer surface to locally raise the temperature up to a defect anneal temperature. The system can include a visible-wavelength diode-based line-forming system that forms a second line image that can scan with the first line image to locally raise the wafer surface temperature from the defect anneal temperature to a spike anneal temperature. Use of the visible wavelength for the spike annealing reduces adverse pattern effects and improves temperature uniformity and thus annealing uniformity.
    Type: Application
    Filed: February 20, 2017
    Publication date: June 8, 2017
    Applicant: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Serguei Anikitchev
  • Publication number: 20170162456
    Abstract: Systems and methods of characterizing wafer shape using coherent gradient sensing (CGS) interferometry are disclosed. The method includes measuring at least 3×106 data points on a wafer surface using a CGS system to obtain a topography map of the wafer surface. The data are collected on a wafer for pre-processing and post-processing of the wafer, and the difference calculated to obtain a measurement of the effect of the process on wafer surface shape. The process steps for processing the same wafer or subsequent wafers are controlled based on measured process-induced change in the wafer surface shape in order to improve the quality of the wafer processing.
    Type: Application
    Filed: November 29, 2016
    Publication date: June 8, 2017
    Applicant: Ultratech, Inc.
    Inventor: David M. Owen
  • Patent number: 9666432
    Abstract: Atomic Layer Deposition (ALD) is used for heteroepitaxial film growth at reaction temperatures ranging from 80-400° C. The substrate and film materials are preferably selected to take advantage of Domain Matched Epitaxy (DME). A laser annealing system is used to thermally anneal deposition layers after deposition by ALD. In preferred embodiments a silicon substrate is overlaid with an AIN nucleation layer and laser annealed. Thereafter a GaN device layers is applied over the AIN layer by an ALD process and then laser annealed. In a further example embodiment a transition layer is applied between the GaN device layer and the AIN nucleation layer. The transition layer comprises one or more different transition material layers each comprising a AlxGa1-x compound wherein the composition of the transition layer is continuously varied from AIN to GaN.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: May 30, 2017
    Assignee: Ultratech, Inc.
    Inventors: Ganesh Sundaram, Andrew M. Hawryluk, Daniel Stearns
  • Publication number: 20170145564
    Abstract: An improved ALD system usable for low vapor pressure liquid and sold precursors. The ALD system includes a precursor container and inert gas delivery elements configured to increase precursor vapor pressure within a precursor container by injecting an inert gas pulse into the precursor container while a precursor pulse is being removed to the reaction chamber. A controllable inert gas flow valve and a flow restrictor are disposed along an inert gas input line leading into the precursor container below its fill level. A vapor space is provided above the fill level. An ALD pulse valve is disposed along a precursor vapor line extending between the vapor space and the reaction chamber. Both valves are pulsed simultaneously to synchronously remove precursor vapor from the vapor space and inject inert gas into the precursor container below the fill level.
    Type: Application
    Filed: January 22, 2015
    Publication date: May 25, 2017
    Applicant: Ultratech, Inc.
    Inventors: Adam Bertuch, Michael Ruffo
  • Patent number: 9638922
    Abstract: A line-forming optical system and method are disclosed that form a line image with high-efficiency. A method includes forming a laser beam having a first intensity profile with a Gaussian distribution in at least a first direction and passing at least 50% of the laser beam in the first direction to form a first transmitted light. The method also includes: focusing the first transmitted light at an intermediate image plane to define a second intensity profile having a central peak and first side peaks immediately adjacent the central peak; then truncating the second intensity profile within each of first side peaks to define a second transmitted light; and then forming the line image at an image plane from the second transmitted light.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: May 2, 2017
    Assignee: Ultratech, Inc.
    Inventor: Serguei Anikitchev
  • Publication number: 20170114451
    Abstract: Methods of forming an ALD-inhibiting layer using a layer of SAM molecules include providing a metalized substrate having a metal M and an oxide layer of the metal M. A reduction gas that includes a metal Q is used to reduce the oxide layer of the metal M, leaving a layer of form of M+MQyOx atop the metal M. The SAM molecules are provided as a vapor and form an ALD-inhibiting SAM layer on the M+MQyOx layer. Methods of performing S-ALD using the ALD-inhibiting SAM layer are also disclosed.
    Type: Application
    Filed: October 17, 2016
    Publication date: April 27, 2017
    Applicant: Ultratech, Inc.
    Inventor: Laurent Lecordier
  • Patent number: 9633850
    Abstract: Masking methods for atomic-layer-deposition processes for electrode-based devices are disclosed, wherein solder is used as a masking material. The methods include exposing electrical contact members of an electrical device having an active device region and a barrier layer formed by atomic layer deposition. This includes depositing solder elements on the electrical contact members, then forming the barrier layer using atomic layer deposition, wherein the barrier layer covers the active device region and also covers the solder elements that respectively cover the electrical contact members. The solder elements are then melted, which removes respective portions of the barrier layer covering the solder elements. Similar methods are employed for exposing contacts when forming layered capacitors.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: April 25, 2017
    Assignee: Ultratech, Inc.
    Inventor: Ritwik Bhatia
  • Patent number: 9613828
    Abstract: Laser annealing of a semiconductor wafers using a forming gas for localized control of ambient oxygen gas to reduce the amount of oxidization during laser annealing is disclosed. The forming gas includes hydrogen gas and an inert buffer gas such as nitrogen gas. The localized heating of the oxygen gas and the forming gas in the vicinity of the annealing location on the surface of the semiconductor wafer creates a localized region within which combustion of oxygen gas and hydrogen gas occurs to generate water vapor. This combustion reaction reduces the oxygen gas concentration within the localized region, thereby locally reducing the amount of ambient oxygen gas, which in turn reduces oxidation rate at the surface of the semiconductor wafer during the annealing process.
    Type: Grant
    Filed: May 18, 2015
    Date of Patent: April 4, 2017
    Assignee: Ultratech, Inc.
    Inventors: James McWhirter, Arthur W. Zafiropoulo