Patents Assigned to Ultratech
  • Publication number: 20160281223
    Abstract: An improved Plasma Enhanced Atomic Layer Deposition (PEALD) system and related operating methods are disclosed. A vacuum reaction chamber includes a vacuum system that separates a first outflow from the reaction chamber, comprising unreacted first precursor, from a second outflow from the reaction chamber, comprising second precursor and any reaction by products from the reaction of the second precursor with the coating surfaces. A trap, including trap material surfaces, is provided to remove first precursor from the first outflow when the first precursor reacts with the trap material surfaces. When the second precursor includes a plasma generated material, the second precursor is not passed through the trap. An alternate second precursor source injects a suitable second precursor into the trap to complete a material deposition layer onto the trap surfaces thereby preparing the trap material surfaces to react with the first precursor on the next material deposition cycle.
    Type: Application
    Filed: November 21, 2014
    Publication date: September 29, 2016
    Applicant: Ultratech, Inc.
    Inventors: Mark Sowa, Robert Kane, Michael Sershen
  • Publication number: 20160276184
    Abstract: Systems and methods for reducing pulsed laser beam profile non-uniformities for laser annealing are disclosed. The methods include directing an initial pulsed laser beam along an optical axis, and imparting to each light pulse a time-varying angular deflection relative to the optical axis. This forms a new laser beam wherein each light pulse is smeared out over an amount of spatial deflection ? sufficient to reduce the micro-scale intensity variations in the laser beam. The new laser beam is then used to form the line image, which has better intensity uniformity as compared using the initial laser beam to form the line image.
    Type: Application
    Filed: March 9, 2016
    Publication date: September 22, 2016
    Applicant: Ultratech, Inc.
    Inventor: Yun Wang
  • Patent number: 9450069
    Abstract: Disclosed is an improved semiconductor structure (e.g., a silicon germanium (SiGe) hetero-junction bipolar transistor) having a narrow essentially interstitial-free SIC pedestal with minimal overlap of the extrinsic base. Also, disclosed is a method of forming the transistor which uses laser annealing, as opposed to rapid thermal annealing, of the SIC pedestal to produce both a narrow SIC pedestal and an essentially interstitial-free collector. Thus, the resulting SiGe HBT transistor can be produced with narrower base and collector space-charge regions than can be achieved with conventional technology.
    Type: Grant
    Filed: March 28, 2013
    Date of Patent: September 20, 2016
    Assignee: Ultratech, Inc.
    Inventors: Oleg Gluschenkov, Rajendran Krishnasamy, Kathryn T. Schonenberg
  • Patent number: 9436103
    Abstract: A Wynne-Dyson projection lens for use in an ultraviolet optical lithography system is disclosed, wherein the projection lens is configured to have reduced susceptibility to damage from ultraviolet radiation. The projection lens utilizes lens elements that are made of optical glasses that are resistant to damage from ultraviolet radiation, but that also provide sufficient degrees of freedom to correct aberrations. The glass types used for the lens elements are selected from the group of optical glasses consisting of: fused silica, S-FPL51Y, S-FSL5Y, BSM51Y and BAL15Y.
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: September 6, 2016
    Assignee: Ultratech, Inc.
    Inventors: Peiqian Zhao, Emily M. True, Raymond Ellis, Andrew M. Hawryluk
  • Publication number: 20160240407
    Abstract: Laser annealing systems and methods for annealing a semiconductor wafer with ultra-short dwell times are disclosed. The laser annealing systems can include one or two laser beams that at least partially overlap. One of the laser beams is a pre-heat laser beam and the other laser beam is the annealing laser beam. The annealing laser beam scans sufficiently fast so that the dwell time is in the range from about 1 ?s to about 100 ?s. These ultra-short dwell times are useful for annealing product wafers formed from thin device wafers because they prevent the device side of the device wafer from being damaged by heating during the annealing process. Embodiments of single-laser-beam annealing systems and methods are also disclosed.
    Type: Application
    Filed: September 18, 2014
    Publication date: August 18, 2016
    Applicant: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Serguei Anikitchev
  • Publication number: 20160240440
    Abstract: Provided are systems and processes for forming a three-dimensional circuit on a substrate. A radiation source produces a beam that is directed at a substrate having an isolating layer interposed between circuit layers. The circuit layers communicate with each other via a seed region exhibiting a crystalline surface. At least one circuit layer has an initial microstructure that exhibits electronic properties unsuitable for forming circuit features therein. After being controllably heat treated, the initial microstructure of the circuit layer having unsuitable properties is transformed into one that exhibits electronic properties suitable for forming circuit feature therein. Also provided are three-dimensional circuit structures optionally formed by the inventive systems and/or processes.
    Type: Application
    Filed: April 28, 2016
    Publication date: August 18, 2016
    Applicant: Ultratech, Inc.
    Inventors: Arthur W. Zafiropoulo, Yun Wang, Andrew M. Hawryluk
  • Patent number: 9411163
    Abstract: A line-forming optical system and method are disclosed that form a line image with high-efficiency. A method includes forming a laser beam having a first intensity profile with a Gaussian distribution in at least a first direction and passing at least 50% of the laser beam in the first direction to form a first transmitted light. The method also includes: focusing the first transmitted light at an intermediate image plane to define a second intensity profile having a central peak and first side peaks immediately adjacent the central peak; then truncating the second intensity profile within each of first side peaks to define a second transmitted light; and then forming the line image at an image plane from the second transmitted light.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: August 9, 2016
    Assignee: Ultratech, Inc.
    Inventor: Serguei Anikitchev
  • Patent number: 9401278
    Abstract: Methods and apparatuses are provided for improving the intensity profile of a beam image used to process a semiconductor substrate. At least one photonic beam may be generated and manipulated to form an image having an intensity profile with an extended uniform region useful for thermally processing the surface of the substrate. The image may be scanned across the surface to heat at least a portion of the substrate surface to achieve a desired temperature within a predetermined dwell time. Such processing may achieve a high efficiency due to the large proportion of energy contained in the uniform portion of the beam.
    Type: Grant
    Filed: April 15, 2014
    Date of Patent: July 26, 2016
    Assignee: Ultratech, Inc.
    Inventors: Andrew M Hawryluk, Boris Grek, David A Markle
  • Patent number: 9401277
    Abstract: Provided are systems and methods for processing the surface of substrates that scan a laser beam at one or more selected orientation angles. The orientation angle or angles may be selected to reduce substrate warpage. When the substrates are semiconductor wafers having microelectronic devices, the orientation angles may be selected to produce controlled strain and to improve electronic performance of the devices.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: July 26, 2016
    Assignee: Ultratech, Inc.
    Inventors: Yun Wang, Shaoyin Chen
  • Publication number: 20160203972
    Abstract: Atomic Layer Deposition (ALD) is used for heteroepitaxial film growth at reaction temperatures ranging from 80-400° C. The substrate and film materials are preferably selected to take advantage of Domain Matched Epitaxy (DME). A laser annealing system is used to thermally anneal deposition layers after deposition by ALD. In preferred embodiments a silicon substrate is overlaid with an AIN nucleation layer and laser annealed. Thereafter a GaN device layers is applied over the AIN layer by an ALD process and then laser annealed. In a further example embodiment a transition layer is applied between the GaN device layer and the AIN nucleation layer. The transition layer comprises one or more different transition material layers each comprising a AlxGa1-x compound wherein the composition of the transition layer is continuously varied from AIN to GaN.
    Type: Application
    Filed: September 17, 2014
    Publication date: July 14, 2016
    Applicant: Ultratech, Inc.
    Inventors: Ganesh Sundaram, Andrew M. Hawryluk, Daniel Stearns
  • Publication number: 20160181120
    Abstract: Laser annealing systems and methods with ultra-short dwell times are disclosed. The method includes locally pre-heating the wafer with a pre-heat line image and then rapidly scanning an annealing image relative to the pre-heat line image to define a scanning overlap region that has a dwell time is in the range from 10 ns to 500 ns. These ultra-short dwell times are useful for performing surface or subsurface melt annealing of product wafers because they prevent the device structures from reflowing.
    Type: Application
    Filed: November 16, 2015
    Publication date: June 23, 2016
    Applicant: ULTRATECH, INC.
    Inventors: Andrew M. Hawryluk, Serguei Anikitchev
  • Publication number: 20160155629
    Abstract: Method and devices are disclosed for device manufacture of gallium nitride devices by growing a gallium nitride layer on a silicon substrate using Atomic Layer Deposition (ALD) followed by rapid thermal annealing. Gallium nitride is grown directly on silicon or on a barrier layer of aluminum nitride grown on the silicon substrate. One or both layers are thermally processed by rapid thermal annealing. Preferably the ALD process use a reaction temperature below 550° C. and preferable below 350° C. The rapid thermal annealing step raises the temperature of the coating surface to a temperature ranging from 550 to 1500° C. for less than 12 msec.
    Type: Application
    Filed: June 25, 2014
    Publication date: June 2, 2016
    Applicant: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Ganesh Sundaram, Ritwik Bhatia
  • Publication number: 20160148810
    Abstract: High-efficiency line-forming optical systems and methods for defect annealing and dopant activation are disclosed. The system includes a CO2-based line-forming system configured to form at a wafer surface a first line image having between 2000 W and 3000 W of optical power. The line image is scanned over the wafer surface to locally raise the temperature up to a defect anneal temperature. The system can include a visible-wavelength diode-based line-forming system that forms a second line image that can scan with the first line image to locally raise the wafer surface temperature from the defect anneal temperature to a spike anneal temperature. Use of the visible wavelength for the spike annealing reduces adverse pattern effects and improves temperature uniformity and thus annealing uniformity.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 26, 2016
    Applicant: ULTRATECH, INC.
    Inventors: Andrew M. Hawryluk, Serguei Anikitchev
  • Patent number: 9343307
    Abstract: The disclosure is directed to laser spike annealing using fiber lasers. The method includes performing laser spike annealing of a surface of a wafer by: generating with a plurality of fiber laser systems respective CW output radiation beams that partially overlap at the wafer surface to form an elongate annealing image having a long axis and a length LA along the long axis; heating at least a region of the wafer to a pre-anneal temperature TPA; and scanning the elongate annealing image over the wafer surface and within the pre-heat region so that the annealing image has a dwell time tD in the range 30 ns?tD?10 ms and raises the wafer surface temperature to an annealing temperature TA.
    Type: Grant
    Filed: September 25, 2014
    Date of Patent: May 17, 2016
    Assignee: Ultratech, Inc.
    Inventor: Serguei Anikitchev
  • Patent number: 9341951
    Abstract: A Wynn-Dyson imaging system with reduced thermal distortion is disclosed, wherein the reticle and wafer prisms are made of glass material having a coefficient of thermal expansion of no greater than about 100 ppb/° C. The system also includes a first IR-blocking window disposed between the reticle and the reticle prism, and a second matching window disposed between the wafer and the wafer prism to maintain imaging symmetry. The IR-blocking window substantially blocks convective and radiative heat from reaching the reticle prism, thereby reducing the amount of thermally induced image distortion in the reticle image formed on the wafer.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: May 17, 2016
    Assignee: Ultratech, Inc.
    Inventor: Andrew M. Hawryluk
  • Patent number: 9328417
    Abstract: A reaction chamber assembly suitable for forming thin film deposition layers onto solid substrates includes a reaction chamber and an input plenum for receiving source material from gas source containers and delivering a flow of source material into the reaction chamber uniformly distributed across a substrate support width. An output plenum connected between the reaction chamber and a vacuum pump uniformly removes an outflow of material from the reaction chamber across the substrate support width. The input plenum is configured to expand a volume of the source material and deliver the source material to the substrate support area with uniform source material flow distribution across the substrate support width. The output plenum is configured to remove the outflow material across the entire substrate support width and to compress the volume of outflow material prior to the outflow material exiting the output plenum.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: May 3, 2016
    Assignee: Ultratech, Inc.
    Inventors: Jill S. Becker, Roger R. Coutu, Douwe J. Monsma
  • Publication number: 20160115596
    Abstract: An ALD coating method to provide a coating surface on a substrate is provided. The ALD coating method comprises: providing a deposition heading including a unit cell having a first precursor nozzle assembly and a second precursor nozzle assembly; emitting a first precursor from the first precursor nozzle assembly into chamber under atmospheric conditions in a direction substantially normal to the coating surface; emitting a second precursor from the first precursor nozzle assembly into chamber under atmospheric conditions in a direction substantially normal to the coating surface; removing moving the substrate under the deposition head such that the first precursor is directed onto a first area of the coating surface prior to the second precursor being directed onto the first area of the coating surface.
    Type: Application
    Filed: December 2, 2015
    Publication date: April 28, 2016
    Applicant: Ultratech, Inc.
    Inventors: Michael J. Sershen, Ganesh M. Sundaram, Roger R. Coutu, Jill Svenja Becker, Mark J. Dalberth
  • Patent number: 9318319
    Abstract: A method of performing a radical-enhanced atomic-layer deposition process on a surface of a substrate that resides within an interior of a reactor chamber is disclosed. The method includes forming plasma from a gas mixture consisting of CF4 and O2, wherein the CF4 is present in a concentration in the range from 0.1 vol % to 10 vol %. The plasma formed from the gas mixture generates oxygen radicals O* faster than if there were no CF4 present in the gas mixture. The method also includes feeding the oxygen radicals and a precursor gas sequentially into the interior of the reactor chamber to form an oxide film on the surface of the substrate. A system for performing the radical-enhanced atomic-layer deposition process using the rapidly formed oxygen radicals is also disclosed.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: April 19, 2016
    Assignee: Ultratech, Inc.
    Inventors: Arthur W. Zafiropoulo, Mark J. Sowa
  • Patent number: 9302348
    Abstract: Systems and methods for performing ultrafast laser annealing in a manner that reduces pattern density effects in integrated circuit manufacturing are disclosed. The method includes scanning at least one first laser beam over the patterned surface of a substrate. The at least one first laser beam is configured to heat the patterned surface to a non-melt temperature Tnonmelt that is within about 400° C. of the melt temperature Tmelt. The method also includes scanning at least one second laser beam over the patterned surface and relative to the first laser beam. The at least one second laser beam is pulsed and is configured to heat the patterned surface from the non-melt temperature provided by the at least one first laser beam up to the melt temperature.
    Type: Grant
    Filed: October 6, 2012
    Date of Patent: April 5, 2016
    Assignee: Ultratech Inc.
    Inventors: Yun Wang, Andrew M. Hawryluk
  • Publication number: 20160086832
    Abstract: Laser annealing systems and methods for annealing a semiconductor wafer with ultra-short dwell times are disclosed. The laser annealing systems can include one or two laser beams that at least partially overlap. One of the laser beams is a pre-heat laser beam and the other laser beam is the annealing laser beam. The annealing laser beam scans sufficiently fast so that the dwell time is in the range from about 1 ?s to about 100 ?s. These ultra-short dwell times are useful for annealing product wafers formed from thin device wafers because they prevent the device side of the device wafer from being damaged by heating during the annealing process. Embodiments of single-laser-beam annealing systems and methods are also disclosed.
    Type: Application
    Filed: September 18, 2014
    Publication date: March 24, 2016
    Applicant: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, Serguei Anikitchev